DE2431079C3 - Dynamischer Halbleiterspeicher mit Zwei-Transistor-Speicherelementen - Google Patents

Dynamischer Halbleiterspeicher mit Zwei-Transistor-Speicherelementen

Info

Publication number
DE2431079C3
DE2431079C3 DE2431079A DE2431079A DE2431079C3 DE 2431079 C3 DE2431079 C3 DE 2431079C3 DE 2431079 A DE2431079 A DE 2431079A DE 2431079 A DE2431079 A DE 2431079A DE 2431079 C3 DE2431079 C3 DE 2431079C3
Authority
DE
Germany
Prior art keywords
field effect
semiconductor memory
read
effect transistors
memory according
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE2431079A
Other languages
German (de)
English (en)
Other versions
DE2431079B2 (de
DE2431079A1 (de
Inventor
Horst Dipl.-Ing. 7031 Holzgerlingen Barsuhn
Joerg Dipl.-Ing. 7300 Esslingen Gschwendtner
Werner Otto Dipl.-Ing. 7030 Boeblingen Haug
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
IBM Deutschland GmbH
Original Assignee
IBM Deutschland GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by IBM Deutschland GmbH filed Critical IBM Deutschland GmbH
Priority to DE2431079A priority Critical patent/DE2431079C3/de
Priority to IT23304/75A priority patent/IT1038100B/it
Priority to JP5978375A priority patent/JPS5428252B2/ja
Priority to GB21857/75A priority patent/GB1502334A/en
Priority to CH657875A priority patent/CH581885A5/xx
Priority to FR7516563A priority patent/FR2276659A1/fr
Publication of DE2431079A1 publication Critical patent/DE2431079A1/de
Publication of DE2431079B2 publication Critical patent/DE2431079B2/de
Application granted granted Critical
Publication of DE2431079C3 publication Critical patent/DE2431079C3/de
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/403—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh
    • G11C11/404—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh with one charge-transfer gate, e.g. MOS transistor, per cell
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/409—Read-write [R-W] circuits 
    • G11C11/4097—Bit-line organisation, e.g. bit-line layout, folded bit lines
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/811—Combinations of field-effect devices and one or more diodes, capacitors or resistors
    • H10D84/813—Combinations of field-effect devices and capacitor only

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Dram (AREA)
  • Semiconductor Memories (AREA)
DE2431079A 1974-06-28 1974-06-28 Dynamischer Halbleiterspeicher mit Zwei-Transistor-Speicherelementen Expired DE2431079C3 (de)

Priority Applications (6)

Application Number Priority Date Filing Date Title
DE2431079A DE2431079C3 (de) 1974-06-28 1974-06-28 Dynamischer Halbleiterspeicher mit Zwei-Transistor-Speicherelementen
IT23304/75A IT1038100B (it) 1974-06-28 1975-05-14 Memoria perfezionata particolarmento per sistemi di elaborazione dei dati
JP5978375A JPS5428252B2 (en, 2012) 1974-06-28 1975-05-21
GB21857/75A GB1502334A (en) 1974-06-28 1975-05-21 Semiconductor data storage arrangements
CH657875A CH581885A5 (en, 2012) 1974-06-28 1975-05-22
FR7516563A FR2276659A1 (fr) 1974-06-28 1975-05-23 Memoire dynamique a semi-conducteurs comportant des elements d'emmagasinage a deux dispositifs

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE2431079A DE2431079C3 (de) 1974-06-28 1974-06-28 Dynamischer Halbleiterspeicher mit Zwei-Transistor-Speicherelementen

Publications (3)

Publication Number Publication Date
DE2431079A1 DE2431079A1 (de) 1976-02-12
DE2431079B2 DE2431079B2 (de) 1979-04-26
DE2431079C3 true DE2431079C3 (de) 1979-12-13

Family

ID=5919184

Family Applications (1)

Application Number Title Priority Date Filing Date
DE2431079A Expired DE2431079C3 (de) 1974-06-28 1974-06-28 Dynamischer Halbleiterspeicher mit Zwei-Transistor-Speicherelementen

Country Status (6)

Country Link
JP (1) JPS5428252B2 (en, 2012)
CH (1) CH581885A5 (en, 2012)
DE (1) DE2431079C3 (en, 2012)
FR (1) FR2276659A1 (en, 2012)
GB (1) GB1502334A (en, 2012)
IT (1) IT1038100B (en, 2012)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5853512B2 (ja) * 1976-02-13 1983-11-29 株式会社東芝 半導体記憶装置の製造方法
JPS5922316B2 (ja) * 1976-02-24 1984-05-25 株式会社東芝 ダイナミツクメモリ装置
US4040016A (en) * 1976-03-31 1977-08-02 International Business Machines Corporation Twin nodes capacitance memory
US4103342A (en) * 1976-06-17 1978-07-25 International Business Machines Corporation Two-device memory cell with single floating capacitor
CA1164710A (en) * 1978-05-09 1984-04-03 Edward J. Reardon, Jr. Phototropic photosensitive compositions containing fluoran colorformer
DE2837877C2 (de) * 1978-08-30 1987-04-23 Siemens AG, 1000 Berlin und 8000 München Verfahren zur Herstellung eines MOS-integrierten Halbleiterspeichers
DE2855118C2 (de) * 1978-12-20 1981-03-26 IBM Deutschland GmbH, 70569 Stuttgart Dynamischer FET-Speicher
EP0078338B1 (de) * 1981-10-30 1986-02-05 Ibm Deutschland Gmbh FET-Speicher
JP5034133B2 (ja) 2000-02-29 2012-09-26 富士通セミコンダクター株式会社 半導体記憶装置
JP4707244B2 (ja) * 2000-03-30 2011-06-22 ルネサスエレクトロニクス株式会社 半導体記憶装置および半導体装置
TWI359422B (en) 2008-04-15 2012-03-01 Faraday Tech Corp 2t sram and associated cell structure

Also Published As

Publication number Publication date
FR2276659B1 (en, 2012) 1980-01-04
JPS5428252B2 (en, 2012) 1979-09-14
IT1038100B (it) 1979-11-20
CH581885A5 (en, 2012) 1976-11-15
FR2276659A1 (fr) 1976-01-23
DE2431079B2 (de) 1979-04-26
GB1502334A (en) 1978-03-01
DE2431079A1 (de) 1976-02-12
JPS513824A (en, 2012) 1976-01-13

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Legal Events

Date Code Title Description
C3 Grant after two publication steps (3rd publication)
8339 Ceased/non-payment of the annual fee