FR2276659A1 - Memoire dynamique a semi-conducteurs comportant des elements d'emmagasinage a deux dispositifs - Google Patents
Memoire dynamique a semi-conducteurs comportant des elements d'emmagasinage a deux dispositifsInfo
- Publication number
- FR2276659A1 FR2276659A1 FR7516563A FR7516563A FR2276659A1 FR 2276659 A1 FR2276659 A1 FR 2276659A1 FR 7516563 A FR7516563 A FR 7516563A FR 7516563 A FR7516563 A FR 7516563A FR 2276659 A1 FR2276659 A1 FR 2276659A1
- Authority
- FR
- France
- Prior art keywords
- semiconductor memory
- storage elements
- device storage
- dynamic semiconductor
- dynamic
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title 1
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/403—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh
- G11C11/404—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh with one charge-transfer gate, e.g. MOS transistor, per cell
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/409—Read-write [R-W] circuits
- G11C11/4097—Bit-line organisation, e.g. bit-line layout, folded bit lines
-
- H01L27/0733—
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Dram (AREA)
- Semiconductor Memories (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE2431079A DE2431079C3 (de) | 1974-06-28 | 1974-06-28 | Dynamischer Halbleiterspeicher mit Zwei-Transistor-Speicherelementen |
Publications (2)
Publication Number | Publication Date |
---|---|
FR2276659A1 true FR2276659A1 (fr) | 1976-01-23 |
FR2276659B1 FR2276659B1 (fr) | 1980-01-04 |
Family
ID=5919184
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR7516563A Granted FR2276659A1 (fr) | 1974-06-28 | 1975-05-23 | Memoire dynamique a semi-conducteurs comportant des elements d'emmagasinage a deux dispositifs |
Country Status (6)
Country | Link |
---|---|
JP (1) | JPS5428252B2 (fr) |
CH (1) | CH581885A5 (fr) |
DE (1) | DE2431079C3 (fr) |
FR (1) | FR2276659A1 (fr) |
GB (1) | GB1502334A (fr) |
IT (1) | IT1038100B (fr) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0012802A1 (fr) * | 1978-12-20 | 1980-07-09 | International Business Machines Corporation | Mémoire dynamique à semiconductor |
Families Citing this family (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5853512B2 (ja) * | 1976-02-13 | 1983-11-29 | 株式会社東芝 | 半導体記憶装置の製造方法 |
JPS5922316B2 (ja) * | 1976-02-24 | 1984-05-25 | 株式会社東芝 | ダイナミツクメモリ装置 |
US4040016A (en) * | 1976-03-31 | 1977-08-02 | International Business Machines Corporation | Twin nodes capacitance memory |
US4103342A (en) * | 1976-06-17 | 1978-07-25 | International Business Machines Corporation | Two-device memory cell with single floating capacitor |
CA1164710A (fr) * | 1978-05-09 | 1984-04-03 | Edward J. Reardon, Jr. | Compositions photosensibles phototropes contenant un agent colorant a base de fluoranne |
DE2837877C2 (de) * | 1978-08-30 | 1987-04-23 | Siemens AG, 1000 Berlin und 8000 München | Verfahren zur Herstellung eines MOS-integrierten Halbleiterspeichers |
DE3173745D1 (en) * | 1981-10-30 | 1986-03-20 | Ibm Deutschland | Fet memory |
JP5034133B2 (ja) * | 2000-02-29 | 2012-09-26 | 富士通セミコンダクター株式会社 | 半導体記憶装置 |
JP4707244B2 (ja) | 2000-03-30 | 2011-06-22 | ルネサスエレクトロニクス株式会社 | 半導体記憶装置および半導体装置 |
TWI359422B (en) | 2008-04-15 | 2012-03-01 | Faraday Tech Corp | 2t sram and associated cell structure |
-
1974
- 1974-06-28 DE DE2431079A patent/DE2431079C3/de not_active Expired
-
1975
- 1975-05-14 IT IT23304/75A patent/IT1038100B/it active
- 1975-05-21 JP JP5978375A patent/JPS5428252B2/ja not_active Expired
- 1975-05-21 GB GB21857/75A patent/GB1502334A/en not_active Expired
- 1975-05-22 CH CH657875A patent/CH581885A5/xx not_active IP Right Cessation
- 1975-05-23 FR FR7516563A patent/FR2276659A1/fr active Granted
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0012802A1 (fr) * | 1978-12-20 | 1980-07-09 | International Business Machines Corporation | Mémoire dynamique à semiconductor |
Also Published As
Publication number | Publication date |
---|---|
IT1038100B (it) | 1979-11-20 |
GB1502334A (en) | 1978-03-01 |
DE2431079C3 (de) | 1979-12-13 |
FR2276659B1 (fr) | 1980-01-04 |
JPS513824A (fr) | 1976-01-13 |
CH581885A5 (fr) | 1976-11-15 |
JPS5428252B2 (fr) | 1979-09-14 |
DE2431079A1 (de) | 1976-02-12 |
DE2431079B2 (de) | 1979-04-26 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
ST | Notification of lapse |