FR2289027A1 - Element de memoire dynamique a un transistor pour memoires fixes, et procede pour son exploitation - Google Patents

Element de memoire dynamique a un transistor pour memoires fixes, et procede pour son exploitation

Info

Publication number
FR2289027A1
FR2289027A1 FR7531833A FR7531833A FR2289027A1 FR 2289027 A1 FR2289027 A1 FR 2289027A1 FR 7531833 A FR7531833 A FR 7531833A FR 7531833 A FR7531833 A FR 7531833A FR 2289027 A1 FR2289027 A1 FR 2289027A1
Authority
FR
France
Prior art keywords
transistor
procedure
memory element
dynamic memory
fixed memories
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR7531833A
Other languages
English (en)
Other versions
FR2289027B1 (fr
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens AG
Original Assignee
Siemens AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens AG filed Critical Siemens AG
Publication of FR2289027A1 publication Critical patent/FR2289027A1/fr
Application granted granted Critical
Publication of FR2289027B1 publication Critical patent/FR2289027B1/fr
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C14/00—Digital stores characterised by arrangements of cells having volatile and non-volatile storage properties for back-up when the power is down
    • G11C14/0009—Digital stores characterised by arrangements of cells having volatile and non-volatile storage properties for back-up when the power is down in which the volatile element is a DRAM cell
    • G11C14/0018—Digital stores characterised by arrangements of cells having volatile and non-volatile storage properties for back-up when the power is down in which the volatile element is a DRAM cell whereby the nonvolatile element is an EEPROM element, e.g. a floating gate or metal-nitride-oxide-silicon [MNOS] transistor
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/403—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh
    • G11C11/404—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh with one charge-transfer gate, e.g. MOS transistor, per cell
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0466—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells with charge storage in an insulating layer, e.g. metal-nitride-oxide-silicon [MNOS], silicon-oxide-nitride-oxide-silicon [SONOS]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/07—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration the components having an active region in common
    • H01L27/0705—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration the components having an active region in common comprising components of the field effect type
    • H01L27/0727—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration the components having an active region in common comprising components of the field effect type in combination with diodes, or capacitors or resistors
    • H01L27/0733—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration the components having an active region in common comprising components of the field effect type in combination with diodes, or capacitors or resistors in combination with capacitors only
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Non-Volatile Memory (AREA)
  • Semiconductor Memories (AREA)
  • Read Only Memory (AREA)
  • Static Random-Access Memory (AREA)
  • Dram (AREA)
FR7531833A 1974-10-22 1975-10-17 Element de memoire dynamique a un transistor pour memoires fixes, et procede pour son exploitation Granted FR2289027A1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19742450116 DE2450116C2 (de) 1974-10-22 1974-10-22 Dynamisches Ein-Transistor-Speicherelement für nichtflüchtige Speicher und Verfahren zu seinem Betrieb

Publications (2)

Publication Number Publication Date
FR2289027A1 true FR2289027A1 (fr) 1976-05-21
FR2289027B1 FR2289027B1 (fr) 1978-04-07

Family

ID=5928844

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7531833A Granted FR2289027A1 (fr) 1974-10-22 1975-10-17 Element de memoire dynamique a un transistor pour memoires fixes, et procede pour son exploitation

Country Status (6)

Country Link
US (1) US4055837A (fr)
JP (1) JPS5857839B2 (fr)
DE (1) DE2450116C2 (fr)
FR (1) FR2289027A1 (fr)
GB (1) GB1517206A (fr)
NL (1) NL7512337A (fr)

Families Citing this family (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3986180A (en) * 1975-09-22 1976-10-12 International Business Machines Corporation Depletion mode field effect transistor memory system
US4149270A (en) * 1977-09-26 1979-04-10 Westinghouse Electric Corp. Variable threshold device memory circuit having automatic refresh feature
JPS5457875A (en) * 1977-10-17 1979-05-10 Hitachi Ltd Semiconductor nonvolatile memory device
JPS56110252A (en) * 1980-02-05 1981-09-01 Nippon Telegr & Teleph Corp <Ntt> Semiconductor memory device
GB2072417B (en) * 1980-03-19 1983-12-14 Plessey Co Ltd Semiconductor memory element
US4363110A (en) * 1980-12-22 1982-12-07 International Business Machines Corp. Non-volatile dynamic RAM cell
US4375085A (en) * 1981-01-02 1983-02-22 International Business Machines Corporation Dense electrically alterable read only memory
US4380803A (en) * 1981-02-10 1983-04-19 Burroughs Corporation Read-only/read-write memory
US4434478A (en) * 1981-11-27 1984-02-28 International Business Machines Corporation Programming floating gate devices
US4471471A (en) * 1981-12-31 1984-09-11 International Business Machines Corporation Non-volatile RAM device
US4446535A (en) * 1981-12-31 1984-05-01 International Business Machines Corporation Non-inverting non-volatile dynamic RAM cell
US4432072A (en) * 1981-12-31 1984-02-14 International Business Machines Corporation Non-volatile dynamic RAM cell
US4449205A (en) * 1982-02-19 1984-05-15 International Business Machines Corp. Dynamic RAM with non-volatile back-up storage and method of operation thereof
JPS59221893A (ja) * 1983-05-31 1984-12-13 Toshiba Corp 不揮発性半導体メモリ
JPS62266793A (ja) * 1986-05-13 1987-11-19 Mitsubishi Electric Corp 不揮発性半導体記憶装置
JP2731701B2 (ja) * 1993-06-30 1998-03-25 インターナショナル・ビジネス・マシーンズ・コーポレイション Ｄｒａｍセル
US5781487A (en) * 1995-04-27 1998-07-14 Lg Semicon Co., Ltd. Bit line selection circuit
US5640030A (en) * 1995-05-05 1997-06-17 International Business Machines Corporation Double dense ferroelectric capacitor cell memory
US5598367A (en) * 1995-06-07 1997-01-28 International Business Machines Corporation Trench EPROM
US6849909B1 (en) * 2000-09-28 2005-02-01 Intel Corporation Method and apparatus for weak inversion mode MOS decoupling capacitor
US6829166B2 (en) 2002-09-13 2004-12-07 Ememory Technology Inc. Method for controlling a non-volatile dynamic random access memory
EP1437742A1 (fr) * 2003-01-09 2004-07-14 eMemory Technology Inc. Méthode de commande d'une mémoire à accès aléatoire dynamique non volatile
KR100719178B1 (ko) * 2003-08-29 2007-05-17 주식회사 하이닉스반도체 비휘발성 디램의 구동방법
US9214465B2 (en) 2012-07-24 2015-12-15 Flashsilicon Incorporation Structures and operational methods of non-volatile dynamic random access memory devices

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3855581A (en) * 1971-12-30 1974-12-17 Mos Technology Inc Semiconductor device and circuits

Non-Patent Citations (6)

* Cited by examiner, † Cited by third party
Title
*REVUE US "COMPUTER DESIGN", VOLUME 14, NO. 4, AVRIL 1973, PAGE 38, ARTICLE "EXPERIMENTAL BK RAM USES SINGLE - DEVICE CELL" *
*REVUE US "RCA REVIEW", VOLUME 31, NO. 2, JUIN 1970, PAGES 342-354 *
ARTICLE "NONVOLATILE READ-MOSTLY MEMORY CELL" *
ARTICLE "OPTIMIZATION OF CHARGE STORAGE IN THE MNOS MEMORY DEVICE" PAR GOODMAN ET AUTRES) *
PAR DAVIDSON ET AUTRES *
REVUE US "IBM TECHNICAL DISCLOSURE BULLETIN", VOLUME 15, NO. 7, DECEMBRE 1972, PAGES 2282-2283 *

Also Published As

Publication number Publication date
NL7512337A (nl) 1976-04-26
DE2450116B1 (de) 1976-01-22
US4055837A (en) 1977-10-25
JPS5857839B2 (ja) 1983-12-22
JPS5165532A (fr) 1976-06-07
DE2450116C2 (de) 1976-09-16
FR2289027B1 (fr) 1978-04-07
GB1517206A (en) 1978-07-12

Similar Documents

Publication Publication Date Title
FR2289027A1 (fr) Element de memoire dynamique a un transistor pour memoires fixes, et procede pour son exploitation
BE799570A (fr) Memoire a semi-conducteurs a acces multidimensionnel,
NL7506922A (nl) Hierarchisch geheugenstelsel.
FR2340599A1 (fr) Memoire a acces aleatoire, dynamique
NL186783C (nl) Geheugenadresseringsinrichting.
BE788028A (fr) Memoire associative
BR7505284A (pt) Sistema de memoria de acesso aleatorio organizada por palavras
FR2276661A1 (fr) Procede test de memoires a semi-conducteur
NL7501534A (nl) Programmeerbaar leesgeheugen.
NL7712820A (nl) Dynamische geheugeninrichting.
BE777996A (fr) Dispositif a memoire effacable a effet de champ
NL7514642A (nl) Halfgeleidergeheugeninrichting.
BE820274A (fr) Memoire associative
BE770816A (fr) Dispositif de memoire a semi-conducteur
BE813374A (fr) Element de memoire a cinq transistors et procede pour son exploitation
FR2284165A1 (fr) Element de memoire dynamique a transistors
FR2306506A1 (fr) Memoire dynamique a semi-conducteur
DK130756B (da) Hukommelsesanordning med reservehukommelseselement.
NL7712819A (nl) Dynamische geheugeninrichting.
FR2303348A1 (fr) Dispositif de memoire dynamique a boucles
NL7513144A (nl) Informatiegeheugeninrichting.
NL7408203A (nl) Geheugeninrichting.
BE820602A (fr) Dispositif a memoire
BE800605A (fr) Dispositif memoire a semi-conducteur
BE792293A (fr) Dispositif de memoire a semi-conducteur

Legal Events

Date Code Title Description
ST Notification of lapse