DE2320420A1 - Verfahren zur herstellung eines leitfaehigen verbindungsmusters auf halbleiterschaltungen sowie nach dem verfahren hergestellte anordnungen - Google Patents
Verfahren zur herstellung eines leitfaehigen verbindungsmusters auf halbleiterschaltungen sowie nach dem verfahren hergestellte anordnungenInfo
- Publication number
- DE2320420A1 DE2320420A1 DE2320420A DE2320420A DE2320420A1 DE 2320420 A1 DE2320420 A1 DE 2320420A1 DE 2320420 A DE2320420 A DE 2320420A DE 2320420 A DE2320420 A DE 2320420A DE 2320420 A1 DE2320420 A1 DE 2320420A1
- Authority
- DE
- Germany
- Prior art keywords
- layer
- connection pattern
- areas
- semiconductor
- insulating layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims description 52
- 238000000034 method Methods 0.000 title claims description 29
- 238000004519 manufacturing process Methods 0.000 title claims description 4
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 36
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 23
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 22
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 22
- 239000000463 material Substances 0.000 claims description 18
- 235000012239 silicon dioxide Nutrition 0.000 claims description 18
- 239000000377 silicon dioxide Substances 0.000 claims description 18
- 230000005669 field effect Effects 0.000 claims description 10
- 239000002019 doping agent Substances 0.000 claims description 5
- 230000015572 biosynthetic process Effects 0.000 claims description 4
- 230000002401 inhibitory effect Effects 0.000 claims description 2
- 230000035515 penetration Effects 0.000 claims description 2
- 239000007858 starting material Substances 0.000 claims description 2
- 230000000875 corresponding effect Effects 0.000 claims 1
- 238000005530 etching Methods 0.000 description 17
- 229920005591 polysilicon Polymers 0.000 description 16
- 238000009792 diffusion process Methods 0.000 description 12
- 150000004767 nitrides Chemical class 0.000 description 7
- 229920002120 photoresistant polymer Polymers 0.000 description 7
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 6
- NBIIXXVUZAFLBC-UHFFFAOYSA-N Phosphoric acid Chemical compound OP(O)(O)=O NBIIXXVUZAFLBC-UHFFFAOYSA-N 0.000 description 6
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 5
- 229910052710 silicon Inorganic materials 0.000 description 5
- 239000010703 silicon Substances 0.000 description 5
- 238000002955 isolation Methods 0.000 description 4
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 3
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 3
- 229910000147 aluminium phosphate Inorganic materials 0.000 description 3
- 239000001257 hydrogen Substances 0.000 description 3
- 229910052739 hydrogen Inorganic materials 0.000 description 3
- 238000009413 insulation Methods 0.000 description 3
- 229910000077 silane Inorganic materials 0.000 description 3
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 2
- 230000004888 barrier function Effects 0.000 description 2
- 239000012535 impurity Substances 0.000 description 2
- 230000000873 masking effect Effects 0.000 description 2
- 229910052698 phosphorus Inorganic materials 0.000 description 2
- 239000011574 phosphorus Substances 0.000 description 2
- QGZKDVFQNNGYKY-UHFFFAOYSA-N Ammonia Chemical compound N QGZKDVFQNNGYKY-UHFFFAOYSA-N 0.000 description 1
- 239000002253 acid Substances 0.000 description 1
- 229910052785 arsenic Inorganic materials 0.000 description 1
- RQNWIZPPADIBDY-UHFFFAOYSA-N arsenic atom Chemical compound [As] RQNWIZPPADIBDY-UHFFFAOYSA-N 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 210000004556 brain Anatomy 0.000 description 1
- 239000012159 carrier gas Substances 0.000 description 1
- 239000002800 charge carrier Substances 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 239000000356 contaminant Substances 0.000 description 1
- 238000011109 contamination Methods 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 238000007598 dipping method Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 239000007789 gas Substances 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 238000012856 packing Methods 0.000 description 1
- 239000002244 precipitate Substances 0.000 description 1
- 230000001681 protective effect Effects 0.000 description 1
- 238000000926 separation method Methods 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 238000003860 storage Methods 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/60—Electrodes characterised by their materials
- H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
- H10D64/671—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes the conductor having lateral variation in doping or structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/482—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body (electrodes)
- H01L23/485—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body (electrodes) consisting of layered constructions comprising conductive layers and insulating layers, e.g. planar contacts
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/60—Electrodes characterised by their materials
- H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
- H10D64/661—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes the conductor comprising a layer of silicon contacting the insulator, e.g. polysilicon having vertical doping variation
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0198—Integrating together multiple components covered by H10D44/00, e.g. integrating charge coupled devices
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/02—Manufacture or treatment characterised by using material-based technologies
- H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
- H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D99/00—Subject matter not provided for in other groups of this subclass
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10F39/00—Integrated devices, or assemblies of multiple devices, comprising at least one element covered by group H10F30/00, e.g. radiation detectors comprising photodiode arrays
- H10F39/10—Integrated devices
- H10F39/12—Image sensors
- H10F39/15—Charge-coupled device [CCD] image sensors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1204—Optical Diode
- H01L2924/12044—OLED
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/934—Sheet resistance, i.e. dopant parameters
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- General Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Solid State Image Pick-Up Elements (AREA)
- Electrodes Of Semiconductors (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Semiconductor Integrated Circuits (AREA)
- Element Separation (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US00267860A US3810795A (en) | 1972-06-30 | 1972-06-30 | Method for making self-aligning structure for charge-coupled and bucket brigade devices |
Publications (1)
Publication Number | Publication Date |
---|---|
DE2320420A1 true DE2320420A1 (de) | 1974-01-17 |
Family
ID=23020423
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE2320420A Pending DE2320420A1 (de) | 1972-06-30 | 1973-04-21 | Verfahren zur herstellung eines leitfaehigen verbindungsmusters auf halbleiterschaltungen sowie nach dem verfahren hergestellte anordnungen |
Country Status (5)
Families Citing this family (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3967306A (en) * | 1973-08-01 | 1976-06-29 | Trw Inc. | Asymmetrical well charge coupled device |
US3927468A (en) * | 1973-12-28 | 1975-12-23 | Fairchild Camera Instr Co | Self aligned CCD element fabrication method therefor |
US3911560A (en) * | 1974-02-25 | 1975-10-14 | Fairchild Camera Instr Co | Method for manufacturing a semiconductor device having self-aligned implanted barriers with narrow gaps between electrodes |
US4053349A (en) * | 1976-02-02 | 1977-10-11 | Intel Corporation | Method for forming a narrow gap |
IT1089299B (it) * | 1977-01-26 | 1985-06-18 | Mostek Corp | Procedimento per fabbricare un dispositivo semiconduttore |
JPS5910581B2 (ja) * | 1977-12-01 | 1984-03-09 | 富士通株式会社 | 半導体装置の製造方法 |
US4933297A (en) * | 1989-10-12 | 1990-06-12 | At&T Bell Laboratories | Method for etching windows having different depths |
US7846760B2 (en) * | 2006-05-31 | 2010-12-07 | Kenet, Inc. | Doped plug for CCD gaps |
-
1972
- 1972-06-30 US US00267860A patent/US3810795A/en not_active Expired - Lifetime
-
1973
- 1973-04-21 DE DE2320420A patent/DE2320420A1/de active Pending
- 1973-05-25 JP JP5789673A patent/JPS5637707B2/ja not_active Expired
- 1973-05-30 GB GB2583073A patent/GB1425864A/en not_active Expired
- 1973-06-06 FR FR7321780A patent/FR2191269B1/fr not_active Expired
Also Published As
Publication number | Publication date |
---|---|
JPS4959581A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1974-06-10 |
FR2191269A1 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1974-02-01 |
GB1425864A (en) | 1976-02-18 |
JPS5637707B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1981-09-02 |
US3810795A (en) | 1974-05-14 |
FR2191269B1 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1977-09-09 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
DE2745857C2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | ||
DE4116690C2 (de) | Elementisolationsaufbau einer Halbleitereinrichtung und Verfahren zur Herstellung derselben | |
DE2502235C2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | ||
DE3019850C2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | ||
DE3881799T2 (de) | Verfahren zur Herstellung von CMOS-Bauelementen. | |
EP0071665B1 (de) | Verfahren zum Herstellen einer monolithisch integrierten Festkörperschaltung mit mindestens einem bipolaren Planartransistor | |
DE2335799A1 (de) | Sperrschicht-feldeffekttransistoren in dielektrisch isolierten mesas | |
DE2749607C3 (de) | Halbleiteranordnung und Verfahren zu deren Herstellung | |
DE2314260A1 (de) | Ladungsgekoppelte halbleiteranordnung und verfahren zu ihrer herstellung | |
DE3116268C2 (de) | Verfahren zur Herstellung einer Halbleiteranordnung | |
DE2605830A1 (de) | Verfahren zur herstellung von halbleiterbauelementen | |
DE3030385A1 (de) | Mos-halbleitervorrichtung und verfahren zur herstellung derselben | |
DE2922015A1 (de) | Verfahren zur herstellung einer vlsi-schaltung | |
DE2926334C2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | ||
DE4130555A1 (de) | Halbleitervorrichtung mit hoher durchbruchsspannung und geringem widerstand, sowie herstellungsverfahren | |
DE2729973A1 (de) | Verfahren zur herstellung einer halbleiteranordnung | |
DE1803024A1 (de) | Integriertes Halbleiterbauelement und Verfahren zu seiner Herstellung | |
DE2133976B2 (de) | Monolithisch integrierte Halbleiteranordnung | |
DE2320420A1 (de) | Verfahren zur herstellung eines leitfaehigen verbindungsmusters auf halbleiterschaltungen sowie nach dem verfahren hergestellte anordnungen | |
DE2541651C2 (de) | Verfahren zur Herstellung einer Ladungsübertragungsanordnung | |
DE2932928A1 (de) | Verfahren zur herstellung von vlsi-schaltungen | |
DE2141695B2 (de) | Verfahren zum herstellen eines monolithischen halbleiterbauelementes | |
WO2003015163A2 (de) | Verfahren zum parallelen herstellen eines mos-transistors und eines bipolartransistors | |
DE2525529B2 (de) | Halbleiteranordnung mit komplementaeren transistorstrukturen und verfahren zu ihrer herstellung | |
DE2535272A1 (de) | Festkoerperbauelement-herstellungsverfahren |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
OHJ | Non-payment of the annual fee |