DE2152225C3 - MHISFET mit mindestens zwei zwischen Gate-Elektrode und Kanal angeordneten Isolierschichten, und Verfahren zu seiner Herstellung - Google Patents

MHISFET mit mindestens zwei zwischen Gate-Elektrode und Kanal angeordneten Isolierschichten, und Verfahren zu seiner Herstellung

Info

Publication number
DE2152225C3
DE2152225C3 DE2152225A DE2152225A DE2152225C3 DE 2152225 C3 DE2152225 C3 DE 2152225C3 DE 2152225 A DE2152225 A DE 2152225A DE 2152225 A DE2152225 A DE 2152225A DE 2152225 C3 DE2152225 C3 DE 2152225C3
Authority
DE
Germany
Prior art keywords
clusters
silicon
germanium
insulating layer
insulating layers
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE2152225A
Other languages
German (de)
English (en)
Other versions
DE2152225A1 (de
DE2152225B2 (de
Inventor
Yuriko Sugimura
Syumpei Yamazaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
YAMAZAKI, SYUMPEI, SHIZUOKA, JP TDK CORPORATION, T
Original Assignee
TDK Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP7118228A external-priority patent/JPS5341513B2/ja
Application filed by TDK Corp filed Critical TDK Corp
Publication of DE2152225A1 publication Critical patent/DE2152225A1/de
Publication of DE2152225B2 publication Critical patent/DE2152225B2/de
Application granted granted Critical
Publication of DE2152225C3 publication Critical patent/DE2152225C3/de
Expired legal-status Critical Current

Links

Classifications

    • H10P14/69215—
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/29—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/29—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
    • H01L23/291—Oxides or nitrides or carbides, e.g. ceramics, glass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/68—Floating-gate IGFETs
    • H10D30/681—Floating-gate IGFETs having only two programming levels
    • H10D30/683—Floating-gate IGFETs having only two programming levels programmed by tunnelling of carriers, e.g. Fowler-Nordheim tunnelling
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D99/00—Subject matter not provided for in other groups of this subclass
    • H10P14/6309—
    • H10P14/6316—
    • H10P14/6322—
    • H10P14/6334—
    • H10P14/6682—
    • H10P14/69433—
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Ceramic Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Non-Volatile Memory (AREA)
  • Chemical Vapour Deposition (AREA)
  • Formation Of Insulating Films (AREA)
DE2152225A 1970-10-27 1971-10-20 MHISFET mit mindestens zwei zwischen Gate-Elektrode und Kanal angeordneten Isolierschichten, und Verfahren zu seiner Herstellung Expired DE2152225C3 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP45094482A JPS5036955B1 (enExample) 1970-10-27 1970-10-27
JP7118228A JPS5341513B2 (enExample) 1971-03-26 1971-03-26
JP1895971A JPS5641182B1 (enExample) 1970-10-27 1971-03-30

Publications (3)

Publication Number Publication Date
DE2152225A1 DE2152225A1 (de) 1972-05-10
DE2152225B2 DE2152225B2 (de) 1978-11-09
DE2152225C3 true DE2152225C3 (de) 1979-07-19

Family

ID=33101866

Family Applications (2)

Application Number Title Priority Date Filing Date
DE2152225A Expired DE2152225C3 (de) 1970-10-27 1971-10-20 MHISFET mit mindestens zwei zwischen Gate-Elektrode und Kanal angeordneten Isolierschichten, und Verfahren zu seiner Herstellung
DE19722214305 Pending DE2214305A1 (de) 1970-10-27 1972-03-24 Verfahren zur Herstellung einer insbesondere für Speicherzwecke geeigneten Halbleitervorrichtung

Family Applications After (1)

Application Number Title Priority Date Filing Date
DE19722214305 Pending DE2214305A1 (de) 1970-10-27 1972-03-24 Verfahren zur Herstellung einer insbesondere für Speicherzwecke geeigneten Halbleitervorrichtung

Country Status (2)

Country Link
JP (2) JPS5036955B1 (enExample)
DE (2) DE2152225C3 (enExample)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5228200U (enExample) * 1975-08-16 1977-02-26
JP3613594B2 (ja) * 1993-08-19 2005-01-26 株式会社ルネサステクノロジ 半導体素子およびこれを用いた半導体記憶装置
US5508543A (en) * 1994-04-29 1996-04-16 International Business Machines Corporation Low voltage memory
DE19726085A1 (de) * 1997-06-19 1998-12-24 Siemens Ag Nichtflüchtige Speicherzelle
US7402850B2 (en) 2005-06-21 2008-07-22 Micron Technology, Inc. Back-side trapped non-volatile memory device
US7829938B2 (en) * 2005-07-14 2010-11-09 Micron Technology, Inc. High density NAND non-volatile memory device
KR102767720B1 (ko) * 2016-12-01 2025-02-17 솔브레인 주식회사 화학적 기계적 연마를 위한 통합형 슬러리 조성물 및 이를 이용한 연마 방법

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5120346B2 (enExample) * 1972-06-23 1976-06-24
JPS5532040B2 (enExample) * 1973-08-09 1980-08-22
JPS5120872A (en) * 1974-08-13 1976-02-19 Tokyo Gas Co Ltd Ichodenaiondobunpu nyoru gosa o hoshosuru henisokuteiho

Also Published As

Publication number Publication date
DE2152225A1 (de) 1972-05-10
DE2152225B2 (de) 1978-11-09
JPS5641182B1 (enExample) 1981-09-26
DE2214305A1 (de) 1972-10-05
JPS5036955B1 (enExample) 1975-11-28

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Legal Events

Date Code Title Description
C3 Grant after two publication steps (3rd publication)
EI Miscellaneous see part 3
XX Miscellaneous:

Free format text: DAS ERSTE WORT DER BEZEICHNUNG MUSS RICHTIG LAUTEN:HISFET

8327 Change in the person/name/address of the patent owner

Owner name: YAMAZAKI, SYUMPEI, SHIZUOKA, JP TDK CORPORATION, T