DE2144436C2 - Integrierte Festkörperschaltung zum Einstellen der effektiven Schwellenspannung eines Isolierschicht-Feldeffekttransistors - Google Patents

Integrierte Festkörperschaltung zum Einstellen der effektiven Schwellenspannung eines Isolierschicht-Feldeffekttransistors

Info

Publication number
DE2144436C2
DE2144436C2 DE2144436A DE2144436A DE2144436C2 DE 2144436 C2 DE2144436 C2 DE 2144436C2 DE 2144436 A DE2144436 A DE 2144436A DE 2144436 A DE2144436 A DE 2144436A DE 2144436 C2 DE2144436 C2 DE 2144436C2
Authority
DE
Germany
Prior art keywords
field effect
transistor
gate
voltage
layer field
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE2144436A
Other languages
German (de)
English (en)
Other versions
DE2144436A1 (de
Inventor
Fritz Günter Dipl.-Phys.Dr.rer.nat. 7800 Freiburg Adam
Wolfgang 7803 Gundelfingen Gollinger
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
TDK Micronas GmbH
Original Assignee
Deutsche ITT Industries GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Deutsche ITT Industries GmbH filed Critical Deutsche ITT Industries GmbH
Priority to DE2144436A priority Critical patent/DE2144436C2/de
Priority to IT28438/72A priority patent/IT964201B/it
Priority to AU46034/72A priority patent/AU4603472A/en
Priority to FR7231040A priority patent/FR2152031A5/fr
Priority to JP47088001A priority patent/JPS4834677A/ja
Publication of DE2144436A1 publication Critical patent/DE2144436A1/de
Application granted granted Critical
Publication of DE2144436C2 publication Critical patent/DE2144436C2/de
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/094Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
    • H03K19/0944Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET
    • H03K19/09441Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET of the same canal type
    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05FSYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F3/00Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
    • G05F3/02Regulating voltage or current
    • G05F3/08Regulating voltage or current wherein the variable is DC
    • G05F3/10Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics
    • G05F3/16Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics being semiconductor devices
    • G05F3/20Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
    • G05F3/205Substrate bias-voltage generators
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K17/00Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/14Modifications for compensating variations of physical values, e.g. of temperature
    • H03K17/145Modifications for compensating variations of physical values, e.g. of temperature in field-effect transistor switches
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/094Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
    • H03K19/0944Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • H10D84/83135Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET] the IGFETs characterised by having different gate conductor materials or different gate conductor implants

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Computing Systems (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Nonlinear Science (AREA)
  • Electromagnetism (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Automation & Control Theory (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)
DE2144436A 1971-09-04 1971-09-04 Integrierte Festkörperschaltung zum Einstellen der effektiven Schwellenspannung eines Isolierschicht-Feldeffekttransistors Expired DE2144436C2 (de)

Priority Applications (5)

Application Number Priority Date Filing Date Title
DE2144436A DE2144436C2 (de) 1971-09-04 1971-09-04 Integrierte Festkörperschaltung zum Einstellen der effektiven Schwellenspannung eines Isolierschicht-Feldeffekttransistors
IT28438/72A IT964201B (it) 1971-09-04 1972-08-24 Circuito integrabile allo stato solido atto a controllare ovvero a regolare la tensione di soglia effettiva di un transistore ad ef fetto di campo ad isolamento di porta
AU46034/72A AU4603472A (en) 1971-09-04 1972-08-28 Solid state circuit
FR7231040A FR2152031A5 (enExample) 1971-09-04 1972-09-01
JP47088001A JPS4834677A (enExample) 1971-09-04 1972-09-04

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE2144436A DE2144436C2 (de) 1971-09-04 1971-09-04 Integrierte Festkörperschaltung zum Einstellen der effektiven Schwellenspannung eines Isolierschicht-Feldeffekttransistors

Publications (2)

Publication Number Publication Date
DE2144436A1 DE2144436A1 (de) 1973-03-08
DE2144436C2 true DE2144436C2 (de) 1983-01-20

Family

ID=5818710

Family Applications (1)

Application Number Title Priority Date Filing Date
DE2144436A Expired DE2144436C2 (de) 1971-09-04 1971-09-04 Integrierte Festkörperschaltung zum Einstellen der effektiven Schwellenspannung eines Isolierschicht-Feldeffekttransistors

Country Status (5)

Country Link
JP (1) JPS4834677A (enExample)
AU (1) AU4603472A (enExample)
DE (1) DE2144436C2 (enExample)
FR (1) FR2152031A5 (enExample)
IT (1) IT964201B (enExample)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CH614837B (fr) 1977-07-08 Ebauches Sa Dispositif pour regler, a une valeur determinee, la tension de seuil de transistors igfet d'un circuit integre par polarisation du substrat d'integration.
US4214962A (en) * 1978-07-21 1980-07-29 Pincon Andrew J Activated oxygen product and water treatment using same
DE2844878A1 (de) * 1978-10-14 1980-04-30 Itt Ind Gmbh Deutsche Integrierbarer isolierschicht-feldeffekttransistor
CH628462A5 (fr) * 1978-12-22 1982-02-26 Centre Electron Horloger Source de tension de reference.
JPS5714216A (en) * 1980-06-30 1982-01-25 Mitsubishi Electric Corp Input protecting circuit

Also Published As

Publication number Publication date
FR2152031A5 (enExample) 1973-04-20
IT964201B (it) 1974-01-21
AU4603472A (en) 1974-03-07
JPS4834677A (enExample) 1973-05-21
DE2144436A1 (de) 1973-03-08

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Legal Events

Date Code Title Description
OD Request for examination
OF Willingness to grant licences before publication of examined application
D2 Grant after examination
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee