DE2132099C3 - Verfahren zur Herstellung eines Musters sich kreuzender oder überlappender elektrisch leitender Verbindungen - Google Patents

Verfahren zur Herstellung eines Musters sich kreuzender oder überlappender elektrisch leitender Verbindungen

Info

Publication number
DE2132099C3
DE2132099C3 DE2132099A DE2132099A DE2132099C3 DE 2132099 C3 DE2132099 C3 DE 2132099C3 DE 2132099 A DE2132099 A DE 2132099A DE 2132099 A DE2132099 A DE 2132099A DE 2132099 C3 DE2132099 C3 DE 2132099C3
Authority
DE
Germany
Prior art keywords
conductive
layer
pattern
thickness
lower conductive
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE2132099A
Other languages
German (de)
English (en)
Other versions
DE2132099A1 (de
DE2132099B2 (de
Inventor
G E Smith
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
AT&T Corp
Original Assignee
Western Electric Co Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Western Electric Co Inc filed Critical Western Electric Co Inc
Publication of DE2132099A1 publication Critical patent/DE2132099A1/de
Publication of DE2132099B2 publication Critical patent/DE2132099B2/de
Application granted granted Critical
Publication of DE2132099C3 publication Critical patent/DE2132099C3/de
Expired legal-status Critical Current

Links

Classifications

    • H10W20/40—
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N97/00—Electric solid-state thin-film or thick-film devices, not otherwise provided for
    • H10P50/667—
    • H10P95/00—
    • H10W20/062—
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/041—Doping control in crystal growth
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/042—Doping, graded, for tapered etching
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/049—Equivalence and options
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/051—Etching
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/067—Graded energy gap
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/122—Polycrystalline

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Weting (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
DE2132099A 1970-06-29 1971-06-28 Verfahren zur Herstellung eines Musters sich kreuzender oder überlappender elektrisch leitender Verbindungen Expired DE2132099C3 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US5078070A 1970-06-29 1970-06-29

Publications (3)

Publication Number Publication Date
DE2132099A1 DE2132099A1 (de) 1972-01-05
DE2132099B2 DE2132099B2 (de) 1979-10-11
DE2132099C3 true DE2132099C3 (de) 1983-12-01

Family

ID=21967382

Family Applications (1)

Application Number Title Priority Date Filing Date
DE2132099A Expired DE2132099C3 (de) 1970-06-29 1971-06-28 Verfahren zur Herstellung eines Musters sich kreuzender oder überlappender elektrisch leitender Verbindungen

Country Status (9)

Country Link
US (1) US3675319A (OSRAM)
JP (1) JPS557018B1 (OSRAM)
BE (1) BE768899A (OSRAM)
CA (1) CA922425A (OSRAM)
DE (1) DE2132099C3 (OSRAM)
FR (1) FR2096566B1 (OSRAM)
GB (1) GB1348731A (OSRAM)
NL (1) NL174413C (OSRAM)
SE (1) SE373983B (OSRAM)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3936331A (en) * 1974-04-01 1976-02-03 Fairchild Camera And Instrument Corporation Process for forming sloped topography contact areas between polycrystalline silicon and single-crystal silicon
GB1501114A (en) * 1974-04-25 1978-02-15 Rca Corp Method of making a semiconductor device
US4181564A (en) * 1978-04-24 1980-01-01 Bell Telephone Laboratories, Incorporated Fabrication of patterned silicon nitride insulating layers having gently sloping sidewalls
US4354309A (en) * 1978-12-29 1982-10-19 International Business Machines Corp. Method of manufacturing a metal-insulator-semiconductor device utilizing a graded deposition of polycrystalline silicon
US5285571A (en) * 1992-10-13 1994-02-15 General Electric Company Method for extending an electrical conductor over an edge of an HDI substrate
DE19649972C2 (de) * 1996-11-22 2002-11-07 Siemens Ag Verfahren zur Herstellung eines Leitungssatzes für Kraftfahrzeuge
US20140264340A1 (en) * 2013-03-14 2014-09-18 Sandia Corporation Reversible hybridization of large surface area array electronics
US9905471B2 (en) * 2016-04-28 2018-02-27 Taiwan Semiconductor Manufacturing Co., Ltd. Integrated circuit structure and method forming trenches with different depths

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3260634A (en) * 1961-02-17 1966-07-12 Motorola Inc Method of etching a semiconductor wafer to provide tapered dice
NL285523A (OSRAM) * 1961-11-24
FR1379429A (fr) * 1963-01-31 1964-11-20 Motorola Inc Procédé d'isolement électrique pour circuits miniaturisés
DE1564896A1 (de) * 1966-08-30 1970-01-08 Telefunken Patent Halbleiteranordnung
BE758160A (fr) * 1969-10-31 1971-04-01 Fairchild Camera Instr Co Structure metallique a couches multiples et procede de fabrication d'une telle structure
JPS563951B2 (OSRAM) * 1973-05-15 1981-01-28

Also Published As

Publication number Publication date
NL174413C (nl) 1984-06-01
BE768899A (fr) 1971-11-03
US3675319A (en) 1972-07-11
JPS557018B1 (OSRAM) 1980-02-21
SE373983B (OSRAM) 1975-02-17
DE2132099A1 (de) 1972-01-05
GB1348731A (en) 1974-03-20
DE2132099B2 (de) 1979-10-11
CA922425A (en) 1973-03-06
FR2096566A1 (OSRAM) 1972-02-18
NL7108656A (OSRAM) 1971-12-31
NL174413B (nl) 1984-01-02
FR2096566B1 (OSRAM) 1975-02-07

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Legal Events

Date Code Title Description
OD Request for examination
8225 Change of the main classification

Ipc: H05K 3/46

8226 Change of the secondary classification

Ipc: H05K 3/10

8281 Inventor (new situation)

Free format text: SMITH, GEORGE ELWOOD, MURRAY HILL, N.J., US

C3 Grant after two publication steps (3rd publication)