DE2114566A1 - Verfahren zum Stabilisieren der elektrischen Eigenschaften von Halbleitereinrichtungen - Google Patents

Verfahren zum Stabilisieren der elektrischen Eigenschaften von Halbleitereinrichtungen

Info

Publication number
DE2114566A1
DE2114566A1 DE19712114566 DE2114566A DE2114566A1 DE 2114566 A1 DE2114566 A1 DE 2114566A1 DE 19712114566 DE19712114566 DE 19712114566 DE 2114566 A DE2114566 A DE 2114566A DE 2114566 A1 DE2114566 A1 DE 2114566A1
Authority
DE
Germany
Prior art keywords
semiconductor body
insulating layer
vacuum
heated
temperature
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
DE19712114566
Other languages
German (de)
English (en)
Inventor
James Wesley Clay N.Y. Sprague (V.StA.)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
General Electric Co
Original Assignee
General Electric Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by General Electric Co filed Critical General Electric Co
Publication of DE2114566A1 publication Critical patent/DE2114566A1/de
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D99/00—Subject matter not provided for in other groups of this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/65—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials
    • H10P14/6516—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed after formation of the materials
    • H10P14/6529—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed after formation of the materials by exposure to a gas or vapour
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/69—Inorganic materials
    • H10P14/692—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses
    • H10P14/6921—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon
    • H10P14/69215—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon the material being a silicon oxide, e.g. SiO2
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • H10P95/90—Thermal treatments, e.g. annealing or sintering

Landscapes

  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Formation Of Insulating Films (AREA)
DE19712114566 1970-04-01 1971-03-25 Verfahren zum Stabilisieren der elektrischen Eigenschaften von Halbleitereinrichtungen Pending DE2114566A1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US2462670A 1970-04-01 1970-04-01

Publications (1)

Publication Number Publication Date
DE2114566A1 true DE2114566A1 (de) 1971-10-21

Family

ID=21821569

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19712114566 Pending DE2114566A1 (de) 1970-04-01 1971-03-25 Verfahren zum Stabilisieren der elektrischen Eigenschaften von Halbleitereinrichtungen

Country Status (5)

Country Link
US (1) US3627589A (enExample)
JP (1) JPS5336313B1 (enExample)
DE (1) DE2114566A1 (enExample)
FR (1) FR2085776B1 (enExample)
GB (1) GB1349574A (enExample)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0001794A1 (de) * 1977-10-31 1979-05-16 International Business Machines Corporation Verfahren zum Herstellen einer gegetterten Halbleiterscheibe
FR2463510A1 (fr) * 1979-08-10 1981-02-20 Siemens Ag Procede pour reduire la densite des etats de surface rapides dans le cas de composants mos

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4140548A (en) * 1978-05-19 1979-02-20 Maruman Integrated Circuits Inc. MOS Semiconductor process utilizing a two-layer oxide forming technique
JPS5680139A (en) * 1979-12-05 1981-07-01 Chiyou Lsi Gijutsu Kenkyu Kumiai Manufacture of semiconductor device
DE3170327D1 (en) * 1980-11-06 1985-06-05 Nat Res Dev Annealing process for a thin-film semiconductor device and obtained devices
US4784975A (en) * 1986-10-23 1988-11-15 International Business Machines Corporation Post-oxidation anneal of silicon dioxide
US5786231A (en) * 1995-12-05 1998-07-28 Sandia Corporation Screening method for selecting semiconductor substrates having defects below a predetermined level in an oxide layer
US5830575A (en) * 1996-09-16 1998-11-03 Sandia National Laboratories Memory device using movement of protons

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3472703A (en) * 1963-06-06 1969-10-14 Hitachi Ltd Method for producing semiconductor devices
US3453154A (en) * 1966-06-17 1969-07-01 Globe Union Inc Process for establishing low zener breakdown voltages in semiconductor regulators

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0001794A1 (de) * 1977-10-31 1979-05-16 International Business Machines Corporation Verfahren zum Herstellen einer gegetterten Halbleiterscheibe
FR2463510A1 (fr) * 1979-08-10 1981-02-20 Siemens Ag Procede pour reduire la densite des etats de surface rapides dans le cas de composants mos
DE2932569A1 (de) * 1979-08-10 1981-02-26 Siemens Ag Verfahren zur reduzierung der dichte der schnellen oberflaechenzustaende bei mos-bauelementen

Also Published As

Publication number Publication date
FR2085776B1 (enExample) 1977-01-28
US3627589A (en) 1971-12-14
FR2085776A1 (enExample) 1971-12-31
GB1349574A (en) 1974-04-03
JPS5336313B1 (enExample) 1978-10-02

Similar Documents

Publication Publication Date Title
DE3311635C2 (enExample)
DE2317577C2 (de) Verfahren zur Herstellung dielektrisch isolierter Halbleiteranordnungen
DE69031447T2 (de) Verfahren zur Herstellung von MIS-Halbleiterbauelementen
DE3587798T2 (de) SoI-Halbleiteranordnung und Verfahren zu ihrer Herstellung.
DE3688758T2 (de) Dünnfilmtransistor auf isolierendem Substrat.
DE69319759T2 (de) Verfahren zum schnellen Plasma-Hydrogenieren für MOSFET aus Polysilizium
DE2916364C2 (enExample)
DE2934582C2 (de) Verfahren zum Herstellen eines nichtflüchtigen Speichers
DE1764281C3 (de) Verfahren zum Herstellen einer Halbleitervorrichtung
EP0025854B1 (de) Verfahren zum Herstellen von bipolaren Transistoren
EP0001574B1 (de) Halbleiteranordnung für Widerstandsstrukturen in hochintegrierten Schaltkreisen und Verfahren zur Herstellung dieser Halbleiteranordnung
DE2754229A1 (de) Leistungsbauelement vom mosfet-typ und zugehoeriges herstellungsverfahren
DE2539073B2 (de) Feldeffekt-Transistor mit isolierter Gate-Elektrode und Verfahren zu dessen Herstellung
DE112019000292T5 (de) Halbleitervorrichtung und verfahren zu ihrer herstellung
DE2223699A1 (de) Dielektrisch isolierte Halbleiteranordnung und Verfahren zur Herstellung
DE1614356A1 (de) Integrierte Halbleiterbaugruppe mit komplementaeren Feldeffekttransistoren
DE3636249A1 (de) Verfahren zum herstellen eines mos-feldeffekttransistors und danach hergestellter transistor
DE1764847B2 (de) Verfahren zum Herstellen einer Halbleiteranordnung
DE3046358C2 (de) Feldeffekttransistor in Dünnfilmausbildung
DE2128884A1 (de) Verfahren zum Herstellen von Halbleiterbauteilen
DE2911484C2 (de) Metall-Isolator-Halbleiterbauelement
DE2453279C3 (de) Halbleiteranordnung
DE4244115C2 (de) Halbleitervorrichtung und Verfahren zum Herstellen der Halbleitervorrichtung
DE2133979B2 (de) Verfahren zur Herstellung einer Halbleiteranordnung
DE2114566A1 (de) Verfahren zum Stabilisieren der elektrischen Eigenschaften von Halbleitereinrichtungen