DE2060333C3 - Verfahren zur Herstellung einer Halbleiteranordnung mit einem Feldeffekttransistor mit isolierter Gateelektrode - Google Patents

Verfahren zur Herstellung einer Halbleiteranordnung mit einem Feldeffekttransistor mit isolierter Gateelektrode

Info

Publication number
DE2060333C3
DE2060333C3 DE2060333A DE2060333A DE2060333C3 DE 2060333 C3 DE2060333 C3 DE 2060333C3 DE 2060333 A DE2060333 A DE 2060333A DE 2060333 A DE2060333 A DE 2060333A DE 2060333 C3 DE2060333 C3 DE 2060333C3
Authority
DE
Germany
Prior art keywords
layer
gate electrode
source
electrode layers
parts
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE2060333A
Other languages
German (de)
English (en)
Other versions
DE2060333A1 (de
DE2060333B2 (de
Inventor
John Martin Reigate Surrey Shannon (Grossbritannien)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Koninklijke Philips NV
Original Assignee
Philips Gloeilampenfabrieken NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Philips Gloeilampenfabrieken NV filed Critical Philips Gloeilampenfabrieken NV
Publication of DE2060333A1 publication Critical patent/DE2060333A1/de
Publication of DE2060333B2 publication Critical patent/DE2060333B2/de
Application granted granted Critical
Publication of DE2060333C3 publication Critical patent/DE2060333C3/de
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/02Contacts, special
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/053Field effect transistors fets

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Thin Film Transistor (AREA)
DE2060333A 1969-12-24 1970-12-08 Verfahren zur Herstellung einer Halbleiteranordnung mit einem Feldeffekttransistor mit isolierter Gateelektrode Expired DE2060333C3 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB6290969 1969-12-24

Publications (3)

Publication Number Publication Date
DE2060333A1 DE2060333A1 (de) 1971-07-01
DE2060333B2 DE2060333B2 (de) 1977-10-13
DE2060333C3 true DE2060333C3 (de) 1978-06-01

Family

ID=10488614

Family Applications (1)

Application Number Title Priority Date Filing Date
DE2060333A Expired DE2060333C3 (de) 1969-12-24 1970-12-08 Verfahren zur Herstellung einer Halbleiteranordnung mit einem Feldeffekttransistor mit isolierter Gateelektrode

Country Status (11)

Country Link
US (1) US3739237A (es)
JP (1) JPS4827506B1 (es)
AT (1) AT323809B (es)
BE (1) BE760707A (es)
CH (1) CH519791A (es)
DE (1) DE2060333C3 (es)
ES (1) ES386734A1 (es)
FR (1) FR2073494B1 (es)
GB (1) GB1289740A (es)
NL (1) NL7018547A (es)
SE (1) SE355696B (es)

Families Citing this family (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
USRE28952E (en) * 1971-03-17 1976-08-31 Rca Corporation Shaped riser on substrate step for promoting metal film continuity
FR2184535B1 (es) * 1972-05-19 1980-03-21 Commissariat Energie Atomique
US3895392A (en) * 1973-04-05 1975-07-15 Signetics Corp Bipolar transistor structure having ion implanted region and method
US3947866A (en) * 1973-06-25 1976-03-30 Signetics Corporation Ion implanted resistor having controlled temperature coefficient and method
US4065847A (en) * 1974-01-04 1978-01-03 Commissariat A L'energie Atomique Method of fabrication of a charge-coupled device
FR2257145B1 (es) * 1974-01-04 1976-11-26 Commissariat Energie Atomique
JPS5532032B2 (es) * 1975-02-20 1980-08-22
JPS52156576A (en) * 1976-06-23 1977-12-27 Hitachi Ltd Production of mis semiconductor device
DE2631873C2 (de) * 1976-07-15 1986-07-31 Siemens AG, 1000 Berlin und 8000 München Verfahren zur Herstellung eines Halbleiterbauelements mit einem Schottky-Kontakt auf einem zu einem anderen Bereich justierten Gatebereich und mit kleinem Serienwiderstand
US4224733A (en) * 1977-10-11 1980-09-30 Fujitsu Limited Ion implantation method
US4190466A (en) * 1977-12-22 1980-02-26 International Business Machines Corporation Method for making a bipolar transistor structure utilizing self-passivating diffusion sources
JPS5553462A (en) * 1978-10-13 1980-04-18 Int Rectifier Corp Mosfet element
US5191396B1 (en) * 1978-10-13 1995-12-26 Int Rectifier Corp High power mosfet with low on-resistance and high breakdown voltage
US4523368A (en) * 1980-03-03 1985-06-18 Raytheon Company Semiconductor devices and manufacturing methods
JPS5827363A (ja) * 1981-08-10 1983-02-18 Fujitsu Ltd 電界効果トランジスタの製造法
US4499653A (en) * 1983-11-03 1985-02-19 Westinghouse Electric Corp. Small dimension field effect transistor using phosphorous doped silicon glass reflow process
NL8400789A (nl) * 1984-03-13 1985-10-01 Philips Nv Werkwijze omvattende het gelijktijdig vervaardigen van halfgeleidergebieden met verschillende dotering.
US4748103A (en) * 1986-03-21 1988-05-31 Advanced Power Technology Mask-surrogate semiconductor process employing dopant protective region
US5139869A (en) * 1988-09-01 1992-08-18 Wolfgang Euen Thin dielectric layer on a substrate
US5169796A (en) * 1991-09-19 1992-12-08 Teledyne Industries, Inc. Process for fabricating self-aligned metal gate field effect transistors
US5869371A (en) * 1995-06-07 1999-02-09 Stmicroelectronics, Inc. Structure and process for reducing the on-resistance of mos-gated power devices
US5843827A (en) * 1996-09-30 1998-12-01 Lucent Technologies Inc. Method of reducing dielectric damage from plasma etch charging
US5869727A (en) * 1997-08-08 1999-02-09 Osi Specialties, Inc. Vacuum process for the manufacture of siloxane-oxyalkylene copolymers
JP3769208B2 (ja) * 2001-06-04 2006-04-19 株式会社東芝 半導体装置の製造方法と半導体装置

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3451912A (en) * 1966-07-15 1969-06-24 Ibm Schottky-barrier diode formed by sputter-deposition processes
US3472712A (en) * 1966-10-27 1969-10-14 Hughes Aircraft Co Field-effect device with insulated gate
GB1244225A (en) * 1968-12-31 1971-08-25 Associated Semiconductor Mft Improvements in and relating to methods of manufacturing semiconductor devices

Also Published As

Publication number Publication date
US3739237A (en) 1973-06-12
GB1289740A (es) 1972-09-20
DE2060333A1 (de) 1971-07-01
FR2073494B1 (es) 1975-01-10
DE2060333B2 (de) 1977-10-13
FR2073494A1 (es) 1971-10-01
SE355696B (es) 1973-04-30
NL7018547A (es) 1971-06-28
BE760707A (fr) 1971-06-22
ES386734A1 (es) 1973-03-16
AT323809B (de) 1975-07-25
CH519791A (de) 1972-02-29
JPS4827506B1 (es) 1973-08-23

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Legal Events

Date Code Title Description
C3 Grant after two publication steps (3rd publication)
8339 Ceased/non-payment of the annual fee