DE2059116C3 - Verfahren zur Herstellung eines Halbleiterbauelementes - Google Patents

Verfahren zur Herstellung eines Halbleiterbauelementes

Info

Publication number
DE2059116C3
DE2059116C3 DE2059116A DE2059116A DE2059116C3 DE 2059116 C3 DE2059116 C3 DE 2059116C3 DE 2059116 A DE2059116 A DE 2059116A DE 2059116 A DE2059116 A DE 2059116A DE 2059116 C3 DE2059116 C3 DE 2059116C3
Authority
DE
Germany
Prior art keywords
substrate
semiconductor
manufacturing
layer
electrically insulating
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE2059116A
Other languages
German (de)
English (en)
Other versions
DE2059116B2 (de
DE2059116A1 (de
Inventor
Heinrich Dipl.-Phys. Dr. 8019 Ebersberg Schloetterer
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens AG
Original Assignee
Siemens AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens AG filed Critical Siemens AG
Priority to DE2059116A priority Critical patent/DE2059116C3/de
Priority to NL7115760A priority patent/NL7115760A/xx
Priority to IT31678/71A priority patent/IT941388B/it
Priority to LU64363D priority patent/LU64363A1/xx
Priority to BE775973A priority patent/BE775973A/xx
Priority to FR7142813A priority patent/FR2116424A1/fr
Priority to GB5585371A priority patent/GB1358438A/en
Publication of DE2059116A1 publication Critical patent/DE2059116A1/de
Publication of DE2059116B2 publication Critical patent/DE2059116B2/de
Application granted granted Critical
Publication of DE2059116C3 publication Critical patent/DE2059116C3/de
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/01—Manufacture or treatment
    • H10D86/03—Manufacture or treatment wherein the substrate comprises sapphire, e.g. silicon-on-sapphire [SOS]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D99/00—Subject matter not provided for in other groups of this subclass
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Recrystallisation Techniques (AREA)
  • Element Separation (AREA)
DE2059116A 1970-12-01 1970-12-01 Verfahren zur Herstellung eines Halbleiterbauelementes Expired DE2059116C3 (de)

Priority Applications (7)

Application Number Priority Date Filing Date Title
DE2059116A DE2059116C3 (de) 1970-12-01 1970-12-01 Verfahren zur Herstellung eines Halbleiterbauelementes
NL7115760A NL7115760A (enExample) 1970-12-01 1971-11-16
IT31678/71A IT941388B (it) 1970-12-01 1971-11-26 Procedimento per fabbricare un componente a semiconduttor
BE775973A BE775973A (fr) 1970-12-01 1971-11-29 Procede de realisation d'un composant semi-conducteur a substrat isolant recouvert partiellement d'une couche semi-conductrice
LU64363D LU64363A1 (enExample) 1970-12-01 1971-11-29
FR7142813A FR2116424A1 (enExample) 1970-12-01 1971-11-30
GB5585371A GB1358438A (en) 1970-12-01 1971-12-01 Process for the manufacture of a semiconductor component or an integrated semiconductor circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE2059116A DE2059116C3 (de) 1970-12-01 1970-12-01 Verfahren zur Herstellung eines Halbleiterbauelementes

Publications (3)

Publication Number Publication Date
DE2059116A1 DE2059116A1 (de) 1972-07-06
DE2059116B2 DE2059116B2 (de) 1974-04-25
DE2059116C3 true DE2059116C3 (de) 1974-11-21

Family

ID=5789659

Family Applications (1)

Application Number Title Priority Date Filing Date
DE2059116A Expired DE2059116C3 (de) 1970-12-01 1970-12-01 Verfahren zur Herstellung eines Halbleiterbauelementes

Country Status (7)

Country Link
BE (1) BE775973A (enExample)
DE (1) DE2059116C3 (enExample)
FR (1) FR2116424A1 (enExample)
GB (1) GB1358438A (enExample)
IT (1) IT941388B (enExample)
LU (1) LU64363A1 (enExample)
NL (1) NL7115760A (enExample)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2284981A1 (fr) * 1974-09-10 1976-04-09 Radiotechnique Compelec Procede d'obtention d'un circuit integre semiconducteur
JPS5674921A (en) 1979-11-22 1981-06-20 Toshiba Corp Manufacturing method of semiconductor and apparatus thereof
US5273616A (en) * 1980-04-10 1993-12-28 Massachusetts Institute Of Technology Method of producing sheets of crystalline material and devices made therefrom
US4549926A (en) * 1982-01-12 1985-10-29 Rca Corporation Method for growing monocrystalline silicon on a mask layer
IN157312B (enExample) * 1982-01-12 1986-03-01 Rca Corp
US4482422A (en) * 1982-02-26 1984-11-13 Rca Corporation Method for growing a low defect monocrystalline layer on a mask
GB2142185A (en) * 1983-06-22 1985-01-09 Rca Corp Mosfet fabrication method
US4578142A (en) * 1984-05-10 1986-03-25 Rca Corporation Method for growing monocrystalline silicon through mask layer
US4704186A (en) * 1986-02-19 1987-11-03 Rca Corporation Recessed oxide method for making a silicon-on-insulator substrate
AU623863B2 (en) * 1987-08-24 1992-05-28 Canon Kabushiki Kaisha Method of forming crystals
GB2228617A (en) * 1989-02-27 1990-08-29 Philips Electronic Associated A method of manufacturing a semiconductor device having a mesa structure
TW205603B (enExample) * 1990-09-21 1993-05-11 Anelva Corp

Also Published As

Publication number Publication date
BE775973A (fr) 1972-03-16
GB1358438A (en) 1974-07-03
LU64363A1 (enExample) 1972-06-19
NL7115760A (enExample) 1972-06-05
FR2116424A1 (enExample) 1972-07-13
DE2059116B2 (de) 1974-04-25
IT941388B (it) 1973-03-01
DE2059116A1 (de) 1972-07-06

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Legal Events

Date Code Title Description
C3 Grant after two publication steps (3rd publication)
E77 Valid patent as to the heymanns-index 1977
EHJ Ceased/non-payment of the annual fee