DE2028422A1 - Verfahren zum Passivieren von Halbleiterbauelementen, insbesondere von Feldeffekttransistoren - Google Patents

Verfahren zum Passivieren von Halbleiterbauelementen, insbesondere von Feldeffekttransistoren

Info

Publication number
DE2028422A1
DE2028422A1 DE19702028422 DE2028422A DE2028422A1 DE 2028422 A1 DE2028422 A1 DE 2028422A1 DE 19702028422 DE19702028422 DE 19702028422 DE 2028422 A DE2028422 A DE 2028422A DE 2028422 A1 DE2028422 A1 DE 2028422A1
Authority
DE
Germany
Prior art keywords
layer
silicon dioxide
phosphorus
field effect
silicon
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
DE19702028422
Other languages
German (de)
English (en)
Inventor
Lawrence Vincent Wappinger Falls; Maissei Leon Israel Pough keepsie.Y.(V.St A) Gregor
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of DE2028422A1 publication Critical patent/DE2028422A1/de
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/69—Inorganic materials
    • H10P14/692—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses
    • H10P14/6921—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon
    • H10P14/69215—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon the material being a silicon oxide, e.g. SiO2
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P36/00—Gettering within semiconductor bodies
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/40—Encapsulations, e.g. protective coatings characterised by their materials
    • H10W74/43—Encapsulations, e.g. protective coatings characterised by their materials comprising oxides, nitrides or carbides, e.g. ceramics or glasses
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/69—Inorganic materials
    • H10P14/692—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses
    • H10P14/6938—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses the material containing at least one metal element, e.g. metal oxides, metal oxynitrides or metal oxycarbides
    • H10P14/6939—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses the material containing at least one metal element, e.g. metal oxides, metal oxynitrides or metal oxycarbides characterised by the metal
    • H10P14/69391—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses the material containing at least one metal element, e.g. metal oxides, metal oxynitrides or metal oxycarbides characterised by the metal the material containing aluminium, e.g. Al2O3
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/69—Inorganic materials
    • H10P14/694—Inorganic materials composed of nitrides
    • H10P14/6943—Inorganic materials composed of nitrides containing silicon
    • H10P14/69433—Inorganic materials composed of nitrides containing silicon the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/075—Connecting or disconnecting of bond wires
    • H10W72/07541—Controlling the environment, e.g. atmosphere composition or temperature
    • H10W72/07554—Controlling the environment, e.g. atmosphere composition or temperature changes in dispositions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/531—Shapes of wire connectors
    • H10W72/536—Shapes of wire connectors the connected ends being ball-shaped
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/59—Bond pads specially adapted therefor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/981—Auxiliary members, e.g. spacers
    • H10W72/983—Reinforcing structures, e.g. collars
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S257/00—Active solid-state devices, e.g. transistors, solid-state diodes
    • Y10S257/928—Active solid-state devices, e.g. transistors, solid-state diodes with shorted PN or schottky junction other than emitter junction

Landscapes

  • Formation Of Insulating Films (AREA)
DE19702028422 1969-06-18 1970-06-10 Verfahren zum Passivieren von Halbleiterbauelementen, insbesondere von Feldeffekttransistoren Pending DE2028422A1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US83441269A 1969-06-18 1969-06-18
US83771769A 1969-06-30 1969-06-30

Publications (1)

Publication Number Publication Date
DE2028422A1 true DE2028422A1 (de) 1971-01-07

Family

ID=27125705

Family Applications (2)

Application Number Title Priority Date Filing Date
DE19702028422 Pending DE2028422A1 (de) 1969-06-18 1970-06-10 Verfahren zum Passivieren von Halbleiterbauelementen, insbesondere von Feldeffekttransistoren
DE19702031884 Pending DE2031884A1 (de) 1969-06-18 1970-06-27 Verfahren zum Ausbilden einer SilikatgJasschicht auf der Oberfläche eines Sihciumplattchens eines Halb leiterbauelementes

Family Applications After (1)

Application Number Title Priority Date Filing Date
DE19702031884 Pending DE2031884A1 (de) 1969-06-18 1970-06-27 Verfahren zum Ausbilden einer SilikatgJasschicht auf der Oberfläche eines Sihciumplattchens eines Halb leiterbauelementes

Country Status (5)

Country Link
US (2) US3783119A (enExample)
BE (1) BE750240A (enExample)
DE (2) DE2028422A1 (enExample)
FR (2) FR2046838B1 (enExample)
GB (2) GB1309764A (enExample)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4561171A (en) * 1982-04-06 1985-12-31 Shell Austria Aktiengesellschaft Process of gettering semiconductor devices
AT384121B (de) * 1983-03-28 1987-10-12 Shell Austria Verfahren zum gettern von halbleiterbauelementen

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3892650A (en) * 1972-12-29 1975-07-01 Ibm Chemical sputtering purification process
JPS588152B2 (ja) * 1974-04-03 1983-02-14 株式会社日立製作所 ダイオ−ド ト ソノセイゾウホウ
US5223734A (en) * 1991-12-18 1993-06-29 Micron Technology, Inc. Semiconductor gettering process using backside chemical mechanical planarization (CMP) and dopant diffusion
WO2018063350A1 (en) * 2016-09-30 2018-04-05 Intel Corporation Methods and apparatus for gettering impurities in semiconductors

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3470076A (en) * 1966-01-10 1969-09-30 Philips Corp Method of removing alkali metal impurity from an oxide coating
GB1107699A (en) * 1966-03-28 1968-03-27 Matsushita Electronics Corp A method of producing semiconductor devices
US3632438A (en) * 1967-09-29 1972-01-04 Texas Instruments Inc Method for increasing the stability of semiconductor devices

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4561171A (en) * 1982-04-06 1985-12-31 Shell Austria Aktiengesellschaft Process of gettering semiconductor devices
AT380974B (de) * 1982-04-06 1986-08-11 Shell Austria Verfahren zum gettern von halbleiterbauelementen
AT384121B (de) * 1983-03-28 1987-10-12 Shell Austria Verfahren zum gettern von halbleiterbauelementen

Also Published As

Publication number Publication date
FR2046838B1 (enExample) 1973-12-07
BE750240A (fr) 1970-10-16
GB1257597A (enExample) 1971-12-22
US3669731A (en) 1972-06-13
FR2048075A1 (enExample) 1971-03-19
US3783119A (en) 1974-01-01
GB1309764A (en) 1973-03-14
DE2031884A1 (de) 1971-01-07
FR2046838A1 (enExample) 1971-03-12

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