DE19850656C2 - A/D-Wandler und A/D-Umwandlungsschaltung - Google Patents

A/D-Wandler und A/D-Umwandlungsschaltung

Info

Publication number
DE19850656C2
DE19850656C2 DE19850656A DE19850656A DE19850656C2 DE 19850656 C2 DE19850656 C2 DE 19850656C2 DE 19850656 A DE19850656 A DE 19850656A DE 19850656 A DE19850656 A DE 19850656A DE 19850656 C2 DE19850656 C2 DE 19850656C2
Authority
DE
Germany
Prior art keywords
voltage
output
converter
switch
section
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE19850656A
Other languages
German (de)
English (en)
Other versions
DE19850656A1 (de
Inventor
Masao Ito
Takeshi Shigenobu
Toshio Kumamoto
Takahiro Miki
Hiroshi Komurasaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Publication of DE19850656A1 publication Critical patent/DE19850656A1/de
Application granted granted Critical
Publication of DE19850656C2 publication Critical patent/DE19850656C2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12Analogue/digital converters
    • H03M1/20Increasing resolution using an n bit system to obtain n + m bits
    • H03M1/202Increasing resolution using an n bit system to obtain n + m bits by interpolation
    • H03M1/203Increasing resolution using an n bit system to obtain n + m bits by interpolation using an analogue interpolation circuit
    • H03M1/204Increasing resolution using an n bit system to obtain n + m bits by interpolation using an analogue interpolation circuit in which one or more virtual intermediate reference signals are generated between adjacent original reference signals, e.g. by connecting pre-amplifier outputs to multiple comparators
    • H03M1/205Increasing resolution using an n bit system to obtain n + m bits by interpolation using an analogue interpolation circuit in which one or more virtual intermediate reference signals are generated between adjacent original reference signals, e.g. by connecting pre-amplifier outputs to multiple comparators using resistor strings for redistribution of the original reference signals or signals derived therefrom
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12Analogue/digital converters
    • H03M1/14Conversion in steps with each step involving the same or a different conversion means and delivering more than one bit
    • H03M1/141Conversion in steps with each step involving the same or a different conversion means and delivering more than one bit in which at least one step is of the folding type; Folding stages therefore

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Analogue/Digital Conversion (AREA)
DE19850656A 1998-02-27 1998-11-03 A/D-Wandler und A/D-Umwandlungsschaltung Expired - Fee Related DE19850656C2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP04764498A JP3920443B2 (ja) 1998-02-27 1998-02-27 A/d変換回路

Publications (2)

Publication Number Publication Date
DE19850656A1 DE19850656A1 (de) 1999-09-02
DE19850656C2 true DE19850656C2 (de) 2001-05-31

Family

ID=12780966

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19850656A Expired - Fee Related DE19850656C2 (de) 1998-02-27 1998-11-03 A/D-Wandler und A/D-Umwandlungsschaltung

Country Status (3)

Country Link
US (1) US6069579A (enExample)
JP (1) JP3920443B2 (enExample)
DE (1) DE19850656C2 (enExample)

Families Citing this family (28)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6172636B1 (en) * 1999-07-13 2001-01-09 Analog Devices, Inc. Linearizing structures and methods for adjustable-gain folding amplifiers
US6445329B1 (en) * 2000-10-17 2002-09-03 Ati International Srl High speed analog to digital converter
US7065155B2 (en) * 2000-12-22 2006-06-20 Atheros Communications, Inc. Method and apparatus for a transceiver having a constant power output
JP2002271201A (ja) * 2001-03-09 2002-09-20 Fujitsu Ltd A/d変換器
US6628167B1 (en) * 2002-10-23 2003-09-30 The Boeing Company Linearized folding amplifier
US6903361B2 (en) * 2003-09-17 2005-06-07 Micron Technology, Inc. Non-volatile memory structure
JP3813614B2 (ja) * 2004-01-29 2006-08-23 川崎マイクロエレクトロニクス株式会社 エラー補正回路およびa/dコンバータ
KR100667907B1 (ko) 2004-11-02 2007-01-11 매그나칩 반도체 유한회사 아날로그 디지털 컨버터
KR100688520B1 (ko) 2005-01-17 2007-03-02 삼성전자주식회사 아날로그 디지털 컨버터의 캘리브레이션 방법
JP4844274B2 (ja) * 2006-07-31 2011-12-28 ソニー株式会社 A/d変換回路
US20100277357A1 (en) * 2007-12-12 2010-11-04 Young-Joon Ko Analog-to-digital converter
US8085179B2 (en) * 2010-02-27 2011-12-27 Infineon Technologies Ag Analog-to-digital converter
KR101200942B1 (ko) 2011-10-10 2012-11-13 동국대학교 산학협력단 아날로그-디지털 변환 장치 및 방법
US10284188B1 (en) 2017-12-29 2019-05-07 Texas Instruments Incorporated Delay based comparator
US10673452B1 (en) 2018-12-12 2020-06-02 Texas Instruments Incorporated Analog-to-digital converter with interpolation
US10673456B1 (en) 2018-12-31 2020-06-02 Texas Instruments Incorporated Conversion and folding circuit for delay-based analog-to-digital converter system
TWI792143B (zh) * 2020-04-17 2023-02-11 神盾股份有限公司 計算乘積和值之裝置
CN112217516B (zh) * 2020-08-31 2023-08-11 西安电子科技大学 一种时间域单极性双重折叠电路及时间域adc
US11316526B1 (en) 2020-12-18 2022-04-26 Texas Instruments Incorporated Piecewise calibration for highly non-linear multi-stage analog-to-digital converter
US11387840B1 (en) 2020-12-21 2022-07-12 Texas Instruments Incorporated Delay folding system and method
US11309903B1 (en) 2020-12-23 2022-04-19 Texas Instruments Incorporated Sampling network with dynamic voltage detector for delay output
US11438001B2 (en) * 2020-12-24 2022-09-06 Texas Instruments Incorporated Gain mismatch correction for voltage-to-delay preamplifier array
US11962318B2 (en) 2021-01-12 2024-04-16 Texas Instruments Incorporated Calibration scheme for a non-linear ADC
US11316525B1 (en) 2021-01-26 2022-04-26 Texas Instruments Incorporated Lookup-table-based analog-to-digital converter
CN116830462A (zh) 2021-02-01 2023-09-29 德州仪器公司 用于非线性系统的查找表
US11881867B2 (en) 2021-02-01 2024-01-23 Texas Instruments Incorporated Calibration scheme for filling lookup table in an ADC
US12101096B2 (en) 2021-02-23 2024-09-24 Texas Instruments Incorporated Differential voltage-to-delay converter with improved CMRR
CN115967401B (zh) * 2022-12-12 2025-08-22 电子科技大学 一种流水式折叠内插型模数转换器

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2214737A (en) * 1988-01-25 1989-09-06 Alan Joseph Bell Subranging analog to digital converters

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5392045A (en) * 1992-11-06 1995-02-21 National Semiconductor Corporation Folder circuit for analog to digital converter
JPH0774635A (ja) * 1993-07-02 1995-03-17 Mitsubishi Electric Corp アナログ・デジタル変換装置
US5489904A (en) * 1993-09-28 1996-02-06 The Regents Of The University Of California Analog current mode analog/digital converter
JP3340280B2 (ja) * 1995-05-25 2002-11-05 三菱電機株式会社 パイプライン型a/dコンバータ
US5682163A (en) * 1996-03-06 1997-10-28 Industrial Technology Research Institute Semi-pipelined analog-to-digital converter
US5841389A (en) * 1996-04-16 1998-11-24 Matsushita Electric Industrial Co., Ltd. Two-step parallel A/D converter

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2214737A (en) * 1988-01-25 1989-09-06 Alan Joseph Bell Subranging analog to digital converters

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
FLYNN, M.P., ALLSTOT, D.J.: "CMOS Folding A/D Converters with Current-Mode Interpolation", In: IEEE Journal of Solid-State Circuits, Vol. 31,No. 9, Sept. 1986, S. 1248-1257 *
S.Hosotoni et al., "An 8-bit 20MS/s CM0S A/D Con- verter with 50mW Power Consumption", in IEEE Jour-nal of Solid-State Circuits, Vol.25. No.1, Feb. 1990, S.167-172 *

Also Published As

Publication number Publication date
JPH11251907A (ja) 1999-09-17
JP3920443B2 (ja) 2007-05-30
DE19850656A1 (de) 1999-09-02
US6069579A (en) 2000-05-30

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Legal Events

Date Code Title Description
OP8 Request for examination as to paragraph 44 patent law
D2 Grant after examination
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee