DE1774825A1 - Rechenregister - Google Patents

Rechenregister

Info

Publication number
DE1774825A1
DE1774825A1 DE19681774825 DE1774825A DE1774825A1 DE 1774825 A1 DE1774825 A1 DE 1774825A1 DE 19681774825 DE19681774825 DE 19681774825 DE 1774825 A DE1774825 A DE 1774825A DE 1774825 A1 DE1774825 A1 DE 1774825A1
Authority
DE
Germany
Prior art keywords
bit
flip
register
circuit
flop
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
DE19681774825
Other languages
German (de)
English (en)
Inventor
Thompson Bernhard George
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of DE1774825A1 publication Critical patent/DE1774825A1/de
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/491Computations with decimal numbers radix 12 or 20.
    • G06F7/492Computations with decimal numbers radix 12 or 20. using a binary weighted representation within each denomination
    • G06F7/493Computations with decimal numbers radix 12 or 20. using a binary weighted representation within each denomination the representation being the natural binary coded representation, i.e. 8421-code
    • G06F7/494Adding; Subtracting
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2207/00Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F2207/492Indexing scheme relating to groups G06F7/492 - G06F7/496
    • G06F2207/4924Digit-parallel adding or subtracting

Landscapes

  • Engineering & Computer Science (AREA)
  • Computing Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Complex Calculations (AREA)
  • Error Detection And Correction (AREA)
DE19681774825 1967-09-15 1968-09-14 Rechenregister Pending DE1774825A1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US66797467A 1967-09-15 1967-09-15

Publications (1)

Publication Number Publication Date
DE1774825A1 true DE1774825A1 (de) 1971-11-04

Family

ID=24680447

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19681774825 Pending DE1774825A1 (de) 1967-09-15 1968-09-14 Rechenregister

Country Status (4)

Country Link
US (1) US3521043A (https=)
DE (1) DE1774825A1 (https=)
FR (1) FR1577142A (https=)
GB (1) GB1229026A (https=)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3621219A (en) * 1967-08-15 1971-11-16 Hayakawa Denki Kogyo Kk Arithmetic unit utilizing magnetic core matrix registers
US3648246A (en) * 1970-04-16 1972-03-07 Ibm Decimal addition employing two sequential passes through a binary adder in one basic machine cycle
US3704364A (en) * 1970-11-10 1972-11-28 Us Navy A digital memory shift register incorporating target data averaging through a digital smoothing loop

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IT557030A (https=) * 1955-08-01
US3260840A (en) * 1961-12-28 1966-07-12 Ibm Variable mode arithmetic circuits with carry select
US3426185A (en) * 1965-12-30 1969-02-04 Ibm Accumulator for performing arithmetic operations

Also Published As

Publication number Publication date
US3521043A (en) 1970-07-21
FR1577142A (https=) 1969-08-01
GB1229026A (https=) 1971-04-21

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