GB1229026A - - Google Patents

Info

Publication number
GB1229026A
GB1229026A GB1229026DA GB1229026A GB 1229026 A GB1229026 A GB 1229026A GB 1229026D A GB1229026D A GB 1229026DA GB 1229026 A GB1229026 A GB 1229026A
Authority
GB
United Kingdom
Prior art keywords
register
logic
digit
memory
trigger
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
Other languages
English (en)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Publication of GB1229026A publication Critical patent/GB1229026A/en
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/491—Computations with decimal numbers radix 12 or 20.
    • G06F7/492—Computations with decimal numbers radix 12 or 20. using a binary weighted representation within each denomination
    • G06F7/493—Computations with decimal numbers radix 12 or 20. using a binary weighted representation within each denomination the representation being the natural binary coded representation, i.e. 8421-code
    • G06F7/494—Adding; Subtracting
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F2207/492—Indexing scheme relating to groups G06F7/492 - G06F7/496
    • G06F2207/4924—Digit-parallel adding or subtracting

Landscapes

  • Engineering & Computer Science (AREA)
  • Computing Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computational Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Complex Calculations (AREA)
  • Error Detection And Correction (AREA)
GB1229026D 1967-09-15 1968-09-04 Expired GB1229026A (https=)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US66797467A 1967-09-15 1967-09-15

Publications (1)

Publication Number Publication Date
GB1229026A true GB1229026A (https=) 1971-04-21

Family

ID=24680447

Family Applications (1)

Application Number Title Priority Date Filing Date
GB1229026D Expired GB1229026A (https=) 1967-09-15 1968-09-04

Country Status (4)

Country Link
US (1) US3521043A (https=)
DE (1) DE1774825A1 (https=)
FR (1) FR1577142A (https=)
GB (1) GB1229026A (https=)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3621219A (en) * 1967-08-15 1971-11-16 Hayakawa Denki Kogyo Kk Arithmetic unit utilizing magnetic core matrix registers
US3648246A (en) * 1970-04-16 1972-03-07 Ibm Decimal addition employing two sequential passes through a binary adder in one basic machine cycle
US3704364A (en) * 1970-11-10 1972-11-28 Us Navy A digital memory shift register incorporating target data averaging through a digital smoothing loop

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IT557030A (https=) * 1955-08-01
US3260840A (en) * 1961-12-28 1966-07-12 Ibm Variable mode arithmetic circuits with carry select
US3426185A (en) * 1965-12-30 1969-02-04 Ibm Accumulator for performing arithmetic operations

Also Published As

Publication number Publication date
US3521043A (en) 1970-07-21
FR1577142A (https=) 1969-08-01
DE1774825A1 (de) 1971-11-04

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Legal Events

Date Code Title Description
PS Patent sealed [section 19, patents act 1949]
PCNP Patent ceased through non-payment of renewal fee