DE1206180B - Verfahren zum Betrieb einer Rechenmatrix - Google Patents

Verfahren zum Betrieb einer Rechenmatrix

Info

Publication number
DE1206180B
DE1206180B DEI17185A DEI0017185A DE1206180B DE 1206180 B DE1206180 B DE 1206180B DE I17185 A DEI17185 A DE I17185A DE I0017185 A DEI0017185 A DE I0017185A DE 1206180 B DE1206180 B DE 1206180B
Authority
DE
Germany
Prior art keywords
cores
matrix
state
operand
column
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
DEI17185A
Other languages
German (de)
English (en)
Inventor
Maurice Papo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of DE1206180B publication Critical patent/DE1206180B/de
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/491—Computations with decimal numbers radix 12 or 20.
    • G06F7/4912—Adding; Subtracting
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/085—Error detection or correction by redundancy in data representation, e.g. by using checking codes using codes with inherent redundancy, e.g. n-out-of-m codes
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/383—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using magnetic or similar elements
    • G06F7/386—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using magnetic or similar elements decimal, radix 20 or 12

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Computing Systems (AREA)
  • Mathematical Analysis (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Computational Mathematics (AREA)
  • Quality & Reliability (AREA)
  • Measurement Of Length, Angles, Or The Like Using Electric Or Magnetic Means (AREA)
  • Complex Calculations (AREA)
  • Logic Circuits (AREA)
  • Use Of Switch Circuits For Exchanges And Methods Of Control Of Multiplex Exchanges (AREA)
  • Electronic Switches (AREA)
DEI17185A 1958-11-06 1959-11-04 Verfahren zum Betrieb einer Rechenmatrix Pending DE1206180B (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR778475A FR1271017A (fr) 1958-11-06 1958-11-06 Dispositif et procédé pour effectuer des opérations arithmétiques
FR849992A FR80453E (fr) 1958-11-06 1961-01-18 Dispositif et procédé pour effectuer des opérations arithmétiques

Publications (1)

Publication Number Publication Date
DE1206180B true DE1206180B (de) 1965-12-02

Family

ID=26183630

Family Applications (2)

Application Number Title Priority Date Filing Date
DEI17185A Pending DE1206180B (de) 1958-11-06 1959-11-04 Verfahren zum Betrieb einer Rechenmatrix
DEJ21169A Pending DE1192700B (de) 1958-11-06 1962-01-15 Pruefanordnung fuer eine Matrix aus bistabilen Elementen

Family Applications After (1)

Application Number Title Priority Date Filing Date
DEJ21169A Pending DE1192700B (de) 1958-11-06 1962-01-15 Pruefanordnung fuer eine Matrix aus bistabilen Elementen

Country Status (5)

Country Link
US (1) US3069086A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
DE (2) DE1206180B (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
FR (2) FR1271017A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
GB (2) GB904841A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
NL (2) NL244992A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1574592B1 (de) * 1966-09-23 1972-02-03 Siemens Ag Vorrcihtun zur arithmethischen verknuepfung binaerer operanden unter verwendung einer matrix

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3110015A (en) * 1957-10-28 1963-11-05 Honeywell Regulator Co Memory circuitry for digital data
NL260164A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) * 1960-03-30
US3166669A (en) * 1960-06-28 1965-01-19 Ibm Core matrix coded decimal parallel adder utilizing propagated carries
US3212064A (en) * 1961-11-27 1965-10-12 Sperry Rand Corp Matrix having thin magnetic film logical gates for transferring signals from plural input means to plural output means
US3238377A (en) * 1961-12-04 1966-03-01 Ibm Cryogenic m out of n logic circuits
GB962998A (en) * 1963-03-15 1964-07-08 Standard Telephones Cables Ltd Improvements in or relating to intelligence storage apparatus
US3460092A (en) * 1965-03-31 1969-08-05 Bell Telephone Labor Inc Selector matrix check circuit
US3510638A (en) * 1967-02-09 1970-05-05 Richard F Pond Decimal matrix adder utilizing gas discharge tubes
US3875392A (en) * 1973-06-18 1975-04-01 Ii Miner S Keeler Electrical computing system for simultaneously performing a plurality of operations on two or more operands
DE102012220849A1 (de) * 2012-11-15 2014-05-15 Rohde & Schwarz Gmbh & Co. Kg Schaltung zur arithmetischen Verknüpfung mehrerer Eingangssignale

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE900281C (de) * 1939-04-06 1953-12-21 Adelheid Huendorf Elektrische Rechenzelle

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL218497A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) * 1956-06-30
US2955303A (en) * 1958-05-07 1960-10-11 Racine Ind Plant Inc Tray for electric brush

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE900281C (de) * 1939-04-06 1953-12-21 Adelheid Huendorf Elektrische Rechenzelle

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1574592B1 (de) * 1966-09-23 1972-02-03 Siemens Ag Vorrcihtun zur arithmethischen verknuepfung binaerer operanden unter verwendung einer matrix

Also Published As

Publication number Publication date
DE1192700B (de) 1965-05-13
FR1271017A (fr) 1961-09-08
US3069086A (en) 1962-12-18
NL244992A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
FR80453E (fr) 1963-05-03
GB974362A (en) 1964-11-04
NL273524A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
GB904841A (en) 1962-08-29

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