DE1186951B - Verfahren zum Herstellen einer hermetisch eingeschlossenen Halbleiteranordnung - Google Patents

Verfahren zum Herstellen einer hermetisch eingeschlossenen Halbleiteranordnung

Info

Publication number
DE1186951B
DE1186951B DET18339A DET0018339A DE1186951B DE 1186951 B DE1186951 B DE 1186951B DE T18339 A DET18339 A DE T18339A DE T0018339 A DET0018339 A DE T0018339A DE 1186951 B DE1186951 B DE 1186951B
Authority
DE
Germany
Prior art keywords
attached
semiconductor body
semiconductor
carrier plate
conductive strips
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
DET18339A
Other languages
German (de)
English (en)
Inventor
Jack St Clair Bilby
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Texas Instruments Inc
Original Assignee
Texas Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Texas Instruments Inc filed Critical Texas Instruments Inc
Publication of DE1186951B publication Critical patent/DE1186951B/de
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/26—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback
    • H03K3/28—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback
    • H03K3/281—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback using at least two transistors so coupled that the input of one is derived from the output of another, e.g. multivibrator
    • H03K3/286—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback using at least two transistors so coupled that the input of one is derived from the output of another, e.g. multivibrator bistable
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/60—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of BJTs
    • H10D84/611—Combinations of BJTs and one or more of diodes, resistors or capacitors
    • H10D84/613—Combinations of vertical BJTs and one or more of diodes, resistors or capacitors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40—Leadframes
    • H10W70/411—Chip-supporting parts, e.g. die pads
    • H10W70/415—Leadframe inner leads serving as die pads
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
    • H10W70/65—Shapes or dispositions of interconnections
    • H10W70/658—Shapes or dispositions of interconnections for devices provided for in groups H10D8/00 - H10D48/00
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W76/00—Containers; Fillings or auxiliary members therefor; Seals
    • H10W76/10—Containers or parts thereof
    • H10W76/12—Containers or parts thereof characterised by their shape
    • H10W76/15—Containers comprising an insulating or insulated base
    • H10W76/157—Containers comprising an insulating or insulated base having interconnections parallel to the insulating or insulated base
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/073—Connecting or disconnecting of die-attach connectors
    • H10W72/07351—Connecting or disconnecting of die-attach connectors characterised by changes in properties of the die-attach connectors during connecting
    • H10W72/07353—Connecting or disconnecting of die-attach connectors characterised by changes in properties of the die-attach connectors during connecting changes in shapes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/075—Connecting or disconnecting of bond wires
    • H10W72/07551—Connecting or disconnecting of bond wires characterised by changes in properties of the bond wires during the connecting
    • H10W72/07554—Connecting or disconnecting of bond wires characterised by changes in properties of the bond wires during the connecting changes in dispositions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/30—Die-attach connectors
    • H10W72/331—Shapes of die-attach connectors
    • H10W72/334—Cross-sectional shape, i.e. in side view
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/531—Shapes of wire connectors
    • H10W72/536—Shapes of wire connectors the connected ends being ball-shaped
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/541—Dispositions of bond wires
    • H10W72/5453—Dispositions of bond wires connecting between multiple bond pads on a chip, e.g. daisy chain
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/541—Dispositions of bond wires
    • H10W72/547—Dispositions of multiple bond wires
    • H10W72/5473—Dispositions of multiple bond wires multiple bond wires connected to a common bond pad
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/851—Dispositions of multiple connectors or interconnections
    • H10W72/874—On different surfaces
    • H10W72/884—Die-attach connectors and bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/931—Shapes of bond pads
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/734—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked insulating package substrate, interposer or RDL
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/754—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49121—Beam lead frame or beam lead device
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155—Manufacturing circuit on or in base

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
  • Manufacture Of Switches (AREA)
DET18339A 1959-05-06 1960-05-06 Verfahren zum Herstellen einer hermetisch eingeschlossenen Halbleiteranordnung Pending DE1186951B (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US811470A US3072832A (en) 1959-05-06 1959-05-06 Semiconductor structure fabrication
US46742865A 1965-06-28 1965-06-28
US60972067A 1967-01-13 1967-01-13

Publications (1)

Publication Number Publication Date
DE1186951B true DE1186951B (de) 1965-02-11

Family

ID=27413014

Family Applications (2)

Application Number Title Priority Date Filing Date
DEI20337A Pending DE1283965B (de) 1959-05-06 1960-05-06 Hermetisch eingeschlossene Halbleiteranordnung
DET18339A Pending DE1186951B (de) 1959-05-06 1960-05-06 Verfahren zum Herstellen einer hermetisch eingeschlossenen Halbleiteranordnung

Family Applications Before (1)

Application Number Title Priority Date Filing Date
DEI20337A Pending DE1283965B (de) 1959-05-06 1960-05-06 Hermetisch eingeschlossene Halbleiteranordnung

Country Status (7)

Country Link
US (1) US3072832A (https=)
CH (1) CH410195A (https=)
DE (2) DE1283965B (https=)
GB (1) GB958241A (https=)
LU (1) LU38605A1 (https=)
MY (1) MY6900309A (https=)
NL (1) NL251301A (https=)

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US3173028A (en) * 1962-02-13 1965-03-09 Westinghouse Electric Corp Solid state bistable multivibrator
BE631066A (https=) * 1962-04-16
NL292051A (https=) * 1962-04-27
US3303265A (en) * 1962-05-17 1967-02-07 Texas Instruments Inc Miniature semiconductor enclosure
US3271625A (en) * 1962-08-01 1966-09-06 Signetics Corp Electronic package assembly
NL298196A (https=) * 1962-09-22
US3274456A (en) * 1962-11-21 1966-09-20 Gen Instrument Corp Rectifier assembly and method of making same
US3325586A (en) * 1963-03-05 1967-06-13 Fairchild Camera Instr Co Circuit element totally encapsulated in glass
US3311798A (en) * 1963-09-27 1967-03-28 Trw Semiconductors Inc Component package
US3185865A (en) * 1963-03-26 1965-05-25 Bert W Larey Transistoried multivibrator with built-in time delay
US3231797A (en) * 1963-09-20 1966-01-25 Nat Semiconductor Corp Semiconductor device
US3383454A (en) * 1964-01-10 1968-05-14 Gti Corp Micromodular package
US3341649A (en) * 1964-01-17 1967-09-12 Signetics Corp Modular package for semiconductor devices
US3324530A (en) * 1964-07-24 1967-06-13 Ralph L Sherwood Connector support assembly for transistor connector and method of making the support assembly
US3312771A (en) * 1964-08-07 1967-04-04 Nat Beryllia Corp Microelectronic package
DE1514273B2 (de) * 1964-08-21 1974-08-22 Nippon Electric Co., Ltd., Tokio Halbleiteranordmng
US3340347A (en) * 1964-10-12 1967-09-05 Corning Glass Works Enclosed electronic device
US3388301A (en) * 1964-12-09 1968-06-11 Signetics Corp Multichip integrated circuit assembly with interconnection structure
US3349481A (en) * 1964-12-29 1967-10-31 Alpha Microelectronics Company Integrated circuit sealing method and structure
US3340602A (en) * 1965-02-01 1967-09-12 Philco Ford Corp Process for sealing
US3265806A (en) * 1965-04-05 1966-08-09 Sprague Electric Co Encapsulated flat package for electronic parts
US3374533A (en) * 1965-05-26 1968-03-26 Sprague Electric Co Semiconductor mounting and assembly method
US3522490A (en) * 1965-06-28 1970-08-04 Texas Instruments Inc Semiconductor package with heat conducting mounting extending from package on side opposite conductor extensions
US3386015A (en) * 1965-10-21 1968-05-28 Texas Instruments Inc Semiconductor element having an organic silicone base cement
US3271507A (en) * 1965-11-02 1966-09-06 Alloys Unltd Inc Flat package for semiconductors
US3404215A (en) * 1966-04-14 1968-10-01 Sprague Electric Co Hermetically sealed electronic module
US3388302A (en) * 1966-12-30 1968-06-11 Coors Porcelain Co Ceramic housing for semiconductor components
US3497774A (en) * 1967-06-07 1970-02-24 Beckman Instruments Inc Electrical circuit module and method of manufacture
US3502786A (en) * 1967-06-14 1970-03-24 Milton Stoll Flat pack spacer of low thermal diffusivity
US3538597A (en) * 1967-07-13 1970-11-10 Us Navy Flatpack lid and method
US3495023A (en) * 1968-06-14 1970-02-10 Nat Beryllia Corp Flat pack having a beryllia base and an alumina ring
US3792525A (en) * 1971-08-04 1974-02-19 Gen Motors Corp Method of making a semiconductive signal translating device
US3919602A (en) * 1972-03-23 1975-11-11 Bosch Gmbh Robert Electric circuit arrangement and method of making the same
JPS545264B1 (https=) * 1975-05-19 1979-03-15
US4402134A (en) * 1977-11-14 1983-09-06 Edison International, Inc. Method of making an integrated display device
US4291815B1 (en) * 1980-02-19 1998-09-29 Semiconductor Packaging Materi Ceramic lid assembly for hermetic sealing of a semiconductor chip
US5134462A (en) * 1990-08-27 1992-07-28 Motorola, Inc. Flexible film chip carrier having a flexible film substrate and means for maintaining planarity of the substrate
US20070026691A1 (en) * 2005-07-07 2007-02-01 Mks Instruments Inc. Low-field non-contact charging apparatus for testing substrates

Citations (5)

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Publication number Priority date Publication date Assignee Title
GB599341A (en) * 1944-03-24 1948-03-10 Western Electric Co Improvements in electrical translating devices such as contact rectifiers
US2633489A (en) * 1951-04-03 1953-03-31 Gen Electric Crystal valve or rectifier
US2762954A (en) * 1950-09-09 1956-09-11 Sylvania Electric Prod Method for assembling transistors
GB780251A (en) * 1954-02-18 1957-07-31 Pye Ltd Improvements in or relating to junction transistors
DE1044287B (de) * 1954-03-10 1958-11-20 Sylvania Electric Prod Legierungsverfahren zur Herstellung von Halbleiter-anordnungen mit p-n-UEbergaengen

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Patent Citations (5)

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Publication number Priority date Publication date Assignee Title
GB599341A (en) * 1944-03-24 1948-03-10 Western Electric Co Improvements in electrical translating devices such as contact rectifiers
US2762954A (en) * 1950-09-09 1956-09-11 Sylvania Electric Prod Method for assembling transistors
US2633489A (en) * 1951-04-03 1953-03-31 Gen Electric Crystal valve or rectifier
GB780251A (en) * 1954-02-18 1957-07-31 Pye Ltd Improvements in or relating to junction transistors
DE1044287B (de) * 1954-03-10 1958-11-20 Sylvania Electric Prod Legierungsverfahren zur Herstellung von Halbleiter-anordnungen mit p-n-UEbergaengen

Also Published As

Publication number Publication date
NL251301A (https=) 1900-01-01
DE1283965B (de) 1968-11-28
LU38605A1 (https=)
CH410195A (fr) 1966-03-31
US3072832A (en) 1963-01-08
MY6900309A (en) 1969-12-31
GB958241A (en) 1964-05-21

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