DE112023001175T5 - Halbleitervorrichtung - Google Patents

Halbleitervorrichtung Download PDF

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Publication number
DE112023001175T5
DE112023001175T5 DE112023001175.3T DE112023001175T DE112023001175T5 DE 112023001175 T5 DE112023001175 T5 DE 112023001175T5 DE 112023001175 T DE112023001175 T DE 112023001175T DE 112023001175 T5 DE112023001175 T5 DE 112023001175T5
Authority
DE
Germany
Prior art keywords
region
highly doped
ring
regions
well
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
DE112023001175.3T
Other languages
German (de)
English (en)
Inventor
Tadao Yuki
Michiko KIHARA
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Rohm Co Ltd
Original Assignee
Rohm Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Rohm Co Ltd filed Critical Rohm Co Ltd
Publication of DE112023001175T5 publication Critical patent/DE112023001175T5/de
Pending legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D89/00—Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
    • H10D89/60—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD]
    • H10D89/601—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs
    • H10D89/611—Integrated devices comprising arrangements for electrical or thermal protection, e.g. protection circuits against electrostatic discharge [ESD] for devices having insulated gate electrodes, e.g. for IGFETs or IGBTs using diodes as protective elements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe

Landscapes

  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
DE112023001175.3T 2022-03-01 2023-02-28 Halbleitervorrichtung Pending DE112023001175T5 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2022030840 2022-03-01
JP2022-030840 2022-03-01
PCT/JP2023/007193 WO2023167161A1 (ja) 2022-03-01 2023-02-28 半導体装置

Publications (1)

Publication Number Publication Date
DE112023001175T5 true DE112023001175T5 (de) 2024-12-19

Family

ID=87883711

Family Applications (1)

Application Number Title Priority Date Filing Date
DE112023001175.3T Pending DE112023001175T5 (de) 2022-03-01 2023-02-28 Halbleitervorrichtung

Country Status (5)

Country Link
US (1) US20240395796A1 (https=)
JP (1) JPWO2023167161A1 (https=)
CN (1) CN118749135A (https=)
DE (1) DE112023001175T5 (https=)
WO (1) WO2023167161A1 (https=)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20240429227A1 (en) * 2023-06-23 2024-12-26 Globalfoundries U.S. Inc. Structures for an electrostatic discharge protection device

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6610508B2 (ja) * 2016-11-09 2019-11-27 株式会社デンソー 半導体装置
CN114556560B (zh) * 2019-11-29 2026-01-23 罗姆股份有限公司 半导体器件

Also Published As

Publication number Publication date
JPWO2023167161A1 (https=) 2023-09-07
WO2023167161A1 (ja) 2023-09-07
US20240395796A1 (en) 2024-11-28
CN118749135A (zh) 2024-10-08

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Legal Events

Date Code Title Description
R012 Request for examination validly filed
R079 Amendment of ipc main class

Free format text: PREVIOUS MAIN CLASS: H01L0023600000

Ipc: H10W0042600000