DE10310740A1 - Verfahren zur Herstellung einer spannungsrelaxierten Schichtstruktur auf einem nicht gitterangepassten Substrat, sowie Verwendung eines solchen Schichtsystems in elektronischen und/oder optoelektronischen Bauelementen - Google Patents
Verfahren zur Herstellung einer spannungsrelaxierten Schichtstruktur auf einem nicht gitterangepassten Substrat, sowie Verwendung eines solchen Schichtsystems in elektronischen und/oder optoelektronischen Bauelementen Download PDFInfo
- Publication number
- DE10310740A1 DE10310740A1 DE10310740A DE10310740A DE10310740A1 DE 10310740 A1 DE10310740 A1 DE 10310740A1 DE 10310740 A DE10310740 A DE 10310740A DE 10310740 A DE10310740 A DE 10310740A DE 10310740 A1 DE10310740 A1 DE 10310740A1
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- Germany
- Prior art keywords
- layer
- substrate
- layer structure
- silicon
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- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Classifications
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B82—NANOTECHNOLOGY
- B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
- B82Y30/00—Nanotechnology for materials or surface science, e.g. nanocomposites
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B82—NANOTECHNOLOGY
- B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
- B82Y10/00—Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02439—Materials
- H01L21/02441—Group 14 semiconducting materials
- H01L21/0245—Silicon, silicon germanium, germanium
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02524—Group 14 semiconducting materials
- H01L21/02532—Silicon, silicon germanium, germanium
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02656—Special treatments
- H01L21/02664—Aftertreatments
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/933—Germanium or silicon or Ge-Si on III-V
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Chemical & Material Sciences (AREA)
- Nanotechnology (AREA)
- General Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Crystallography & Structural Chemistry (AREA)
- Composite Materials (AREA)
- Materials Engineering (AREA)
- Mathematical Physics (AREA)
- Theoretical Computer Science (AREA)
- Recrystallisation Techniques (AREA)
- Light Receiving Elements (AREA)
Priority Applications (7)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE10310740A DE10310740A1 (de) | 2003-03-10 | 2003-03-10 | Verfahren zur Herstellung einer spannungsrelaxierten Schichtstruktur auf einem nicht gitterangepassten Substrat, sowie Verwendung eines solchen Schichtsystems in elektronischen und/oder optoelektronischen Bauelementen |
| EP04708713A EP1604390B9 (de) | 2003-03-10 | 2004-02-06 | Verfahren zur herstellung einer spannungsrelaxierten schichtstruktur auf einem nicht gitterangepassten substrat sowie verwendung eines solchen schichtsystems in elektronischen und/oder optoelektronischen bauelementen |
| PCT/DE2004/000200 WO2004082001A1 (de) | 2003-03-10 | 2004-02-06 | Verfahren zur herstellung einer spannungsrelaxierten schichtstruktur auf einem nicht gitterangepassten substrat sowie verwendung eines solchen schichtsystems in elektronischen und/oder optoelektronischen bauelementen |
| DE502004011040T DE502004011040D1 (de) | 2003-03-10 | 2004-02-06 | Verfahren zur herstellung einer spannungsrelaxierten schichtstruktur auf einem nicht gitterangepassten substrat sowie verwendung eines solchen schichtsystems in elektronischen und/oder optoelektronischen bauelementen |
| AT04708713T ATE464651T1 (de) | 2003-03-10 | 2004-02-06 | Verfahren zur herstellung einer spannungsrelaxierten schichtstruktur auf einem nicht gitterangepassten substrat sowie verwendung eines solchen schichtsystems in elektronischen und/oder optoelektronischen bauelementen |
| US10/548,620 US7442657B2 (en) | 2003-03-10 | 2004-02-06 | Producing stress-relaxed crystalline layer on a substrate |
| JP2006504230A JP5122130B2 (ja) | 2003-03-10 | 2004-02-06 | 格子整合されなかった基板上に応力緩和層構造を形成する方法 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DE10310740A DE10310740A1 (de) | 2003-03-10 | 2003-03-10 | Verfahren zur Herstellung einer spannungsrelaxierten Schichtstruktur auf einem nicht gitterangepassten Substrat, sowie Verwendung eines solchen Schichtsystems in elektronischen und/oder optoelektronischen Bauelementen |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| DE10310740A1 true DE10310740A1 (de) | 2004-09-30 |
Family
ID=32920740
Family Applications (2)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| DE10310740A Withdrawn DE10310740A1 (de) | 2003-03-10 | 2003-03-10 | Verfahren zur Herstellung einer spannungsrelaxierten Schichtstruktur auf einem nicht gitterangepassten Substrat, sowie Verwendung eines solchen Schichtsystems in elektronischen und/oder optoelektronischen Bauelementen |
| DE502004011040T Expired - Lifetime DE502004011040D1 (de) | 2003-03-10 | 2004-02-06 | Verfahren zur herstellung einer spannungsrelaxierten schichtstruktur auf einem nicht gitterangepassten substrat sowie verwendung eines solchen schichtsystems in elektronischen und/oder optoelektronischen bauelementen |
Family Applications After (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| DE502004011040T Expired - Lifetime DE502004011040D1 (de) | 2003-03-10 | 2004-02-06 | Verfahren zur herstellung einer spannungsrelaxierten schichtstruktur auf einem nicht gitterangepassten substrat sowie verwendung eines solchen schichtsystems in elektronischen und/oder optoelektronischen bauelementen |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US7442657B2 (enExample) |
| EP (1) | EP1604390B9 (enExample) |
| JP (1) | JP5122130B2 (enExample) |
| AT (1) | ATE464651T1 (enExample) |
| DE (2) | DE10310740A1 (enExample) |
| WO (1) | WO2004082001A1 (enExample) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE102014210406B4 (de) | 2013-06-10 | 2020-06-18 | Globalfoundries Inc. | Verfahren zur Herstellung eines Transistors mit einem verspannten Kanalgebiet |
Families Citing this family (50)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7057256B2 (en) | 2001-05-25 | 2006-06-06 | President & Fellows Of Harvard College | Silicon-based visible and near-infrared optoelectric devices |
| US7442629B2 (en) | 2004-09-24 | 2008-10-28 | President & Fellows Of Harvard College | Femtosecond laser-induced formation of submicrometer spikes on a semiconductor substrate |
| DE10218381A1 (de) * | 2002-04-24 | 2004-02-26 | Forschungszentrum Jülich GmbH | Verfahren zur Herstellung einer oder mehrerer einkristalliner Schichten mit jeweils unterschiedlicher Gitterstruktur in einer Ebene einer Schichtenfolge |
| DE10318284A1 (de) * | 2003-04-22 | 2004-11-25 | Forschungszentrum Jülich GmbH | Verfahren zur Herstellung einer verspannten Schicht auf einem Substrat und Schichtstruktur |
| DE10318283A1 (de) * | 2003-04-22 | 2004-11-25 | Forschungszentrum Jülich GmbH | Verfahren zur Herstellung einer verspannten Schicht auf einem Substrat und Schichtstruktur |
| DE102006004870A1 (de) * | 2006-02-02 | 2007-08-16 | Siltronic Ag | Halbleiterschichtstruktur und Verfahren zur Herstellung einer Halbleiterschichtstruktur |
| US20080173895A1 (en) * | 2007-01-24 | 2008-07-24 | Sharp Laboratories Of America, Inc. | Gallium nitride on silicon with a thermal expansion transition buffer layer |
| US7895548B2 (en) | 2007-10-26 | 2011-02-22 | Synopsys, Inc. | Filler cells for design optimization in a place-and-route system |
| US9472423B2 (en) * | 2007-10-30 | 2016-10-18 | Synopsys, Inc. | Method for suppressing lattice defects in a semiconductor substrate |
| FR2924273B1 (fr) * | 2007-11-28 | 2010-02-19 | Commissariat Energie Atomique | Procede de moderation de deformation |
| WO2010028177A1 (en) * | 2008-09-03 | 2010-03-11 | Sionyx, Inc. | High sensitivity photodetectors, imaging arrays, and high efficiency photovoltaic devices produced using ion implantation and femtosecond laser irradiation |
| US8305829B2 (en) * | 2009-02-23 | 2012-11-06 | Taiwan Semiconductor Manufacturing Company, Ltd. | Memory power gating circuit for controlling internal voltage of a memory array, system and method for controlling the same |
| US8305790B2 (en) * | 2009-03-16 | 2012-11-06 | Taiwan Semiconductor Manufacturing Company, Ltd. | Electrical anti-fuse and related applications |
| US8957482B2 (en) * | 2009-03-31 | 2015-02-17 | Taiwan Semiconductor Manufacturing Company, Ltd. | Electrical fuse and related applications |
| US8912602B2 (en) * | 2009-04-14 | 2014-12-16 | Taiwan Semiconductor Manufacturing Company, Ltd. | FinFETs and methods for forming the same |
| US8461015B2 (en) * | 2009-07-08 | 2013-06-11 | Taiwan Semiconductor Manufacturing Company, Ltd. | STI structure and method of forming bottom void in same |
| US8759943B2 (en) | 2010-10-08 | 2014-06-24 | Taiwan Semiconductor Manufacturing Company, Ltd. | Transistor having notched fin structure and method of making the same |
| US8264021B2 (en) * | 2009-10-01 | 2012-09-11 | Taiwan Semiconductor Manufacturing Company, Ltd. | Finfets and methods for forming the same |
| US8298925B2 (en) | 2010-11-08 | 2012-10-30 | Taiwan Semiconductor Manufacturing Company, Ltd. | Mechanisms for forming ultra shallow junction |
| US8497528B2 (en) | 2010-05-06 | 2013-07-30 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method for fabricating a strained structure |
| US8472227B2 (en) * | 2010-01-27 | 2013-06-25 | Taiwan Semiconductor Manufacturing Company, Ltd. | Integrated circuits and methods for forming the same |
| US8980719B2 (en) | 2010-04-28 | 2015-03-17 | Taiwan Semiconductor Manufacturing Company, Ltd. | Methods for doping fin field-effect transistors |
| US8482073B2 (en) * | 2010-03-25 | 2013-07-09 | Taiwan Semiconductor Manufacturing Company, Ltd. | Integrated circuit including FINFETs and methods for forming the same |
| US8264032B2 (en) * | 2009-09-01 | 2012-09-11 | Taiwan Semiconductor Manufacturing Company, Ltd. | Accumulation type FinFET, circuits and fabrication method thereof |
| US8629478B2 (en) * | 2009-07-31 | 2014-01-14 | Taiwan Semiconductor Manufacturing Company, Ltd. | Fin structure for high mobility multiple-gate transistor |
| US8440517B2 (en) | 2010-10-13 | 2013-05-14 | Taiwan Semiconductor Manufacturing Company, Ltd. | FinFET and method of fabricating the same |
| US9484462B2 (en) * | 2009-09-24 | 2016-11-01 | Taiwan Semiconductor Manufacturing Company, Ltd. | Fin structure of fin field effect transistor |
| US8623728B2 (en) * | 2009-07-28 | 2014-01-07 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method for forming high germanium concentration SiGe stressor |
| US9673243B2 (en) | 2009-09-17 | 2017-06-06 | Sionyx, Llc | Photosensitive imaging devices and associated methods |
| US9911781B2 (en) | 2009-09-17 | 2018-03-06 | Sionyx, Llc | Photosensitive imaging devices and associated methods |
| US20110097867A1 (en) * | 2009-10-22 | 2011-04-28 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method of controlling gate thicknesses in forming fusi gates |
| US9040393B2 (en) | 2010-01-14 | 2015-05-26 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method of forming semiconductor structure |
| US8692198B2 (en) | 2010-04-21 | 2014-04-08 | Sionyx, Inc. | Photosensitive imaging devices and associated methods |
| CN103081128B (zh) | 2010-06-18 | 2016-11-02 | 西奥尼克斯公司 | 高速光敏设备及相关方法 |
| US8685845B2 (en) * | 2010-08-20 | 2014-04-01 | International Business Machines Corporation | Epitaxial growth of silicon doped with carbon and phosphorus using hydrogen carrier gas |
| CA2814119C (en) | 2010-10-12 | 2017-01-17 | Alliance For Sustainable Energy, Llc | High bandgap iii-v alloys for high efficiency optoelectronics |
| US8603924B2 (en) | 2010-10-19 | 2013-12-10 | Taiwan Semiconductor Manufacturing Company, Ltd. | Methods of forming gate dielectric material |
| US8769446B2 (en) | 2010-11-12 | 2014-07-01 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method and device for increasing fin device density for unaligned fins |
| US8877602B2 (en) | 2011-01-25 | 2014-11-04 | Taiwan Semiconductor Manufacturing Company, Ltd. | Mechanisms of doping oxide for forming shallow trench isolation |
| US8592915B2 (en) | 2011-01-25 | 2013-11-26 | Taiwan Semiconductor Manufacturing Company, Ltd. | Doped oxide for shallow trench isolation (STI) |
| US8431453B2 (en) | 2011-03-31 | 2013-04-30 | Taiwan Semiconductor Manufacturing Company, Ltd. | Plasma doping to reduce dielectric loss during removal of dummy layers in a gate structure |
| US9496308B2 (en) | 2011-06-09 | 2016-11-15 | Sionyx, Llc | Process module for increasing the response of backside illuminated photosensitive imagers and associated methods |
| WO2013010127A2 (en) | 2011-07-13 | 2013-01-17 | Sionyx, Inc. | Biometric imaging devices and associated methods |
| US9064764B2 (en) | 2012-03-22 | 2015-06-23 | Sionyx, Inc. | Pixel isolation elements, devices, and associated methods |
| WO2014127376A2 (en) | 2013-02-15 | 2014-08-21 | Sionyx, Inc. | High dynamic range cmos image sensor having anti-blooming properties and associated methods |
| US9939251B2 (en) | 2013-03-15 | 2018-04-10 | Sionyx, Llc | Three dimensional imaging utilizing stacked imager devices and associated methods |
| WO2014209421A1 (en) | 2013-06-29 | 2014-12-31 | Sionyx, Inc. | Shallow trench textured regions and associated methods |
| US10516050B2 (en) | 2016-07-29 | 2019-12-24 | Taiwan Semiconductor Manufacturing Co., Ltd. | Method for forming stressor, semiconductor device having stressor, and method for forming the same |
| US11211426B2 (en) | 2019-10-01 | 2021-12-28 | Taiwan Semiconductor Manufacturing Company, Ltd. | Tunnel junction selector MRAM |
| CN111733378B (zh) * | 2020-05-15 | 2022-12-13 | 中国兵器科学研究院宁波分院 | 一种钢表面的涂层结构及其制备方法 |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
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| US6154475A (en) * | 1997-12-04 | 2000-11-28 | The United States Of America As Represented By The Secretary Of The Air Force | Silicon-based strain-symmetrized GE-SI quantum lasers |
| US20020140031A1 (en) * | 2001-03-31 | 2002-10-03 | Kern Rim | Strained silicon on insulator structures |
| US20020185686A1 (en) * | 2001-06-12 | 2002-12-12 | International Business Machines Corporation | Relaxed SiGe layers on Si or silicon-on-insulator substrates by ion implantation and thermal annealing |
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| US5461243A (en) * | 1993-10-29 | 1995-10-24 | International Business Machines Corporation | Substrate for tensilely strained semiconductor |
| US6039803A (en) * | 1996-06-28 | 2000-03-21 | Massachusetts Institute Of Technology | Utilization of miscut substrates to improve relaxed graded silicon-germanium and germanium layers on silicon |
| US5906951A (en) * | 1997-04-30 | 1999-05-25 | International Business Machines Corporation | Strained Si/SiGe layers on insulator |
| US5963817A (en) * | 1997-10-16 | 1999-10-05 | International Business Machines Corporation | Bulk and strained silicon on insulator using local selective oxidation |
| JP4269541B2 (ja) * | 2000-08-01 | 2009-05-27 | 株式会社Sumco | 半導体基板と電界効果型トランジスタ並びにSiGe層の形成方法及びこれを用いた歪みSi層の形成方法と電界効果型トランジスタの製造方法 |
| DE60125952T2 (de) * | 2000-08-16 | 2007-08-02 | Massachusetts Institute Of Technology, Cambridge | Verfahren für die herstellung eines halbleiterartikels mittels graduellem epitaktischen wachsen |
| US6594293B1 (en) * | 2001-02-08 | 2003-07-15 | Amberwave Systems Corporation | Relaxed InxGa1-xAs layers integrated with Si |
| US6589856B2 (en) * | 2001-08-06 | 2003-07-08 | Motorola, Inc. | Method and apparatus for controlling anti-phase domains in semiconductor structures and devices |
| JP2003128494A (ja) * | 2001-10-22 | 2003-05-08 | Sharp Corp | 半導体装置の製造方法及び半導体装置 |
| US6515335B1 (en) * | 2002-01-04 | 2003-02-04 | International Business Machines Corporation | Method for fabrication of relaxed SiGe buffer layers on silicon-on-insulators and structures containing the same |
| US6649492B2 (en) | 2002-02-11 | 2003-11-18 | International Business Machines Corporation | Strained Si based layer made by UHV-CVD, and devices therein |
| JP2003234289A (ja) * | 2002-02-12 | 2003-08-22 | Yoshihisa Hirose | 歪み緩和膜の製造方法、および、歪み緩和膜を有する積層体 |
| JP2003282471A (ja) * | 2002-03-20 | 2003-10-03 | Sharp Corp | 半導体基板の製造方法 |
| JP3719998B2 (ja) | 2002-04-01 | 2005-11-24 | 松下電器産業株式会社 | 半導体装置の製造方法 |
| DE10218381A1 (de) | 2002-04-24 | 2004-02-26 | Forschungszentrum Jülich GmbH | Verfahren zur Herstellung einer oder mehrerer einkristalliner Schichten mit jeweils unterschiedlicher Gitterstruktur in einer Ebene einer Schichtenfolge |
| JP2004014856A (ja) * | 2002-06-07 | 2004-01-15 | Sharp Corp | 半導体基板の製造方法及び半導体装置の製造方法 |
| US6703293B2 (en) * | 2002-07-11 | 2004-03-09 | Sharp Laboratories Of America, Inc. | Implantation at elevated temperatures for amorphization re-crystallization of Si1-xGex films on silicon substrates |
| US6841457B2 (en) * | 2002-07-16 | 2005-01-11 | International Business Machines Corporation | Use of hydrogen implantation to improve material properties of silicon-germanium-on-insulator material made by thermal diffusion |
| JP2004079912A (ja) * | 2002-08-21 | 2004-03-11 | Sharp Corp | 半導体基板改質方法およびこの方法を用いた半導体装置 |
| JP4289864B2 (ja) * | 2002-10-22 | 2009-07-01 | シャープ株式会社 | 半導体装置及び半導体装置製造方法 |
| US7071014B2 (en) * | 2002-10-30 | 2006-07-04 | Amberwave Systems Corporation | Methods for preserving strained semiconductor substrate layers during CMOS processing |
| US7169619B2 (en) * | 2002-11-19 | 2007-01-30 | Freescale Semiconductor, Inc. | Method for fabricating semiconductor structures on vicinal substrates using a low temperature, low pressure, alkaline earth metal-rich process |
| US6903384B2 (en) * | 2003-01-15 | 2005-06-07 | Sharp Laboratories Of America, Inc. | System and method for isolating silicon germanium dislocation regions in strained-silicon CMOS applications |
| JP4853990B2 (ja) * | 2003-01-29 | 2012-01-11 | ソイテック | 絶縁体上に歪み結晶層を製造する方法、前記方法による半導体構造及び製造された半導体構造 |
-
2003
- 2003-03-10 DE DE10310740A patent/DE10310740A1/de not_active Withdrawn
-
2004
- 2004-02-06 JP JP2006504230A patent/JP5122130B2/ja not_active Expired - Lifetime
- 2004-02-06 WO PCT/DE2004/000200 patent/WO2004082001A1/de not_active Ceased
- 2004-02-06 AT AT04708713T patent/ATE464651T1/de active
- 2004-02-06 EP EP04708713A patent/EP1604390B9/de not_active Expired - Lifetime
- 2004-02-06 US US10/548,620 patent/US7442657B2/en not_active Expired - Fee Related
- 2004-02-06 DE DE502004011040T patent/DE502004011040D1/de not_active Expired - Lifetime
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6154475A (en) * | 1997-12-04 | 2000-11-28 | The United States Of America As Represented By The Secretary Of The Air Force | Silicon-based strain-symmetrized GE-SI quantum lasers |
| US20020140031A1 (en) * | 2001-03-31 | 2002-10-03 | Kern Rim | Strained silicon on insulator structures |
| US20020185686A1 (en) * | 2001-06-12 | 2002-12-12 | International Business Machines Corporation | Relaxed SiGe layers on Si or silicon-on-insulator substrates by ion implantation and thermal annealing |
Non-Patent Citations (2)
| Title |
|---|
| LIED.Y.C et al: Dependence of damage and strain on the temperature of S: irradiation in epitaxial Ge 010 bi090 films on bi (100). In: Journ. Of App, Phys., Vol.77, Issue 6 pp, 2326-2338 Epitaxial growtn and optical proputics of II-VI compornd semiconductors for optrelectronic deviues. In: ITEE Seminar, 8.6.2000 |
| LIED.Y.C et al: Dependence of damage and strain onthe temperature of S: irradiation in epitaxial Ge 010 bi090 films on bi (100). In: Journ. Of App, Phys., Vol.77, Issue 6 pp, 2326-2338 Epitaxial growtn and optical proputics of II-VI compornd semiconductors for optrelectronic deviues. In: ITEE Seminar, 8.6.2000 * |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE102014210406B4 (de) | 2013-06-10 | 2020-06-18 | Globalfoundries Inc. | Verfahren zur Herstellung eines Transistors mit einem verspannten Kanalgebiet |
Also Published As
| Publication number | Publication date |
|---|---|
| EP1604390B1 (de) | 2010-04-14 |
| US20060166475A1 (en) | 2006-07-27 |
| US7442657B2 (en) | 2008-10-28 |
| JP2006522469A (ja) | 2006-09-28 |
| DE502004011040D1 (de) | 2010-05-27 |
| WO2004082001A1 (de) | 2004-09-23 |
| JP5122130B2 (ja) | 2013-01-16 |
| EP1604390B9 (de) | 2010-09-15 |
| EP1604390A1 (de) | 2005-12-14 |
| ATE464651T1 (de) | 2010-04-15 |
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