DE102014221620B4 - Halbleitervorrichtung - Google Patents

Halbleitervorrichtung Download PDF

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Publication number
DE102014221620B4
DE102014221620B4 DE102014221620.6A DE102014221620A DE102014221620B4 DE 102014221620 B4 DE102014221620 B4 DE 102014221620B4 DE 102014221620 A DE102014221620 A DE 102014221620A DE 102014221620 B4 DE102014221620 B4 DE 102014221620B4
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Prior art keywords
layer
metal layer
barrier metal
semiconductor device
opening
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DE102014221620.6A
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German (de)
English (en)
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DE102014221620A1 (de
Inventor
c/o Mitsubishi Electric Corp. Koyama Hidetoshi
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Mitsubishi Electric Corp
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Mitsubishi Electric Corp
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/021—Manufacture or treatment of interconnections within wafers or substrates
    • H10W20/023—Manufacture or treatment of interconnections within wafers or substrates the interconnections being through-semiconductor vias
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/021—Manufacture or treatment of interconnections within wafers or substrates
    • H10W20/023—Manufacture or treatment of interconnections within wafers or substrates the interconnections being through-semiconductor vias
    • H10W20/0234—Manufacture or treatment of interconnections within wafers or substrates the interconnections being through-semiconductor vias comprising etching via holes that stop on pads or on electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/021—Manufacture or treatment of interconnections within wafers or substrates
    • H10W20/023—Manufacture or treatment of interconnections within wafers or substrates the interconnections being through-semiconductor vias
    • H10W20/0242—Manufacture or treatment of interconnections within wafers or substrates the interconnections being through-semiconductor vias comprising etching via holes from the back sides of the chips, wafers or substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/021—Manufacture or treatment of interconnections within wafers or substrates
    • H10W20/023—Manufacture or treatment of interconnections within wafers or substrates the interconnections being through-semiconductor vias
    • H10W20/0261—Manufacture or treatment of interconnections within wafers or substrates the interconnections being through-semiconductor vias characterised by the filling method or the material of the conductive fill
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/20—Interconnections within wafers or substrates, e.g. through-silicon vias [TSV]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/019—Manufacture or treatment of bond pads
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/019—Manufacture or treatment of bond pads
    • H10W72/01931—Manufacture or treatment of bond pads using blanket deposition
    • H10W72/01933—Manufacture or treatment of bond pads using blanket deposition in liquid form, e.g. spin coating, spray coating or immersion coating
    • H10W72/01935—Manufacture or treatment of bond pads using blanket deposition in liquid form, e.g. spin coating, spray coating or immersion coating by plating, e.g. electroless plating or electroplating
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/019—Manufacture or treatment of bond pads
    • H10W72/01931—Manufacture or treatment of bond pads using blanket deposition
    • H10W72/01938—Manufacture or treatment of bond pads using blanket deposition in gaseous form, e.g. by CVD or PVD
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/019—Manufacture or treatment of bond pads
    • H10W72/01951—Changing the shapes of bond pads
    • H10W72/01953—Changing the shapes of bond pads by etching
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/30—Die-attach connectors
    • H10W72/341—Dispositions of die-attach connectors, e.g. layouts
    • H10W72/342—Dispositions of die-attach connectors, e.g. layouts relative to the surface, e.g. recessed, protruding
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/30—Die-attach connectors
    • H10W72/351—Materials of die-attach connectors
    • H10W72/352—Materials of die-attach connectors comprising metals or metalloids, e.g. solders
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/59—Bond pads specially adapted therefor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/921—Structures or relative sizes of bond pads
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/921—Structures or relative sizes of bond pads
    • H10W72/923—Bond pads having multiple stacked layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/941—Dispositions of bond pads
    • H10W72/942—Dispositions of bond pads relative to underlying supporting features, e.g. bond pads, RDLs or vias
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/951—Materials of bond pads
    • H10W72/952—Materials of bond pads comprising metals or metalloids, e.g. PbSn, Ag or Cu

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Chemical & Material Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • Materials Engineering (AREA)
DE102014221620.6A 2013-11-29 2014-10-24 Halbleitervorrichtung Active DE102014221620B4 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2013247862A JP6277693B2 (ja) 2013-11-29 2013-11-29 半導体装置
JP2013-247862 2013-11-29

Publications (2)

Publication Number Publication Date
DE102014221620A1 DE102014221620A1 (de) 2015-06-03
DE102014221620B4 true DE102014221620B4 (de) 2018-08-02

Family

ID=53058633

Family Applications (1)

Application Number Title Priority Date Filing Date
DE102014221620.6A Active DE102014221620B4 (de) 2013-11-29 2014-10-24 Halbleitervorrichtung

Country Status (5)

Country Link
US (1) US9355937B2 (https=)
JP (1) JP6277693B2 (https=)
KR (1) KR101596232B1 (https=)
CN (1) CN104681541B (https=)
DE (1) DE102014221620B4 (https=)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107980171B (zh) * 2016-12-23 2022-06-24 苏州能讯高能半导体有限公司 半导体芯片、半导体晶圆及半导体晶圆的制造方法
JP6863574B2 (ja) * 2017-02-22 2021-04-21 住友電工デバイス・イノベーション株式会社 半導体装置の製造方法
JP2019145546A (ja) * 2018-02-16 2019-08-29 住友電工デバイス・イノベーション株式会社 半導体装置の製造方法
US10967463B2 (en) * 2018-04-11 2021-04-06 The University Of Toledo Sn whisker growth mitigation using NiO sublayers
US12028042B2 (en) 2018-12-27 2024-07-02 Daishinku Corporation Piezoelectric resonator device having a through hole and through electrode for conduction with an external electrode terminal
CN109920757B (zh) * 2019-01-31 2020-08-25 厦门市三安集成电路有限公司 一种提高化合物半导体器件可靠性能的背段工艺
US10861792B2 (en) * 2019-03-25 2020-12-08 Raytheon Company Patterned wafer solder diffusion barrier
CN113809030B (zh) * 2021-11-16 2022-03-15 深圳市时代速信科技有限公司 半导体器件和半导体器件的制备方法
WO2026070308A1 (ja) * 2024-09-27 2026-04-02 株式会社大真空 圧電振動デバイスおよび圧電振動デバイス製造方法

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5378926A (en) 1991-09-30 1995-01-03 Hughes Aircraft Company Bonding of integrated circuit chip to carrier using gold/tin eutectic alloy and refractory metal nitride barrier layer to block migration of tin through via holes
JPH0766384A (ja) 1993-08-23 1995-03-10 Matsushita Electric Ind Co Ltd 半導体装置の製造方法
US5483092A (en) 1993-06-24 1996-01-09 Mitsubishi Denki Kabushiki Kaisha Semiconductor device having a via-hole with a void area for reduced cracking
DE19811042A1 (de) 1997-04-24 1998-10-29 Mitsubishi Electric Corp Halbleiterbauelement, Verfahren zu seiner Herstellung und dafür verwendetes Ätzmittel
JP2007095853A (ja) 2005-09-27 2007-04-12 Matsushita Electric Ind Co Ltd 半導体装置及びその製造方法
US20100164122A1 (en) 2008-12-26 2010-07-01 Canon Kabushiki Kaisha Method of forming conductive layer and semiconductor device
DE102009044086A1 (de) 2009-09-23 2011-03-24 United Monolithic Semiconductors Gmbh Verfahren zur Herstellung eines elektronischen Bauteils und nach diesem Verfahren hergestelltes elektronisches Bauteil

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JPS63127550A (ja) * 1986-11-17 1988-05-31 Nec Corp 半導体装置の製造方法
US4827610A (en) * 1987-08-31 1989-05-09 Texas Instruments Incorporated Method of creating solder or brazing barriers
JPH07193214A (ja) * 1993-12-27 1995-07-28 Mitsubishi Electric Corp バイアホール及びその形成方法
US6541301B1 (en) * 1999-02-12 2003-04-01 Brook David Raymond Low RF loss direct die attach process and apparatus
JP2003045877A (ja) * 2001-08-01 2003-02-14 Sharp Corp 半導体装置およびその製造方法
US6764810B2 (en) * 2002-04-25 2004-07-20 Taiwan Semiconductor Manufacturing Co., Ltd Method for dual-damascene formation using a via plug
US20030203210A1 (en) * 2002-04-30 2003-10-30 Vitex Systems, Inc. Barrier coatings and methods of making same
JP5162909B2 (ja) * 2006-04-03 2013-03-13 豊田合成株式会社 半導体発光素子
CN102237339B (zh) * 2010-04-28 2013-07-03 中国科学院微电子研究所 一种芯片背面金属起镀层结构及其制备方法
KR101781620B1 (ko) * 2010-09-01 2017-09-25 삼성전자주식회사 모오스 트랜지스터의 제조방법
TWI497602B (zh) * 2011-02-15 2015-08-21 Tzu Hsiung Chen 溝渠式蕭基二極體及其製作方法
US20120273948A1 (en) * 2011-04-27 2012-11-01 Nanya Technology Corporation Integrated circuit structure including a copper-aluminum interconnect and method for fabricating the same
JP2013128062A (ja) * 2011-12-19 2013-06-27 Elpida Memory Inc 半導体装置の製造方法
US8754531B2 (en) * 2012-03-14 2014-06-17 Nanya Technology Corp. Through-silicon via with a non-continuous dielectric layer
JP6002447B2 (ja) 2012-05-30 2016-10-05 株式会社Ｆｕｊｉｙａ 樹脂発泡ボード

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5378926A (en) 1991-09-30 1995-01-03 Hughes Aircraft Company Bonding of integrated circuit chip to carrier using gold/tin eutectic alloy and refractory metal nitride barrier layer to block migration of tin through via holes
US5483092A (en) 1993-06-24 1996-01-09 Mitsubishi Denki Kabushiki Kaisha Semiconductor device having a via-hole with a void area for reduced cracking
JPH0766384A (ja) 1993-08-23 1995-03-10 Matsushita Electric Ind Co Ltd 半導体装置の製造方法
DE19811042A1 (de) 1997-04-24 1998-10-29 Mitsubishi Electric Corp Halbleiterbauelement, Verfahren zu seiner Herstellung und dafür verwendetes Ätzmittel
JPH10303198A (ja) 1997-04-24 1998-11-13 Mitsubishi Electric Corp 半導体装置及びその製造方法とエッチャント
JP2007095853A (ja) 2005-09-27 2007-04-12 Matsushita Electric Ind Co Ltd 半導体装置及びその製造方法
US20100164122A1 (en) 2008-12-26 2010-07-01 Canon Kabushiki Kaisha Method of forming conductive layer and semiconductor device
DE102009044086A1 (de) 2009-09-23 2011-03-24 United Monolithic Semiconductors Gmbh Verfahren zur Herstellung eines elektronischen Bauteils und nach diesem Verfahren hergestelltes elektronisches Bauteil

Also Published As

Publication number Publication date
KR20150062963A (ko) 2015-06-08
US20150155224A1 (en) 2015-06-04
US9355937B2 (en) 2016-05-31
JP2015106638A (ja) 2015-06-08
KR101596232B1 (ko) 2016-02-22
CN104681541B (zh) 2018-06-29
JP6277693B2 (ja) 2018-02-14
DE102014221620A1 (de) 2015-06-03
CN104681541A (zh) 2015-06-03

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