CN207800597U - 半导体装置 - Google Patents

半导体装置 Download PDF

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Publication number
CN207800597U
CN207800597U CN201820270365.XU CN201820270365U CN207800597U CN 207800597 U CN207800597 U CN 207800597U CN 201820270365 U CN201820270365 U CN 201820270365U CN 207800597 U CN207800597 U CN 207800597U
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China
Prior art keywords
wiring
insulating film
opening
pad
film
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CN201820270365.XU
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Chinese (zh)
Inventor
萱岛祐治
关口智久
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Renesas Electronics Corp
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Renesas Electronics Corp
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    • H01L2224/29298—Fillers
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    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73203—Bump and layer connectors
    • H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
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    • H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92—Specific sequence of method steps
    • H01L2224/921—Connecting a surface with connectors of different types
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    • H01L2224/92125—Sequential connecting processes the first connecting process involving a bump connector the second connecting process involving a layer connector
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    • H01L2224/93—Batch processes
    • H01L2224/94—Batch processes at wafer-level, i.e. with connecting carried out on a wafer comprising a plurality of undiced individual devices
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    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/11—Manufacturing methods
    • H—ELECTRICITY
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    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • H—ELECTRICITY
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    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/35—Mechanical effects
    • H01L2924/351—Thermal stress
    • H01L2924/3512—Cracking

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CN108511410A (zh) * 2017-02-27 2018-09-07 瑞萨电子株式会社 半导体装置
CN111445935A (zh) * 2019-01-16 2020-07-24 爱思开海力士有限公司 半导体装置

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DE112018002118T5 (de) * 2017-09-19 2020-01-02 Murata Manufacturing Co., Ltd. Kondensator
US20210020455A1 (en) * 2019-07-17 2021-01-21 Nanya Technology Corporation Conductive via structure
CN115714161A (zh) * 2022-02-25 2023-02-24 友达光电股份有限公司 用于显示装置的电路板结构

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JP2838933B2 (ja) 1991-01-22 1998-12-16 日本電気株式会社 樹脂封止型半導体集積回路
JP3416545B2 (ja) 1998-12-10 2003-06-16 三洋電機株式会社 チップサイズパッケージ及びその製造方法
JP2003264256A (ja) 2002-03-08 2003-09-19 Hitachi Ltd 半導体装置
US7241636B2 (en) * 2005-01-11 2007-07-10 Freescale Semiconductor, Inc. Method and apparatus for providing structural support for interconnect pad while allowing signal conductance
CN105051886B (zh) * 2013-03-25 2018-06-08 瑞萨电子株式会社 半导体装置及其制造方法
JP6836418B2 (ja) * 2017-02-27 2021-03-03 ルネサスエレクトロニクス株式会社 半導体装置

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CN108511410A (zh) * 2017-02-27 2018-09-07 瑞萨电子株式会社 半导体装置
CN108511410B (zh) * 2017-02-27 2025-07-01 瑞萨电子株式会社 半导体装置
CN111445935A (zh) * 2019-01-16 2020-07-24 爱思开海力士有限公司 半导体装置
CN111445935B (zh) * 2019-01-16 2023-04-11 爱思开海力士有限公司 半导体装置

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