CN207320090U - 电子器件和电子芯片 - Google Patents
电子器件和电子芯片 Download PDFInfo
- Publication number
- CN207320090U CN207320090U CN201721209121.2U CN201721209121U CN207320090U CN 207320090 U CN207320090 U CN 207320090U CN 201721209121 U CN201721209121 U CN 201721209121U CN 207320090 U CN207320090 U CN 207320090U
- Authority
- CN
- China
- Prior art keywords
- back side
- electronic chip
- electronic
- chip
- electronic device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/367—Cooling facilitated by shape of device
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
- H01L21/3043—Making grooves, e.g. cutting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4871—Bases, plates or heatsinks
- H01L21/4882—Assembly of heatsink parts
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L21/6836—Wafer tapes, e.g. grinding or dicing support tapes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3157—Partial encapsulation or coating
- H01L23/3178—Coating or filling in grooves made in the semiconductor body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/367—Cooling facilitated by shape of device
- H01L23/3672—Foil-like cooling fins or heat sinks
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/367—Cooling facilitated by shape of device
- H01L23/3675—Cooling facilitated by shape of device characterised by the shape of the housing
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
- H01L23/3733—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon having a heterogeneous or anisotropic structure, e.g. powder or fibres in a matrix, wire mesh, porous structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
- H01L23/3737—Organic materials with or without a thermoconductive filler
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
- H01L24/39—Structure, shape, material or disposition of the strap connectors after the connecting process
- H01L24/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/68327—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/6834—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used to protect an active side of a device or wafer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/16227—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/16235—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a via metallisation of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/27—Manufacturing methods
- H01L2224/274—Manufacturing methods by blanket deposition of the material of the layer connector
- H01L2224/2741—Manufacturing methods by blanket deposition of the material of the layer connector in liquid form
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/27—Manufacturing methods
- H01L2224/278—Post-treatment of the layer connector
- H01L2224/27848—Thermal treatments, e.g. annealing, controlled cooling
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
- H01L2224/29199—Material of the matrix
- H01L2224/2929—Material of the matrix with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
- H01L2224/29298—Fillers
- H01L2224/29299—Base material
- H01L2224/293—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/29317—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
- H01L2224/29324—Aluminium [Al] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
- H01L2224/29298—Fillers
- H01L2224/29299—Base material
- H01L2224/293—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/29338—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/29347—Copper [Cu] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
- H01L2224/36—Structure, shape, material or disposition of the strap connectors prior to the connecting process
- H01L2224/37—Structure, shape, material or disposition of the strap connectors prior to the connecting process of an individual strap connector
- H01L2224/37001—Core members of the connector
- H01L2224/3701—Shape
- H01L2224/37012—Cross-sectional shape
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
- H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
- H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
- H01L2224/401—Disposition
- H01L2224/40151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/40221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/40225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/40227—Connecting the strap to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
- H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
- H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
- H01L2224/404—Connecting portions
- H01L2224/40475—Connecting portions connected to auxiliary connecting means on the bonding areas
- H01L2224/40499—Material of the auxiliary connecting means
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73253—Bump and layer connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73255—Bump and strap connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8336—Bonding interfaces of the semiconductor or solid state body
- H01L2224/83365—Shape, e.g. interlocking features
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/84—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
- H01L2224/8436—Bonding interfaces of the semiconductor or solid state body
- H01L2224/84365—Shape, e.g. interlocking features
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/84—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
- H01L2224/848—Bonding techniques
- H01L2224/8485—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/42—Fillings or auxiliary members in containers or encapsulations selected or arranged to facilitate heating or cooling
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
- H01L23/49816—Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49827—Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L24/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/27—Manufacturing methods
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
- H01L24/36—Structure, shape, material or disposition of the strap connectors prior to the connecting process
- H01L24/37—Structure, shape, material or disposition of the strap connectors prior to the connecting process of an individual strap connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/84—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/1015—Shape
- H01L2924/10155—Shape being other than a cuboid
- H01L2924/10158—Shape being other than a cuboid at the passive surface
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
Abstract
公开了电子器件和电子芯片。一种电子器件包括具有安装面的支承板。电子芯片具有安装在支承板的安装面上的正面。电子芯片的位于与正面相对的背面设置有背面槽,背面槽在槽之间限定背面区域。由导热材料制成的背面层散布在电子芯片的背面上方,以便至少部分地覆盖背面区域并且至少部分地填充背面槽。
Description
优先权声明
本申请要求于2017年1月3日提交的专利No.1750049的法国申请的优先权,其公开内容在法律允许的最大范围内通过引用整体并入本文。
技术领域
本实用新型涉及包括电子芯片的电子器件的领域。
背景技术
一些电子芯片产生热量。众所周知,有很多被放置在芯片的直接环境中的散热装置。然而,技术的趋势是使得要排放的热量越来越显著。
本领域需要改进由电子芯片产生的热量的耗散。
实用新型内容
本实用新型的实施例的目的在于提供具有改进的散热特性的电子器件和电子芯片。
根据一个实施例,提出了一种电子器件,包括:支承板,具有安装面;电子芯片,具有正面和与所述正面相对的背面,所述电子芯片在一位置中安装到所述支承板使得所述电子芯片的正面面向所述支承板的安装面,其中所述电子芯片的背面包括多个背面槽,所述背面槽在所述电子芯片的背面中在所述背面槽之间限定多个背面区域;以及背面层,由导热材料制成,所述导热材料散布在所述电子芯片的背面上方以便至少部分地覆盖所述背面区域并且至少部分地填充所述背面槽。
由所述导热材料制成的所述背面层覆盖所述电子芯片的整个背面并且完全填充所述电子芯片的所述背面槽。
所述电子器件还包括附接到所述背面层的背面的散热部件。
所述散热部件包括形成散热器的板。
所述电子器件还包括杯子形式的芯片封装盖,所述芯片封装盖具有附接到所述背面层的背面的中央部分并且具有周边部分,所述周边部分具有经由局部固定层安装到所述支承板的所述安装面的表面。
所述背面层包括填充有金属颗粒的环氧树脂。
所述电子芯片的正面包括包含电子部件和电连接装置的层。
所述背面槽以行和列布置。
所述电子芯片经由电连接元件安装在所述支承板上。
根据另一个实施例,还提出了一种电子芯片,其具有设置有电连接接触焊盘的正面、以及背面,所述背面包括多个背面槽和背面层,所述背面槽在所述背面中在所述背面槽之间限定多个背面区域,所述背面层由导热材料制成,所述导热材料散布在所述背面上方以便至少部分地覆盖所述背面区域并且至少部分地填充所述背面槽。
由所述导热材料制成的所述背面层覆盖整个所述背面并且完全填充所述背面槽。
所述背面层包括填充有金属颗粒的环氧树脂。
所述正面还包括电连接到所述电连接接触焊盘的电子部件。
所述背面槽以行和列布置。
根据本实用新型的实施例的电子器件和电子芯片具有改进的散热特性。
附图说明
现在将在附图中示出的非限制性示例性实施例中描述电子器件,在附图中:
图1表示电子器件的截面;
图2表示图1的电子器件的电子芯片的背视图;
图3表示设置有散热器的图1的电子器件的截面;以及
图4表示设置有另一散热器的图1的电子器件的截面。
具体实施方式
图1和图2示出了电子器件1,电子器件1包括由电介质材料制成的支承板2,支承板2具有正安装面3和背面4,支承板2包括电连接网络5,其具有在正面3上的电接触件6和在背面4上的电接触件7。
电子器件1包括电子芯片8,电子芯片8具有正面9和背面10,背面10与正面9相对并且平行于正面9,并且电子芯片8在其背面10一侧包括例如由诸如硅等半导体材料制成的衬底晶片11以及在其正面9一侧包括层12,层12包括形成在衬底晶片11上的电子部件和电连接网络。
电子芯片8经由焊接的电连接元件13(例如球)在一位置中安装在支承板2上使得芯片8的正面9面向支承板2的安装面3,电连接元件13将芯片8的层12的电连接网络与支承板2的正面接触焊盘6链接。
芯片8的背面10设置有多个背面槽14,多个背面槽14形成在衬底晶片11中,使得芯片8的背面10在槽14之间具有背面区域15。
作为图1和图2所示的示例,背面槽14构成与芯片8的侧面平行地延伸的以正方形矩阵形式的槽的行和列,并且分别从一个边缘延伸到另一边缘。
背面槽14可以通过使用铣削或锯切工具、激光设备进行加工或通过等离子体蚀刻来制造。
有利地,背面槽14可以在多个电子芯片8的集合制造期间产生,其包括以下步骤。
在粘合锯切膜上安装半导体衬底晶片,半导体衬底晶片包括在正面上和正面中的多个电子电路,所述正面面向所述粘合膜。
在半导体衬底晶片的厚度的一部分上并且沿着形成多个集合槽的多个锯切线锯切半导体衬底晶片的背面。
然后,沿着位于所述电子电路之间的切割线在半导体衬底晶片的整个厚度上锯切半导体衬底晶片,以便获得各个电子芯片8,使得每个芯片8的背面具有通过槽14分隔的背面区域15,槽14由所述集合槽中的各部分形成。
电子器件1还包括由导热材料制成的背面层16,导热材料散布在芯片8的背面10上方,以覆盖芯片8的背面10的区域15并且填充芯片8的背面槽14,有利地没有间断。背面层16具有例如平坦的背面17,背面17位于与芯片8的背面10相距一定距离处并且确定其在背面区域15上方和在背面槽14上方的厚度。
因此,从芯片8传递到背面层16的热通量经由芯片8与背面层16之间的增加的界面来发生,该界面包括背面区域15和背面槽14的壁。由背面层16捕获的热通量经由该背面层16的背面17被排放。
根据变型实施例,背面槽16可以在芯片8的背面10的局部区域上生产,并且背面层16可以局限于该区域。
导热的背面层16可以是合适的粘合剂填充树脂,特别地是填充有金属颗粒(特别是铜或铝)的环氧树脂。对于其应用,物质可以以液体或糊状状态散布在背面10上方,然后被硬化。
根据图1所示的变型实施例,导热的背面层16的背面17暴露于露天。
根据图3所示的变型实施例,电子器件1包括附接到导热的背面层16的背面17的散热部件18。根据示例性实施例,用于耗散经由背面层16来自芯片8的热量的部件18可以采用具有适于构成散热器的形式的金属板的形式。
根据图4所示的变型实施例,电子器件1包括用于将芯片8封装在支承板2上方的金属盖19。
封装盖19采用杯子形式,并且包括附接到导热的背面层16的背面17的平坦的中央部分19a和偏移的周边部分19b,周边部分19b以一定距离围绕芯片8的周边并且经由局部胶层20固定到支承板2的安装面3上,局部胶层20优选地是由导热材料制成的胶,例如类似于背面层16的粘合剂。因此,封装盖19构成经由背面层16来自芯片8的热量的耗散器。
根据变型实施例,封装盖19是金属,并且局部胶层20也是导电的并且在支承板2的正面接触焊盘6处被固定到支承板2的安装面3上,这些正面接触焊盘经由电连接网络5连接到背面4上的电接触件7。封装盖19因此可以连接到接地并且还形成用于芯片8的电磁屏蔽。
Claims (14)
1.一种电子器件,其特征在于,包括:
支承板,具有安装面;
电子芯片,具有正面和与所述正面相对的背面,所述电子芯片在一位置中安装到所述支承板使得所述电子芯片的正面面向所述支承板的安装面,其中所述电子芯片的背面包括多个背面槽,所述背面槽在所述电子芯片的背面中在所述背面槽之间限定多个背面区域;以及
背面层,由导热材料制成,所述导热材料散布在所述电子芯片的背面上方以便至少部分地覆盖所述背面区域并且至少部分地填充所述背面槽。
2.根据权利要求1所述的电子器件,其特征在于,由所述导热材料制成的所述背面层覆盖所述电子芯片的整个背面并且完全填充所述电子芯片的所述背面槽。
3.根据权利要求1所述的电子器件,其特征在于,还包括附接到所述背面层的背面的散热部件。
4.根据权利要求3所述的电子器件,其特征在于,所述散热部件包括形成散热器的板。
5.根据权利要求1所述的电子器件,其特征在于,还包括杯子形式的芯片封装盖,所述芯片封装盖具有附接到所述背面层的背面的中央部分并且具有周边部分,所述周边部分具有经由局部固定层安装到所述支承板的所述安装面的表面。
6.根据权利要求1所述的电子器件,其特征在于,所述背面层包括填充有金属颗粒的环氧树脂。
7.根据权利要求1所述的电子器件,其特征在于,所述电子芯片的正面包括包含电子部件和电连接装置的层。
8.根据权利要求1所述的电子器件,其特征在于,所述背面槽以行和列布置。
9.根据权利要求1所述的电子器件,其特征在于,所述电子芯片经由电连接元件安装在所述支承板上。
10.一种电子芯片,其特征在于,具有设置有电连接接触焊盘的正面、以及背面,所述背面包括多个背面槽和背面层,所述背面槽在所述背面中在所述背面槽之间限定多个背面区域,所述背面层由导热材料制成,所述导热材料散布在所述背面上方以便至少部分地覆盖所述背面区域并且至少部分地填充所述背面槽。
11.根据权利要求10所述的电子芯片,其特征在于,由所述导热材料制成的所述背面层覆盖整个所述背面并且完全填充所述背面槽。
12.根据权利要求10所述的电子芯片,其特征在于,所述背面层包括填充有金属颗粒的环氧树脂。
13.根据权利要求10所述的电子芯片,其特征在于,所述正面还包括电连接到所述电连接接触焊盘的电子部件。
14.根据权利要求10所述的电子芯片,其特征在于,所述背面槽以行和列布置。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR1750049A FR3061600B1 (fr) | 2017-01-03 | 2017-01-03 | Dispositif electronique comprenant une puce rainuree |
FR1750049 | 2017-01-03 |
Publications (1)
Publication Number | Publication Date |
---|---|
CN207320090U true CN207320090U (zh) | 2018-05-04 |
Family
ID=59070739
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201721209121.2U Active CN207320090U (zh) | 2017-01-03 | 2017-09-20 | 电子器件和电子芯片 |
CN201710855202.8A Pending CN108269772A (zh) | 2017-01-03 | 2017-09-20 | 包括开槽芯片的电子器件 |
Family Applications After (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201710855202.8A Pending CN108269772A (zh) | 2017-01-03 | 2017-09-20 | 包括开槽芯片的电子器件 |
Country Status (3)
Country | Link |
---|---|
US (1) | US20180190562A1 (zh) |
CN (2) | CN207320090U (zh) |
FR (1) | FR3061600B1 (zh) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN108269772A (zh) * | 2017-01-03 | 2018-07-10 | 意法半导体(格勒诺布尔2)公司 | 包括开槽芯片的电子器件 |
CN111799185A (zh) * | 2020-07-03 | 2020-10-20 | 徐彩芬 | 一种管芯封装结构及其制备方法 |
Families Citing this family (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR3061628A1 (fr) | 2017-01-03 | 2018-07-06 | Stmicroelectronics (Grenoble 2) Sas | Procede de fabrication d'un capot d'encapsulation pour boitier electronique et boitier electronique comprenant un capot |
FR3061629A1 (fr) * | 2017-01-03 | 2018-07-06 | Stmicroelectronics (Grenoble 2) Sas | Procede de fabrication d'un capot pour boitier electronique et boitier electronique comprenant un capot |
FR3061630B1 (fr) | 2017-01-03 | 2021-07-09 | St Microelectronics Grenoble 2 | Procede de fabrication d'un capot pour boitier electronique et boitier electronique comprenant un capot |
JP7414822B2 (ja) * | 2019-01-22 | 2024-01-16 | 長江存儲科技有限責任公司 | 集積回路パッケージング構造及びその製造方法 |
CN110246764A (zh) * | 2019-04-25 | 2019-09-17 | 北京燕东微电子有限公司 | 一种芯片封装工艺以及芯片封装结构 |
CN110148589B (zh) * | 2019-05-21 | 2020-11-03 | 上海理工大学 | 芯片组件以及基于脉管微通道的芯片制冷装置 |
CN111554644B (zh) * | 2020-06-12 | 2022-04-01 | 厦门通富微电子有限公司 | 一种芯片、芯片封装体及晶圆 |
CN111554586B (zh) * | 2020-06-12 | 2022-04-01 | 厦门通富微电子有限公司 | 一种芯片封装体的制备方法 |
CN113097079B (zh) * | 2021-03-31 | 2023-11-17 | 光华临港工程应用技术研发(上海)有限公司 | 一种功率半导体模块制造方法 |
TWI796726B (zh) * | 2021-07-13 | 2023-03-21 | 矽品精密工業股份有限公司 | 電子封裝件及其製法 |
Family Cites Families (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6225695B1 (en) * | 1997-06-05 | 2001-05-01 | Lsi Logic Corporation | Grooved semiconductor die for flip-chip heat sink attachment |
US6038133A (en) * | 1997-11-25 | 2000-03-14 | Matsushita Electric Industrial Co., Ltd. | Circuit component built-in module and method for producing the same |
JP3631956B2 (ja) * | 2000-05-12 | 2005-03-23 | 富士通株式会社 | 半導体チップの実装方法 |
US20030228908A1 (en) * | 2002-06-10 | 2003-12-11 | Daniel Caiafa | Statistics system for online console-based gaming |
US6984876B2 (en) * | 2004-05-27 | 2006-01-10 | Semiconductor Components Industries, L.L.C. | Semiconductor device formed having a metal layer for conducting the device current and for high contrast marking and method thereof |
CN1737072B (zh) * | 2004-08-18 | 2011-06-08 | 播磨化成株式会社 | 导电粘合剂及使用该导电粘合剂制造物件的方法 |
US7259458B2 (en) * | 2004-08-18 | 2007-08-21 | Advanced Micro Devices, Inc. | Integrated circuit with increased heat transfer |
US7112882B2 (en) * | 2004-08-25 | 2006-09-26 | Taiwan Semiconductor Manufacturing Co., Ltd. | Structures and methods for heat dissipation of semiconductor integrated circuits |
US8048781B2 (en) * | 2008-01-24 | 2011-11-01 | National Semiconductor Corporation | Methods and systems for packaging integrated circuits |
US8786076B2 (en) * | 2011-03-21 | 2014-07-22 | Stats Chippac, Ltd. | Semiconductor device and method of forming a thermally reinforced semiconductor die |
US8907461B1 (en) * | 2013-05-29 | 2014-12-09 | Intel Corporation | Heat dissipation device embedded within a microelectronic die |
FR3012670A1 (fr) * | 2013-10-30 | 2015-05-01 | St Microelectronics Grenoble 2 | Systeme electronique comprenant des dispositifs electroniques empiles munis de puces de circuits integres |
FR3061600B1 (fr) * | 2017-01-03 | 2020-06-26 | Stmicroelectronics (Grenoble 2) Sas | Dispositif electronique comprenant une puce rainuree |
-
2017
- 2017-01-03 FR FR1750049A patent/FR3061600B1/fr not_active Expired - Fee Related
- 2017-08-29 US US15/689,828 patent/US20180190562A1/en not_active Abandoned
- 2017-09-20 CN CN201721209121.2U patent/CN207320090U/zh active Active
- 2017-09-20 CN CN201710855202.8A patent/CN108269772A/zh active Pending
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN108269772A (zh) * | 2017-01-03 | 2018-07-10 | 意法半导体(格勒诺布尔2)公司 | 包括开槽芯片的电子器件 |
CN111799185A (zh) * | 2020-07-03 | 2020-10-20 | 徐彩芬 | 一种管芯封装结构及其制备方法 |
CN111799185B (zh) * | 2020-07-03 | 2022-04-19 | 徐彩芬 | 一种管芯封装结构及其制备方法 |
Also Published As
Publication number | Publication date |
---|---|
FR3061600B1 (fr) | 2020-06-26 |
CN108269772A (zh) | 2018-07-10 |
FR3061600A1 (fr) | 2018-07-06 |
US20180190562A1 (en) | 2018-07-05 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN207320090U (zh) | 电子器件和电子芯片 | |
US20170162542A1 (en) | Packages with Thermal Management Features for Reduced Thermal Crosstalk and Methods of Forming Same | |
JP5945326B2 (ja) | 放熱構造を備えた半導体装置 | |
JP4493121B2 (ja) | 半導体素子および半導体チップのパッケージ方法 | |
US20110049704A1 (en) | Semiconductor device packages with integrated heatsinks | |
CN104882422A (zh) | 堆叠封装结构 | |
US20070284704A1 (en) | Methods and apparatus for a semiconductor device package with improved thermal performance | |
TW200427029A (en) | Thermally enhanced semiconductor package and fabrication method thereof | |
CN103703549A (zh) | 用于直接表面安装的裸露芯片封装 | |
US20190109064A1 (en) | Chip package | |
CN106098648B (zh) | Igbt散热基板及其制造方法、igbt模组及其制造方法 | |
TWI555147B (zh) | 散熱型封裝結構及其散熱件 | |
US7361995B2 (en) | Molded high density electronic packaging structure for high performance applications | |
US7868472B2 (en) | Thermal dissipation in integrated circuit systems | |
CN103050455A (zh) | 堆叠封装结构 | |
US20110024895A1 (en) | Semiconductor Package Thermal Performance Enhancement and Method | |
TWI536515B (zh) | 具有散熱結構之半導體封裝元件及其封裝方法 | |
KR102519530B1 (ko) | 반도체 패키지 | |
US7235889B2 (en) | Integrated heatspreader for use in wire bonded ball grid array semiconductor packages | |
US11587887B2 (en) | Semiconductor device and manufacturing method thereof | |
CN104465556B (zh) | 晶圆封装结构 | |
CN113451244A (zh) | 双面散热的mosfet封装结构及其制造方法 | |
CN201229938Y (zh) | 芯片封装结构 | |
KR20090077203A (ko) | 반도체 패키지 | |
TWI837585B (zh) | 半導體裝置及半導體裝置之製造方法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
GR01 | Patent grant | ||
GR01 | Patent grant |