CN202473922U - 一种tft阵列基板及显示装置 - Google Patents

一种tft阵列基板及显示装置 Download PDF

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CN202473922U
CN202473922U CN2012201022269U CN201220102226U CN202473922U CN 202473922 U CN202473922 U CN 202473922U CN 2012201022269 U CN2012201022269 U CN 2012201022269U CN 201220102226 U CN201220102226 U CN 201220102226U CN 202473922 U CN202473922 U CN 202473922U
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张弥
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BOE Technology Group Co Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
    • H01L27/1244Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits for preventing breakage, peeling or short circuiting
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    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/136286Wiring, e.g. gate line, drain line
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1259Multistep manufacturing methods
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/136259Repairing; Defects
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/136286Wiring, e.g. gate line, drain line
    • G02F1/13629Multilayer wirings
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F2201/00Constructional arrangements not provided for in groups G02F1/00 - G02F7/00
    • G02F2201/12Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode
    • G02F2201/121Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode common or background

Abstract

本实用新型实施例提供一种TFT阵列基板及显示装置,涉及液晶显示领域,用于解决像素电极与公共电极线短接的问题。所述TFT阵列基板包括:栅线、数据线、以及所述栅线和所述数据线确定的像素单元,所述像素单元包括:公共电极线和像素电极,以及形成在所述公共电极线和像素电极之间的栅绝缘层、钝化层;在每个像素单元内,所述栅绝缘层与钝化层之间且与所述公共电极线正相对的位置上,设置有备用公共电极线;并且,所述备用公共电极线与所述数据线无电连接。本实用新型实施例适用于显示装置的生产。

Description

一种TFT阵列基板及显示装置
技术领域
本实用新型涉及液晶显示领域,尤其涉及一种TFT阵列基板及显示装置。
背景技术
TFT-LCD(Thin Film Transistor-Liquid Crystal Display,薄膜晶体管液晶显示器)具有体积小、功耗低、无辐射等特点,现已成为平板显示器市场中的主导产品,其中TFT阵列基板为TFT-LCD的主要组成部分。
现有技术中一种TFT阵列基板,如图1所示,包括:栅线19、数据线20、以及栅线19数据线20限定的像素单元;图1以一个像素单元作为示例,同时,参考图2所示的该像素单元在A-A的剖视图,可以看到该像素单元包括:公共电极线11,薄膜晶体管的栅极13、源极14和漏极15,栅绝缘层16,半导体有源层,钝化层17,像素电极12等;其中,像素电极12通过钝化层17与漏极15之间的钝化层过孔与漏极15相连。
虽然如图2所示,在公共电极线11和像素电极12之间设有栅绝缘层16和钝化层17,但在现有技术的刻蚀工艺条件下制作钝化层过孔时,一旦出现制作上的失误,因钝化层与栅绝缘层的材料相同或相近,会出现钝化层断裂和栅绝缘层在同一位置受到侵蚀而断裂的情况,若这一位置是公共电极线所在位置,则会导致了像素电极与公共电极线短接,进而造成在液晶显示面板(显示屏)上会产生亮点或亮线。
实用新型内容
本实用新型的实施例提供一种TFT阵列基板及显示装置,用于解决像素电极与公共电极线短接的问题。
为达到上述目的,本实用新型的实施例采用如下技术方案:
一方面,本实用新型实施例提供一种TFT阵列基板,包括:栅线、数据线、以及所述栅线和所述数据线确定的像素单元,所述像素单元包括:公共电极线和像素电极,以及形成在所述公共电极线和像素电极之间的栅绝缘层、钝化层;在每个像素单元内,所述栅绝缘层与钝化层之间且与所述公共电极线正相对的位置上,设置有备用公共电极线;并且,所述备用公共电极线与所述数据线无电连接。
其中,备用公共电极线可以采用与公共电极线相同的材料,例如:铜、钼等金属制作而成。
一方面,提供一种显示装置,包括上述的TFT阵列基板。
本实用新型实施例提供一种TFT阵列基板及显示装置,在每个像素单元内,所述栅绝缘层与钝化层之间且与所述公共电极线正相对的位置上,设置有备用公共电极线;并且,所述备用公共电极线与所述数据线无电连接。由于钝化层一般采用氮化硅的材料,备用公共电极线可以采用和公共电极线相同的材料,故刻蚀这两种材料的薄膜所使用的刻蚀方式不同;这样就使得在钝化层上制作过孔的过程中,即使出现失误而造成公共电极线上方的钝化层受到侵蚀而断裂,由于在钝化层上形成过孔所采用的刻蚀方式不会对备用公共电极线造成损害,当然在备用公共电极线位置下方的栅绝缘层也不会发生断裂,从而在一定程度上避免了像素电极与公共电极线短接,进而防止了亮点或亮线的出现。
附图说明
为了更清楚地说明本实用新型实施例或现有技术中的技术方案,下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍,显而易见地,下面描述中的附图仅仅是本实用新型的一些实施例,对于本领域普通技术人员来讲,在不付出创造性劳动的前提下,还可以根据这些附图获得其他的附图。
图1为现有技术中TFT阵列基板的俯视图;
图2为图1沿A-A线的截面图;
图3为本实用新型实施例提供的一种TFT阵列基板的俯视图;
图4为沿图3中A-A线的截面图;
图5为本实用新型实施例提供的另一TFT阵列基板的俯视图;
图6为沿图5中B-B线的截面图;
图7为图4中的钝化层断裂时的截面图。
附图标记:
11-公共电极线;12-像素电极;13-栅极、14-源极;15-漏极;16-栅绝缘层;17-钝化层;19-栅线;20-数据线;41-备用公共电极线;42-遮光条;43-备用遮光条。
具体实施方式
下面将结合本实用新型实施例中的附图,对本实用新型实施例中的技术方案进行清楚、完整地描述,显然,所描述的实施例仅仅是本实用新型一部分实施例,而不是全部的实施例。基于本实用新型中的实施例,本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例,都属于本实用新型保护的范围。
如图3所示,本实用新型实施例提供一种TFT阵列基板,包括:栅线19、数据线20、以及所述栅线19和所述数据线20确定的像素单元,所述像素单元包括:公共电极线11和像素电极12,以及形成在所述公共电极线11和像素电极12之间的栅绝缘层、钝化层;在每个像素单元内,所述栅绝缘层与钝化层之间且与所述公共电极线11正相对的位置上,设置有备用公共电极线41;并且,所述备用公共电极线41与所述数据线20无电连接。
其中,备用公共电极线可以采用与公共电极线相同的材料,例如:铜、钼等金属制作而成。
需要说明的是,为了将公共电极线11和备用公共电极线41同时表示在图3所示的俯视图中,故图3中两者的位置略有错位,但实际上备用公共电极线41设置在公共电极线11正对的位置上,这一正对的位置关系可以通过图4清楚的看到。另外,现有技术中,在同一行(与栅线平行)的所有像素单元的公共电极线是连在一起的,通常是一体结构;需要注意的是,本实用新型中增设的备用公共电极线41在每个像素单元内设置在公共电极线11正对的位置上,且虽然备用公共电极线41和数据线20都设在栅绝缘层与钝化层之间,但参考图3备用公共电极线41和数据线20并无电连接。
图4为图3所示的TFT阵列基板沿A-A线的剖视图,参考图4可以清楚看到,在像素电极12与公共电极线11之间设有栅绝缘层16、钝化层17、以及在栅绝缘层16与钝化层17之间且与公共电极线11正相对的位置上设置的备用公共电极线41。
这样,由于钝化层一般采用氮化硅的材料,备用公共电极线可以采用与公共电极线相同的材料,故刻蚀这两种材料的薄膜所使用的刻蚀方式不同;在制作钝化层过孔的过程中,如图7所示,即使出现失误而造成公共电极线上方的钝化层受到侵蚀而断裂,由于在钝化层上形成过孔所采用的刻蚀方式不会对备用公共电极线造成损害,则在备用公共电极线位置下方的栅绝缘层也不会发生断裂,从而在一定程度上避免了像素电极与公共电极线短接,进而防止了亮点或亮线的出现。
另外,当某一像素单元内的公共电极线11上出现断裂时,通过激光焊接等方法可以将该像素单元中的公共电极线11与备用公共电极线41连接,从而保证了公共电极线11上的电信号的正常传输。
优选的,所述备用公共电极线41与所述数据线20同层设置。在本实用新型所有实施例中,同层是指利用同种材料制成的一层薄膜,同层设置是针对至少两种图案而言的,是指至少两种图案设置在同一层薄膜上的结构,具体的,是通过构图工艺在同种材料制成的一层薄膜上形成所述至少两种图案。所述备用公共电极线41与所述数据线20同层设置这种结构的形成过程是,利用钼、铜等材料制作源漏金属薄膜,通过构图工艺将该源漏金属薄膜形成数据线、备用公共电极线41、以及薄膜晶体管的源极和漏极的图案。由于同层设置可以简化制作工艺,故而作为一优选方法。当然,在本实用新型实施例中备用公共电极线41与数据线20可以不同层设置,那么就需要制作两层薄膜用以分别图案化形成数据线和备用公共电极线,其制备方法可以有多种,在本实用新型实施例中不做限定。
所述像素单元还包括:遮光条42;所述遮光条42与所述公共电极线11可以为一体结构(根据实际情况,二者也可以为非一体结构),所述遮光条42用于减少漏光现象,其设置方式与现有结构相同。该遮光条改善像素单元中的漏光现象。在使用这种遮光条的情况下,当钝化层受到侵蚀而断裂时,因在钝化层上形成过孔时所进行的刻蚀过程(在该刻蚀过程中可以采用刻蚀溶液进行刻蚀,也可采用气体进行干法刻蚀),不会对备用公共电极线41造成损害,则在备用公共电极线41位置下方的栅绝缘层16不会发生断裂,则在备用公共电极线41所在区域内,防止了像素电极与公共电极线短接的情况;或者在钝化层受到挤压或掺入杂质等情况下,导致钝化层断裂时,因存在备用公共电极线41,下方的栅绝缘层16不会发生断裂,则在备用公共电极线41所在区域内,防止了像素电极与公共电极线短接的情况。为了进一步防止像素电极和遮光条的短接,故而本实用新型提供的TFT阵列基板,参考图5和图6,进一步的,在每个像素单元内,所述栅绝缘层16与钝化层17之间且与所述遮光条42相对的位置上,设置有备用遮光条43;并且,所述备用遮光条43与所述数据线20无电连接。
需要说明的是,将遮光条42与备用遮光条43同时表示在图5中,其相对位置略有错位,实际上遮光条42与备用遮光条43正对,在图6中,可以清楚看到遮光条42与备用遮光条43的正对位置关系。需要注意的是,虽然本实用新型中增设的备用遮光条43和数据线20都设置在栅绝缘层与钝化层之间,但参考图5备用遮光条43与数据线20无电连接。
现有技术中,当钝化层17和栅绝缘层16在遮光条所在区域的同一位置发生断裂时,像素电极12与遮光条42会发生电连接,因遮光条42与公共电极线11为一体结构,就会导致像素电极12与公共电极线11短接;本实用新型通过在栅绝缘层16与钝化层17之间设置备用遮光条43来防止像素电极12与遮光条42短接。
具体的,在设置备用遮光条43的情况下,当钝化层17受到侵蚀而断裂时,因在钝化层17上形成过孔时所进行的刻蚀过程(在该刻蚀过程中可以采用刻蚀溶液进行刻蚀,也可采用气体进行干法刻蚀)不会对备用遮光条43造成损害,使得备用遮光条43下方的栅绝缘层16不会发生断裂,则在备用遮光条43所在的区域内,防止了像素电极12与遮光条42短接;或者在钝化层17受到挤压或参入杂质等情况下,导致钝化层断裂时,因存在备用遮光条43,下方的栅绝缘层16不会发生断裂,则在备用遮光条43所在的区域内,防止了像素电极12与遮光条42短接,防止了像素电极12与遮光条42短接,进而防止了像素电极与公共电极线短接。
其中,备用遮光条和备用公共电极线可以不是一体结构,但在本实用新型中优选的,如图5所示,所述备用遮光条43和所述备用公共电极线41为一体结构;此时,在一个像素单元内,使得一体结构的备用遮光条和备用公共电极线与一体结构的遮光条和公共电极线整体上完全对应,这就防止在一体结构的遮光条和公共电极线所在区域的任一位置处和像素电极的短接。
优选的,在每个像素单元内,所述备用公共电极线的图案完全覆盖所述公共电极线的图案。在这种情况下,当钝化层受到侵蚀而断裂,因形成钝化层过孔采用刻蚀方式对备用公共电极线未造成损害,使得栅绝缘层未发生断裂,此时,因备用公共电极线的图案完全覆盖公共电极线图案,则公共电极线所在的区域能够完全避免与像素电极的短接。
又优选的,在每个像素单元内,所述备用遮光条的图案完全覆盖所述遮光条的图案。在这种情况下,当钝化层受到侵蚀而断裂,因形成钝化层过孔采用的刻蚀方式对备用遮光条未造成损害,使得栅绝缘层未发生断裂,此时,因备用遮光条的图案完全覆盖遮光条的图案,则遮光条所在的区域能够完全避免与像素电极的短接,进而避免了公共电极线与像素电极短接。
需要说明的是,上述在一个像素单元中的公共电极线的图案,以在该像素单元内公共电极线和像素电极重合的图案为准。上述完全覆盖是指从俯视的角度来看,上层图案将下层图案完全遮住;当然,完全覆盖包括完全重合的特殊情况。
优选的,所述备用遮光条43与所述数据线20同层设置。在备用遮光条43和备用公共电极线41为一体结构的情况下,优选的,所述备用公共电极线41、所述备用遮光条43与所述数据线20同层设置。具体的,通过构图工艺在同种材料制成的一层薄膜上形成备用公共电极线41、备用遮光条43、和数据线20三种图案。备用公共电极线41、备用遮光条43与数据线20同层设置这种结构的形成过程是:利用钼、铜等材料制作源漏金属薄膜,通过构图工艺将该源漏金属薄膜形成数据线、备用公共电极线、备用遮光条、以及薄膜晶体管的源极和漏极的图案。由于同层设置可以简化制作工艺,故而作为一优选方法。当然,在本实用新型实施例中备用遮光条43、备用公共电极线41与数据线20可以不同层设置,对此不做限定。
本实用新型实施例还提供一种显示装置,包括上述任一TFT阵列基板,具体的,该TFT阵列基板包括:栅线、数据线、以及所述栅线和所述数据线确定的像素单元,所述像素单元包括:公共电极线和像素电极,以及形成在所述公共电极线和像素电极之间的栅绝缘层、钝化层;在每个像素单元内,所述栅绝缘层与钝化层之间且与所述公共电极线正相对的位置上,设置有备用公共电极线;并且,所述备用公共电极线与所述数据线无电连接。
以上所述,仅为本实用新型的具体实施方式,但本实用新型的保护范围并不局限于此,任何熟悉本技术领域的技术人员在本实用新型揭露的技术范围内,可轻易想到变化或替换,都应涵盖在本实用新型的保护范围之内。因此,本实用新型的保护范围应以所述权利要求的保护范围为准。

Claims (9)

1.一种TFT阵列基板,包括:栅线、数据线、以及由所述栅线和所述数据线确定的像素单元,所述像素单元包括:公共电极线和像素电极,以及形成在所述公共电极线和像素电极之间的栅绝缘层、钝化层;其特征在于,在每个像素单元内,所述栅绝缘层与钝化层之间且与所述公共电极线正相对的位置上,设置有备用公共电极线;并且,所述备用公共电极线与所述数据线无电连接。
2.根据权利要求1所述的TFT阵列基板,其特征在于,所述像素单元还包括:遮光条;
在每个像素单元内,所述栅绝缘层与钝化层之间且与所述遮光条相对的位置上,设置有备用遮光条;并且,所述备用遮光条与所述数据线无电连接。
3.根据权利要求2所述TFT阵列基板,其特征在于,所述备用遮光条和所述备用公共电极线为一体结构。
4.根据权利要求1~3任一项所述的TFT阵列基板,其特征在于,在每个像素单元内,所述备用公共电极线的图案完全覆盖所述公共电极线的图案。
5.根据权利要求2或3所述的TFT阵列基板,其特征在于,在每个像素单元内,所述备用遮光条的图案完全覆盖所述遮光条的图案。
6.根据权利要求1所述的TFT阵列基板,其特征在于,所述备用公共电极线与所述数据线同层设置。
7.根据权利要求2所述的TFT阵列基板,其特征在于,所述备用遮光条与所述数据线同层设置。
8.根据权利要求3所述的TFT阵列基板,其特征在于,所述备用公共电极线、所述备用遮光条与所述数据线同层设置。
9.一种显示装置,其特征在于,包括权利要求1~8任一项所述的TFT阵列基板。
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