WO2020258242A1 - 显示基板及液晶面板 - Google Patents

显示基板及液晶面板 Download PDF

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Publication number
WO2020258242A1
WO2020258242A1 PCT/CN2019/093664 CN2019093664W WO2020258242A1 WO 2020258242 A1 WO2020258242 A1 WO 2020258242A1 CN 2019093664 W CN2019093664 W CN 2019093664W WO 2020258242 A1 WO2020258242 A1 WO 2020258242A1
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WIPO (PCT)
Prior art keywords
common electrode
substrate
transparent conductive
pixel electrode
conductive layer
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PCT/CN2019/093664
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English (en)
French (fr)
Inventor
苏秋杰
邵喜斌
Original Assignee
京东方科技集团股份有限公司
北京京东方显示技术有限公司
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Application filed by 京东方科技集团股份有限公司, 北京京东方显示技术有限公司 filed Critical 京东方科技集团股份有限公司
Priority to PCT/CN2019/093664 priority Critical patent/WO2020258242A1/zh
Priority to US16/765,940 priority patent/US20210405488A1/en
Priority to CN201980000961.3A priority patent/CN112689791A/zh
Priority to EP19930192.0A priority patent/EP3992703A4/en
Publication of WO2020258242A1 publication Critical patent/WO2020258242A1/zh

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    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136286—Wiring, e.g. gate line, drain line
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G02F1/134309—Electrodes characterised by their geometrical arrangement
    • G02F1/134372—Electrodes characterised by their geometrical arrangement for fringe field switching [FFS] where the common electrode is not patterned
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136209—Light shielding layers, e.g. black matrix, incorporated in the active matrix substrate, e.g. structurally associated with the switching element
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136218—Shield electrodes
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F2201/00—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00
    • G02F2201/12—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode
    • G02F2201/121—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode common or background

Definitions

  • Fig. 2b is a partial top view of a common electrode of a display substrate according to another embodiment of the present disclosure
  • Fig. 2d is a partial top view of a display substrate according to another embodiment of the present disclosure.
  • the liquid crystal display device includes a liquid crystal panel and a backlight module located on the back side of the liquid crystal panel.
  • the liquid crystal panel itself does not emit light.
  • a backlight module needs to provide backlight. Therefore, the transmittance of the liquid crystal panel is a key factor affecting the display quality of the liquid crystal display device.
  • a liquid crystal panel generally includes a display substrate and an opposite substrate arranged at intervals, and a liquid crystal layer located between the display substrate and the opposite substrate.
  • the pixel electrodes of the display substrate and the sub-pixels of the liquid crystal panel are arranged in one-to-one correspondence.
  • the data line transmits a data voltage signal to the pixel electrode through the thin film transistor, and the common electrode layer has the same potential as a whole, so that a voltage difference is generated between the pixel electrode and the common electrode to form an electric field.
  • the electric field formed by the pixel electrode and the common electrode controls the deflection of the liquid crystal molecules, thereby realizing the gray scale display of the sub-pixels of the liquid crystal panel.
  • the liquid crystal panel When the liquid crystal panel is in operation, a lateral electric field will also be formed at the gap between adjacent pixel electrodes due to different electric potentials.
  • the lateral electric field affects the deflection of nearby liquid crystal molecules, causing light leakage between sub-pixels of the liquid crystal panel.
  • the light leakage is generally shielded by the light shielding matrix provided on the liquid crystal panel, which affects the aperture ratio of the sub-pixels to a certain extent, and further affects the transmittance of the liquid crystal panel.
  • the aperture ratio refers to the ratio of the light-transmitting area of the sub-pixel to the area of the sub-pixel.
  • embodiments of the present disclosure provide a display substrate, a liquid crystal panel, and a liquid crystal display device to increase the aperture ratio of sub-pixels, thereby increasing the transmittance of the liquid crystal panel, and improving the display quality of the liquid crystal display device.
  • the row direction refers to the horizontal arrangement direction of the array
  • the column direction refers to the longitudinal arrangement direction of the array.
  • the row direction and the column direction are relative to one of the use states of the liquid crystal display device, and should not be understood as absolute horizontal and vertical directions.
  • connection refers to electrical connection.
  • a display substrate includes: a substrate 1 and a common electrode 2 and a pixel electrode array layer 3 located on one side of the substrate 1 with insulating intervals, wherein:
  • the common electrode 2 includes a transparent conductive layer 4;
  • the specific material type of the substrate 1 is not limited.
  • materials such as glass or transparent resin may be used.
  • the specific materials of the transparent conductive layer 4 and the pixel electrode array layer 3 are not limited.
  • materials such as indium tin oxide or zinc oxide can be used.
  • the common electrode 2 and the pixel electrode array layer 3 are insulated from each other by an insulating layer 6.
  • the display substrate further includes a data line 13 extending along the column direction and arranged on one side of the pixel electrode column.
  • a part of the gate line 10 serves as the gate 9 of the thin film transistor
  • the drain 12 of the thin film transistor is connected to the data line 13
  • the source 11 of the thin film transistor is connected to the pixel electrode 5.
  • the source electrode and the drain electrode are the two electrodes of the thin film transistor, which are relative terms. Therefore, the source electrode of the thin film transistor may be connected to the data line 13 and the drain electrode of the thin film transistor is connected to the pixel electrode 5.
  • two gate lines 10 are provided between two adjacent pixel electrode groups, but no gate line is provided between two rows of pixel electrodes 5 of the same pixel electrode group.
  • the two gate lines 10 one of them is connected to the gates of the thin film transistors 7 corresponding to the pixel electrodes 5 in the upper row, and the other is connected to the gates of the thin film transistors 7 corresponding to the pixel electrodes 5 in the next row.
  • the pixel electrode 5 is located on the side of the transparent conductive layer 4 away from the substrate 1.
  • the transparent conductive layer 4 includes a plurality of common electrodes arranged at intervals and connected.
  • the unit 14 and the common electrode unit 14 have a planar structure, and the pixel electrode 5 has a slit structure.
  • the orthographic projection of the pixel electrode 5 on the substrate 1 falls within the orthographic projection of the common electrode unit 14 on the substrate 1.
  • an electric field is generated at the edge of the slit structure of the pixel electrode 5, and an electric field is also generated between the pixel electrode 5 and the common electrode unit 14, thereby forming a multi-dimensional electric field.
  • the multi-dimensional electric field can deflect most of the liquid crystal molecules in the liquid crystal layer, thereby improving the working efficiency and transmittance of the liquid crystal panel.
  • the liquid crystal display device adopting the display substrate has better picture quality, and has the characteristics of high resolution, high transmittance, low power consumption, wide viewing angle, high aperture ratio, low chromatic aberration, and no squeezing water ripples.
  • the specific number of pixel electrodes 5 that are spaced apart from the common electrode unit 14 to generate an electric field is not limited.
  • it may be an orthographic projection of a pixel electrode on the substrate, and fall within the orthographic projection of a common electrode unit on the substrate. It can be the orthographic projection of two pixel electrodes on the substrate, falling into the orthographic projection of a common electrode unit on the substrate, or the orthographic projection of four pixel electrodes on the substrate, falling into a common electrode unit In the orthographic projection on the substrate, etc.
  • the orthographic projection of adjacent pixel electrodes 5 on the substrate 1 in every two columns of the pixel electrode group falls into the orthographic projection of a common electrode unit 14 on the substrate 1.
  • one common electrode unit 14 is arranged corresponding to two adjacent pixel electrodes 5 in the same pixel electrode group in the column direction.
  • at least two common electrode units 14 adjacent in the column direction are connected by a jumper 15 so that each common electrode unit 14 has an equal potential.
  • the jumper 15 and the pixel electrode 5 are made in the same layer, and the jumper 15 is connected to the common electrode unit 14 through a via structure. In other embodiments, the jumper 15 can also be made in the same layer as the common electrode unit.
  • the common electrode 2 further includes a first common electrode line 8 connected to the transparent conductive layer 4; the material of the first common electrode line 8 is light-shielding metal, the pixel
  • the orthographic projection of the gap between two adjacent pixel electrodes 5 in the column direction of the electrode group on the substrate 1 falls within the orthographic projection of the first common electrode line 8 on the substrate 1.
  • the first common electrode line 8 is arranged between the two rows of pixel electrodes 5 of the pixel electrode group and extends along the row direction, and is used to transmit the common voltage signal to the transparent conductive layer 4 evenly, thereby reducing The in-plane pressure drop of the transparent conductive layer 4.
  • the specific arrangement position of the first common electrode line is not limited to that shown in FIG. 1c.
  • the first common electrode line may also be located on the side of the transparent conductive layer close to the substrate.
  • the first common electrode line and the transparent conductive layer may also be connected through a via structure.
  • the material of the first common electrode line 8 is made of light-shielding metal, and the orthographic projection of the gap between two adjacent pixel electrodes 5 in the column direction of the pixel electrode group on the substrate 1 falls into the first common electrode line 8 In the orthographic projection on the substrate 1, in this way, the first common electrode line 8 can shield the backlight from the back side of the display substrate, thereby effectively avoiding light leakage at the gap.
  • the light-shielding matrix of the liquid crystal panel does not need to be provided with a light-shielding part corresponding to the gap when designing the light-shielding matrix of the liquid crystal panel. Therefore, the aperture ratio of the sub-pixels is improved.
  • the line width c of the first common electrode line 8 and the gap b between the two pixel electrodes 5 adjacent to the pixel electrode group in the column direction satisfy the relationship: 2 ⁇ m ⁇ c-b ⁇ 5 ⁇ m.
  • the first common electrode line 8 has a better shielding effect, while having a small impact on the aperture ratio of the sub-pixels, and the manufacturing accuracy is easier to control, which is beneficial to reducing manufacturing costs.
  • the specific material of the first common electrode wire 8 is not limited.
  • aluminum neodymium alloy (AlNd), aluminum (Al), copper (Cu), molybdenum (Mo), molybdenum tungsten alloy (MoW) or chromium (Cr) can be used.
  • the single-layer structure can also be a composite layer structure composed of any combination of these metal materials.
  • the first common electrode line 8 and the gate line 10 are made of the same material and made of the same layer, which will not increase the process flow and manufacturing cost of the display substrate.
  • the transparent conductive layer 4 is located on the side of the pixel electrode 5 away from the substrate 1.
  • the pixel electrode 5 has a planar structure
  • the transparent conductive layer 4 has a slit structure
  • the column direction of the pixel electrode group is the orthographic projection of the gap between two adjacent pixel electrodes 5 on the substrate 1, and the orthographic projection of the solid part of the transparent conductive layer 4 on the substrate 1 Inside.
  • an electric field will be generated at the edge of the slit structure of the transparent conductive layer 4, and an electric field will also be generated between the pixel electrode 5 and the transparent conductive layer 4, thereby forming a multi-dimensional electric field, which can improve the liquid crystal panel.
  • the work efficiency and transmittance of the liquid crystal display device can improve the display quality of the liquid crystal display device.
  • the transparent conductive layer 4 Since the transparent conductive layer 4 is located on the side of the pixel electrode 5 away from the substrate 1, and the gap between two adjacent pixel electrodes 5 in the column direction of the pixel electrode group, the orthographic projection on the substrate 1 falls into the transparent conductive layer 4. The physical part of is in the orthographic projection on the substrate 1. In this way, when the liquid crystal panel containing the display substrate is working, the lateral electric field at the aforementioned gap cannot pass through the transparent conductive layer 4 and affect the deflection of the liquid crystal molecules. In other words, the transparent conductive layer 4 has a shielding effect on the lateral electric field at the aforementioned gap, so as to prevent the lateral electric field from affecting the deflection of nearby liquid crystal molecules, and effectively improve the light leakage phenomenon there.
  • the light-shielding matrix of the liquid crystal panel does not need to be provided with a light-shielding part corresponding to the gap when designing the light-shielding matrix of the liquid crystal panel. Therefore, the aperture ratio of the sub-pixels is improved.
  • the common electrode 2 in addition to the transparent conductive layer 4, also includes second common electrode lines 16 disposed on the opposite sides of the two rows of pixel electrodes 5 of the pixel electrode group. , The second common electrode line 16 is connected to the transparent conductive layer 4.
  • the common electrode 2 may further include a third common electrode line 22 arranged between two rows of pixel electrodes 5 of the pixel electrode group. Connect with the transparent conductive layer 4.
  • the second common electrode line 16 and the third common electrode line 22 are used to transmit the common voltage signal to the transparent conductive layer 4 more uniformly, thereby reducing the in-plane voltage drop of the transparent conductive layer 4.
  • the material selection of the second common electrode line 16 and the third common electrode line 22 can refer to the aforementioned first common electrode line 8.
  • the second common electrode line 16 is made of the same material and the same layer as the aforementioned gate line 10, which does not increase the process flow and manufacturing cost of the display substrate.
  • the second common electrode line 16 and the third common electrode line 22 and the transparent conductive layer 4 may be connected by a via structure.
  • the number of via structures is not limited, and can be designed according to actual products.
  • the transparent conductive layer 4 is located on the side of the pixel electrode 5 away from the substrate 1, the pixel electrode 5 has a planar structure, and the transparent conductive layer 4 has a slit structure.
  • the gap between the two adjacent pixel electrodes 5 in the column direction of the pixel electrode group overlaps with the projection of one of the slits of the transparent conductive layer 4 on the substrate 1, in order to avoid the pixel gap Light leakage occurs, and the first common electrode line 8 is designed.
  • the material of the first common electrode line 8 is light-shielding metal.
  • the gap between the two adjacent pixel electrodes 5 in the column direction of the pixel electrode group is projected on the substrate 1, and the first common electrode line 8 is on the substrate. 1 in the orthographic projection. Therefore, the first common electrode line 8 can block the backlight from the back side of the display substrate, thereby effectively avoiding light leakage at the gap.
  • the design of the line width, material, etc. of the first common electrode line 8 can refer to the foregoing embodiment, which will not be repeated here.
  • two pixel electrodes 5 of the display substrate that are located in different pixel electrode groups and adjacent in the column direction are respectively connected to the source 11 of the thin film transistor 7, and the two The drain electrodes 12 of the thin film transistors 7 respectively connected to the pixel electrodes 5 are connected through the connection portion 21 to form an integral structure.
  • the distance e between the portion of the source 11 located in the opening 17 of the drain 12 and the bottom of the opening 17 satisfies: 2.2 ⁇ m ⁇ e ⁇ 2.5 ⁇ m.
  • an embodiment of the present disclosure further provides a liquid crystal panel 100, which includes the display substrate 18 of any of the foregoing embodiments.
  • the liquid crystal panel 100 includes a display substrate 18 and a counter substrate 19 arranged at intervals, and a liquid crystal layer 20 located between the display substrate 18 and the counter substrate 19.
  • the liquid crystal panel 100 includes a light-shielding matrix (not shown in the figure), and the position of the light-shielding matrix is not limited. For example, it can be arranged on the display substrate 18 or the counter substrate 19.
  • the light-shielding matrix has a plurality of light-transmitting regions, and the orthographic projection of each two adjacent pixel electrodes 5 of the aforementioned pixel electrode group on the substrate 1 falls within the orthographic projection of a light-transmitting region on the substrate 1. That is, every two adjacent pixel electrodes 5 in the column direction are arranged corresponding to one light-transmitting area.
  • the transmittance of the liquid crystal panel is relatively high.
  • An embodiment of the present disclosure also provides a liquid crystal display device, including the liquid crystal panel of the foregoing embodiment. Since the liquid crystal panel has a higher transmittance, the display quality of the liquid crystal display device is better.
  • the product type of the liquid crystal display device is not limited, for example, it can be a display, a tablet computer, a television, an electronic paper, a display screen, and so on.

Abstract

一种显示基板及液晶面板。显示基板包括：衬底（1）以及位于衬底（1）一侧且绝缘间隔的公共电极（2）和像素电极阵列层（3），其中：公共电极（2）包括透明导电层（4）；像素电极阵列层（3）包括沿列向排布的多个像素电极组，每个像素电极组包括两行像素电极（5），相邻两个像素电极组之间设置有沿行向延伸且沿列向排布的两根栅线（10），以及每根栅线（10）所连接的多个薄膜晶体管（7），每个像素电极（5）与一个薄膜晶体管（7）连接；像素电极组的列向相邻的两个像素电极（5）之间的间隙在衬底（1）上的正投影，落入公共电极（2）在衬底（1）上的正投影内。

Description

显示基板及液晶面板 技术领域
本公开涉及显示技术领域，尤其涉及一种显示基板及液晶面板。
背景技术
在平板显示装置中，液晶显示装置由于具有体积小、功耗低、制造成本相对较低和无辐射等特点，在产品市场占据了主导地位。如何改善液晶显示装置的像素间漏光，进而提升显示品质，一直是本领域技术人员研发的重要课题。
发明内容
根据本公开实施例的一方面，提供一种显示基板，包括：
衬底；以及
位于所述衬底一侧且绝缘间隔的公共电极和像素电极阵列层，其中：
所述公共电极包括透明导电层；
所述像素电极阵列层包括沿列向排布的多个像素电极组，每个所述像素电极组包括两行像素电极，相邻两个所述像素电极组之间设置有沿行向延伸且沿列向排布的两根栅线，以及每根所述栅线所连接的多个薄膜晶体管，每个所述像素电极与一个所述薄膜晶体管连接；
所述像素电极组的列向相邻的两个所述像素电极之间的间隙在所述衬底上的正投影，落入所述公共电极在所述衬底上的正投影内。
在一些实施例中，所述公共电极还包括与所述透明导电层连接的第一公共电极线；
所述第一公共电极线材料为遮光金属，所述像素电极组的列向相邻的两个所述像素电极之间的间隙在所述衬底上的正投影，落入所述第一公共电极线在所述衬底上的正投影内。
在一些实施例中，所述第一公共电极线的电导率大于所述透明导电层的电导率。
在一些实施例中，所述第一公共电极线的线宽c，与所述像素电极组的列向相邻的两个所述像素电极之间的间隙b，满足关系：2微米≤c-b≤5微米。
在一些实施例中，所述第一公共电极线与所述透明导电层层叠设置；或者，所述第一公共电极线与所述透明导电层通过过孔结构连接。
在一些实施例中，所述第一公共电极线位于所述透明导电层远离所述衬底的一侧；或者，所述第一公共电极线位于所述透明导电层靠近所述衬底的一侧。
在一些实施例中，所述像素电极位于所述透明导电层远离所述衬底的一侧，所述透明导电层包括间隔设置且相连接的多个公共电极单元，所述公共电极单元具有面状结构，所述像素电极具有狭缝结构，所述像素电极在所述衬底上的正投影，落入所述公共电极单元在所述衬底上的正投影内。
在一些实施例中，所述第一公共电极线位于所述透明导电层远离所述衬底的一侧且与所述透明导电层层叠设置，所述第一公共电极线与所述栅线同层制作。
在一些实施例中，所述像素电极组的每两个列向相邻的所述像素电极在所述衬底上的正投影，落入一个所述公共电极单元在所述衬底上的正投影内。
在一些实施例中，至少两个列向相邻的所述公共电极单元之间通过跨线连接。
在一些实施例中，所述跨线与所述像素电极同层制作，且所述跨线通过过孔结构与所述公共电极单元连接。
在一些实施例中，所述透明导电层位于所述像素电极远离所述衬底的一侧，所述像素电极具有面状结构，所述透明导电层具有狭缝结构；
所述像素电极组的列向相邻的两个所述像素电极之间的间隙在所述衬底上的正投影，落入所述透明导电层的实体部分在所述衬底上的正投影内。
在一些实施例中，所述公共电极还包括在所述像素电极组的两行所述像素电极的相远离侧分别设置的第二公共电极线，所述第二公共电极线与所述透明导电层连接。
在一些实施例中，所述公共电极还包括在所述像素电极组的两行所述像素电极之间设置的第三公共电极线，所述第三公共电极线与所述透明导电层连接。
在一些实施例中，位于不同所述像素电极组且列向相邻的两个所述像素电极，分别连接所述薄膜晶体管的源极，且所分别连接的所述薄膜晶体管的漏极通过连接部连接为一体结构。
在一些实施例中，所述薄膜晶体管的栅极为所述栅线的一部分，所述连接部在所述衬底上的正投影与所述栅线在所述衬底上的正投影无重叠。
在一些实施例中，所述薄膜晶体管的漏极呈U形，所述薄膜晶体管的源极延伸至所述U形的开口内，并与所述漏极间隔设置；
位于不同所述像素电极组且列向相邻的两个所述像素电极，其所分别连接的所述薄膜晶体管的漏极的U形开口方向相背且底部相连接。
根据本公开实施例的另一方面，提供一种液晶面板，包括前述任一技术方案所述的显示基板。
在一些实施例中，液晶面板还包括遮光矩阵，所述遮光矩阵具有多个透光区，所述像素电极组的每两个列向相邻的所述像素电极在所述衬底上的正投影，落入一个所述透光区在所述衬底上的正投影内。
附图说明
构成说明书的一部分的附图描述了本公开的实施例，并且连同说明书一起用于解释本公开的原理。
参照附图，根据下面的详细描述，可以更加清楚地理解本公开，其中：
图1a是根据本公开一个实施例的显示基板的局部俯视图；
图1b是根据本公开一个实施例的显示基板的公共电极的局部俯视图；
图1c是图1a中A-A处的截面示意图；
图2a是根据本公开另一个实施例的显示基板的局部俯视图；
图2b是根据本公开另一个实施例的显示基板的公共电极的局部俯视图；
图2c是图2a中B-B处的截面示意图；
图2d是根据本公开又一个实施例的显示基板的局部俯视图；
图2e是图2d中C-C处的截面示意图；
图3是根据本公开再一个实施例的显示基板在像素电极间隙处的截面示意图；
图4是根据本公开一个实施例的显示基板在薄膜晶体管处的俯视图；
图5是根据本公开一个实施例的液晶面板的截面示意图。
应当明白，附图中所示出的各个部分的尺寸并不必然是按照实际的比例关系绘制的。此外，相同或类似的参考标号表示相同或类似的构件。
具体实施方式
现在将参照附图来详细描述本公开的各种示例性实施例。对示例性实施例的描述仅仅是说明性的，决不作为对本公开及其应用或使用的任何限制。本公开可以以许多不同的形式实现，不限于这里所述的实施例。提供这些实施例是为了使本公开透彻且完整，并且向本领域技术人员充分表达本公开的范围。应注意到：除非另外具体说明，否则在这些实施例中阐述的部件和步骤的相对布置、材料的组分、数字表达式和数值 应被解释为仅仅是示例性的，而不是作为限制。
本公开中使用的“第一”、“第二”以及类似的词语并不表示任何顺序、数量或者重要性，而只是用来区分不同的部分。“包括”或者“包含”等类似的词语意指在该词前的要素涵盖在该词后列举的要素，并不排除也涵盖其他要素的可能。“上”、“下”等仅用于表示相对位置关系，当被描述对象的绝对位置改变后，则该相对位置关系也可能相应地改变。
在本公开中，当描述到特定部件位于第一部件和第二部件之间时，在该特定部件与第一部件或第二部件之间可以存在居间部件，也可以不存在居间部件。当描述到特定部件连接其它部件时，该特定部件可以与所述其它部件直接连接而不具有居间部件，也可以不与所述其它部件直接连接而具有居间部件。
本公开使用的所有术语(包括技术术语或者科学术语)与本公开所属领域的普通技术人员理解的含义相同，除非另外特别定义。还应当理解，在诸如通用字典中定义的术语应当被解释为具有与它们在相关技术的上下文中的含义相一致的含义，而不应用理想化或极度形式化的意义来解释，除非这里明确地这样定义。
对于相关领域普通技术人员已知的技术、方法和设备可能不作详细讨论，但在适当情况下，所述技术、方法和设备应当被视为说明书的一部分。
液晶显示装置包括液晶面板和位于液晶面板背侧的背光模组。液晶面板本身不发光，为实现显示，需要由背光模组来提供背光。因此，液晶面板的透过率是影响液晶显示装置显示品质的一个关键因素。
液晶面板通常包括相间隔设置的显示基板和对向基板，以及位于显示基板和对向基板之间的液晶层。显示基板的像素电极与液晶面板的子像素一一对应设置。当薄膜晶体管打开时，数据线通过薄膜晶体管向像素电极传输数据电压信号，而公共电极层整体等电势，这样便在像素电极与公共电极之间产生电压差，形成了电场。像素电极与公共电极形成的电场控制液晶分子产生偏转，从而实现液晶面板子像素的灰度显示。
当液晶面板工作时，相邻像素电极之间由于电势不同也会在间隙处形成侧向电场。该侧向电场影响到附近液晶分子的偏转，使液晶面板的子像素间产生漏光。在相关技术中，一般通过液晶面板上设置的遮光矩阵对漏光进行遮挡，这在一定程度上影响了子像素的开口率，进而影响到液晶面板的透过率。其中，开口率指子像素的透光区占子像素面积的比例。
为改善上述问题，本公开实施例提供一种显示基板、液晶面板及液晶显示装置，以提高子像素的开口率，进而提高液晶面板的透过率，提升液晶显示装置的显示品质。
通常，行向指阵列的横向排列方向，列向指阵列的纵向排列方向。在本公开各实施例中，行向和列向是相对液晶显示装置的其中一种使用状态而言的，不应理解为绝对的横向和纵向。此外，在本公开各实施例中，“连接”均指电性连接。
如图1a、图1b和图1c所示，本公开一个实施例的显示基板，包括：衬底1以及位于衬底1一侧且绝缘间隔的公共电极2和像素电极阵列层3，其中：
公共电极2包括透明导电层4；
像素电极阵列层3包括沿列向排布的多个像素电极组，每个像素电极组包括两行像素电极5，相邻两个像素电极组之间设置有沿行向延伸且沿列向排布的两根栅线10，以及每根栅线10所连接的多个薄膜晶体管7，每个像素电极5与一个薄膜晶体管7连接；
像素电极组的列向相邻的两个像素电极5之间的间隙在衬底1上的正投影，落入公共电极2在衬底1上的正投影内。
在本公开实施例中，衬底1的具体材料类型不限，例如可以采用玻璃或透明树脂等材料。透明导电层4和像素电极阵列层3的具体材料不限，例如可以采用氧化铟锡或氧化锌等材料。公共电极2和像素电极阵列层3之间通过绝缘层6绝缘间隔。
可以理解的，为支持薄膜晶体管7的开关功能，显示基板除上述结构外，还包括沿列向延伸且设于像素电极列一侧的数据线13。请参照图4所示，栅线10的一部分作为薄膜晶体管的栅极9，薄膜晶体管的漏极12连接数据线13，薄膜晶体管的源极11连接像素电极5。源极和漏极作为薄膜晶体管的两个极，是相对而言的，因此，也可以是，薄膜晶体管的源极连接数据线13，薄膜晶体管的漏极连接像素电极5。
如图1a所示，在该实施例中，在相邻两个像素电极组之间设置了两根栅线10，而在同一个像素电极组的两行像素电极5之间未设置栅线。该两根栅线10中，其中一根连接上一行像素电极5所对应的各个薄膜晶体管7的栅极，另一根连接下一行像素电极5所对应的各个薄膜晶体管7的栅极。
本公开上述实施例技术方案，薄膜晶体管和所连接的栅线设置在相邻两个像素电极组之间，而像素电极组的两行像素电极之间未设置薄膜晶体管和栅线。这样，显示基板上薄膜晶体管和栅线的结构可以设计的较为紧凑，从而减小在显示基板上的占用 面积。相应的，液晶面板的遮光矩阵在设计时，其遮光部分的面积也相应的减小。因此，采用本公开上述实施例技术方案，可以设计增大子像素透光区的面积，从而提高子像素的开口率。
请参照图1a、图1b和图1c所示，在一些实施例中，像素电极5位于透明导电层4远离衬底1的一侧，透明导电层4包括间隔设置且相连接的多个公共电极单元14，公共电极单元14具有面状结构，像素电极5具有狭缝结构，像素电极5在衬底1上的正投影，落入公共电极单元14在衬底1上的正投影内。
包含该实施例显示基板的液晶面板在工作时，像素电极5的狭缝结构边缘会产生电场，像素电极5与公共电极单元14之间也会产生电场，从而形成多维电场。该多维电场能够使液晶层的大部分液晶分子产生偏转，从而提高了液晶面板的工作效率和透过率。采用该显示基板的液晶显示装置具有更好的画面品质，并且具有高分辨率、高透过率、低功耗、宽视角、高开口率、低色差，及无挤压水波纹等特点。
与公共电极单元14相间隔而产生电场的像素电极5的具体数量不限，例如：可以是一个像素电极在衬底上的正投影，落入一个公共电极单元在衬底上的正投影内，可以是两个像素电极在衬底上的正投影，落入一个公共电极单元在衬底上的正投影内，还可以是四个像素电极在衬底上的正投影，落入一个公共电极单元在衬底上的正投影内，等等。
如图1a、图1b和图1c所示，像素电极组的每两个列向相邻的像素电极5在衬底1上的正投影，落入一个公共电极单元14在衬底1上的正投影内，即：一个公共电极单元14与位于同一像素电极组的列向相邻的两个像素电极5对应设置。其中，至少两个列向相邻的公共电极单元14之间通过跨线15连接，从而使各公共电极单元14具有等电势。在一些实施例中，跨线15与像素电极5同层制作，且跨线15通过过孔结构与公共电极单元14连接。在另一些实施例中，跨线15也可以与公共电极单元同层制作。
请参照图1a、图1b和图1c所示，在一些实施例中，公共电极2还包括与透明导电层4连接的第一公共电极线8；第一公共电极线8材料为遮光金属，像素电极组的列向相邻的两个像素电极5之间的间隙在衬底1上的正投影，落入第一公共电极线8在衬底1上的正投影内。
如图1a所示，第一公共电极线8设置在像素电极组的两行像素电极5之间并沿行向延伸，用于将公共电压信号较为均匀的传输给透明导电层4，从而减小透明导电 层4的面内压降。
在一些实施例中，如图1c所示，第一公共电极线8位于透明导电层4远离衬底1的一侧且与透明导电层4层叠设置，这样，第一公共电极线8可以与前述的栅线10同层制作而成，使显示基板制作工艺较为简便，制作成本也较低。
值得一提的是，在本公开实施例中，第一公共电极线的具体设置位置并不局限于图1c所示。在本公开的其它一些实施例中，第一公共电极线也可以位于透明导电层靠近衬底的一侧，此外，第一公共电极线与透明导电层也可以通过过孔结构连接。
由于第一公共电极线8的材料采用遮光金属，并且，像素电极组的列向相邻的两个像素电极5之间的间隙在衬底1上的正投影落入第一公共电极线8在衬底1上的正投影内，这样，第一公共电极线8可以对来自显示基板背侧的背光起到遮挡作用，从而有效避免在该间隙处产生漏光。
由于上述间隙处的漏光得以解决，使得：液晶面板的遮光矩阵在设计时，无需对应上述间隙设置遮光部分，因此，提高了子像素的开口率。
在一些实施例中，第一公共电极线8的线宽c，与像素电极组的列向相邻的两个像素电极5之间的间隙b，满足关系：2微米≤c-b≤5微米。满足该差值范围，第一公共电极线8在起到较好遮挡效果的同时，对子像素的开口率影响较小，制作精度也比较容易管控，有利于减少制作成本。
在一些实施例中，第一公共电极线8的电导率大于透明导电层4的电导率。这样，第一公共电极线8与透明导电层4连接，相当于第一公共电极线8和透明导电层4并联，从而明显降低了公共电极2的电阻，有利于改善液晶显示装置的显示延迟，提升画面品质。
第一公共电极线8的具体材料不限，例如可以采用铝钕合金(AlNd)、铝(Al)、铜(Cu)、钼(Mo)、钼钨合金(MoW)或铬(Cr)等的单层结构，也可以采用这些金属材料任意组合所构成的复合层结构。在本公开的一些实施例中，第一公共电极线8与栅线10采用相同的材料并且同层制作而成，不会增加显示基板的工艺流程和制作成本。
请参照图2a、图2b和图2c所示，在本公开的另一个实施例中，透明导电层4位于像素电极5远离衬底1的一侧，像素电极5具有面状结构，透明导电层4具有狭缝结构，像素电极组的列向相邻的两个像素电极5之间的间隙在衬底1上的正投影，落 入透明导电层4的实体部分在衬底1上的正投影内。
包含该实施例显示基板的液晶面板在工作时，透明导电层4的狭缝结构边缘会产生电场，像素电极5与透明导电层4之间也会产生电场，从而形成多维电场，可以提高液晶面板的工作效率和透过率，进而提升液晶显示装置的显示品质。
由于透明导电层4位于像素电极5远离衬底1的一侧，并且像素电极组的列向相邻的两个像素电极5之间的间隙在衬底1上的正投影落入透明导电层4的实体部分在衬底1上的正投影内，这样，包含该显示基板的液晶面板在工作时，前述间隙处的侧向电场无法穿过透明导电层4而影响到液晶分子的偏转。也就是说，透明导电层4对前述间隙处的侧向电场具有屏蔽作用，从而可以避免侧向电场影响到附近液晶分子的偏转，有效改善在该处的漏光现象。
由于上述间隙处的漏光得以解决，使得：液晶面板的遮光矩阵在设计时，无需对应上述间隙设置遮光部分，因此，提高了子像素的开口率。
如图2a和图2b所示，在一些实施例中，公共电极2除透明导电层4外，还包括在像素电极组的两行像素电极5的相远离侧分别设置的第二公共电极线16，第二公共电极线16与透明导电层4连接。
如图2d和图2e所示，在另一些实施例中，公共电极2还可以进一步包括在像素电极组的两行像素电极5之间设置的第三公共电极线22，第三公共电极线22与透明导电层4连接。
第二公共电极线16和第三公共电极线22用于将公共电压信号较为均匀的传输给透明导电层4，从而减小透明导电层4的面内压降。
第二公共电极线16和第三公共电极线22的材料选择可参考前述的第一公共电极线8。在一些实施例中，第二公共电极线16采用与前述栅线10相同的材料并且同层制作而成，不会增加显示基板的工艺流程和制作成本。第二公共电极线16和第三公共电极线22与透明导电层4可以通过过孔结构连接。过孔结构的数量不限，可以根据实际产品进行相应设计。
请参照图3所示，在本公开的再一个实施例中，透明导电层4位于像素电极5远离衬底1的一侧，像素电极5具有面状结构，透明导电层4具有狭缝结构。在该实施例中，像素电极组的列向相邻的两个像素电极5之间的间隙与透明导电层4的其中一条狭缝在衬底上1的投影有重叠，为避免在像素间隙处产生漏光，设计了第一公共电 极线8。该第一公共电极线8材料为遮光金属，像素电极组的列向相邻的两个像素电极5之间的间隙在衬底1上的正投影，落入第一公共电极线8在衬底1上的正投影内。因此，第一公共电极线8可以对来自显示基板背侧的背光起到遮挡作用，从而有效避免在该间隙处产生漏光。
第一公共电极线8的线宽、材料等设计可参考前述实施例，这里不再重复赘述。
请参照图4所示，在本公开的一些实施例中，显示基板的位于不同像素电极组且列向相邻的两个像素电极5，分别连接薄膜晶体管7的源极11，并且该两个像素电极5所分别连接的薄膜晶体管7的漏极12，通过连接部21连接为一体结构。
采用该设计，显示基板在相邻两个薄膜晶体管7处的结构设计较为紧凑，且易于加工，有利于提高子像素的开口率。
请继续参照图4所示，薄膜晶体管7的结构设计为：漏极12呈U形，源极11延伸至U形的开口17内并与漏极12间隔设置；位于不同像素电极组且列向相邻的两个像素电极5，其所分别连接的薄膜晶体管7的漏极12的U形开口方向相背且底部相连接。漏极12的具体形状不限，例如可以设计为呈U形。
在本公开的一些实施例中，源极11位于漏极12的开口17内的部分与开口17底部之间的距离e满足：2.2微米≤e≤2.5微米。采用该间距设计，在使用单缝隙掩模板(Single Slit Mask，SSM)制作数据金属层的图案时，可以有效减少源极11和漏极12短路连接的情况发生。
在本公开的一些实施例中，薄膜晶体管7的栅极9为栅线10的一部分，连接部21在衬底1上的正投影与栅线10在衬底1上的正投影无重叠。这样，可以降低栅线层与数据线层之间的寄生电容，从而降低电路负载，减小液晶面板的功耗。
如图5所示，本公开实施例还提供一种液晶面板100，包括前述任一实施例的显示基板18。该液晶面板100包括相间隔设置的显示基板18和对向基板19，以及位于显示基板18和对向基板19之间的液晶层20。该液晶面板100包括遮光矩阵(图中未予示出)，遮光矩阵的设置位置不限，例如可以设置在显示基板18或对向基板19上。遮光矩阵具有多个透光区，前述像素电极组的每两个列向相邻的像素电极5在衬底1上的正投影落入一个透光区在衬底1上的正投影内。即：每两个列向相邻的像素电极5与一个透光区对应设置。
同前所述，由于采用了前述实施例的显示基板，因此，液晶面板的透过率较高。
本公开实施例还提供一种液晶显示装置，包括前述实施例的液晶面板。由于液晶面板具有较高的透过率，因此，液晶显示装置的显示品质较佳。
液晶显示装置的产品类型不限，例如可以为显示器、平板电脑、电视机、电子纸、展示屏等等。
至此，已经详细描述了本公开的各实施例。为了避免遮蔽本公开的构思，没有描述本领域所公知的一些细节。本领域技术人员根据上面的描述，完全可以明白如何实施这里公开的技术方案。
虽然已经通过示例对本公开的一些特定实施例进行了详细说明，但是本领域的技术人员应该理解，以上示例仅是为了进行说明，而不是为了限制本公开的范围。本领域的技术人员应该理解，可在不脱离本公开的范围和精神的情况下，对以上实施例进行修改或者对部分技术特征进行等同替换。本公开的范围由所附权利要求来限定。

Claims (19)

  1. 一种显示基板，包括：
    衬底；以及
    位于所述衬底一侧且绝缘间隔的公共电极和像素电极阵列层，其中：
    所述公共电极包括透明导电层；
    所述像素电极阵列层包括沿列向排布的多个像素电极组，每个所述像素电极组包括两行像素电极，相邻两个所述像素电极组之间设置有沿行向延伸且沿列向排布的两根栅线，以及每根所述栅线所连接的多个薄膜晶体管，每个所述像素电极与一个所述薄膜晶体管连接；
    所述像素电极组的列向相邻的两个所述像素电极之间的间隙在所述衬底上的正投影，落入所述公共电极在所述衬底上的正投影内。
  2. 根据权利要求1所述的显示基板，其中：所述公共电极还包括与所述透明导电层连接的第一公共电极线；
    所述第一公共电极线材料为遮光金属，所述像素电极组的列向相邻的两个所述像素电极之间的间隙在所述衬底上的正投影，落入所述第一公共电极线在所述衬底上的正投影内。
  3. 根据权利要求2所述的显示基板，其中：所述第一公共电极线的电导率大于所述透明导电层的电导率。
  4. 根据权利要求2或3所述的显示基板，其中：所述第一公共电极线的线宽c，与所述像素电极组的列向相邻的两个所述像素电极之间的间隙b，满足关系：2微米≤c-b≤5微米。
  5. 根据权利要求2-4任一项所述的显示基板，其中：所述第一公共电极线与所述透明导电层层叠设置；或者，所述第一公共电极线与所述透明导电层通过过孔结构连接。
  6. 根据权利要求2-5任一项所述的显示基板，其中：所述第一公共电极线位于所述透明导电层远离所述衬底的一侧；或者，所述第一公共电极线位于所述透明导电层靠近所述衬底的一侧。
  7. 根据权利要求2-4任一项所述的显示基板，其中：所述像素电极位于所述透明导电层远离所述衬底的一侧，所述透明导电层包括间隔设置且相连接的多个公共电极单元，所述公共电极单元具有面状结构，所述像素电极具有狭缝结构，所述像素电极在所述衬底上的正投影，落入所述公共电极单元在所述衬底上的正投影内。
  8. 根据权利要求7所述的显示基板，其中：所述第一公共电极线位于所述透明导电层远离所述衬底的一侧且与所述透明导电层层叠设置，所述第一公共电极线与所述栅线同层制作。
  9. 根据权利要求7或8所述的显示基板，其中：所述像素电极组的每两个列向相邻的所述像素电极在所述衬底上的正投影，落入一个所述公共电极单元在所述衬底上的正投影内。
  10. 根据权利要求9所述的显示基板，其中：至少两个列向相邻的所述公共电极单元之间通过跨线连接。
  11. 根据权利要求10所述的显示基板，其中：所述跨线与所述像素电极同层制作，且所述跨线通过过孔结构与所述公共电极单元连接。
  12. 根据权利要求1所述的显示基板，其中：所述透明导电层位于所述像素电极远离所述衬底的一侧，所述像素电极具有面状结构，所述透明导电层具有狭缝结构；
    所述像素电极组的列向相邻的两个所述像素电极之间的间隙在所述衬底上的正投影，落入所述透明导电层的实体部分在所述衬底上的正投影内。
  13. 根据权利要求12所述的显示基板，其中：所述公共电极还包括在所述像素电极组的两行所述像素电极的相远离侧分别设置的第二公共电极线，所述第二公共电 极线与所述透明导电层连接。
  14. 根据权利要求12或13所述的显示基板，其中：所述公共电极还包括在所述像素电极组的两行所述像素电极之间设置的第三公共电极线，所述第三公共电极线与所述透明导电层连接。
  15. 根据权利要求1-14任一项所述的显示基板，其中：
    位于不同所述像素电极组且列向相邻的两个所述像素电极，分别连接所述薄膜晶体管的源极，且所分别连接的所述薄膜晶体管的漏极通过连接部连接为一体结构。
  16. 根据权利要求15所述的显示基板，其中：
    所述薄膜晶体管的栅极为所述栅线的一部分，所述连接部在所述衬底上的正投影与所述栅线在所述衬底上的正投影无重叠。
  17. 根据权利要求15或16所述的显示基板，其中：
    所述薄膜晶体管的漏极呈U形，所述薄膜晶体管的源极延伸至所述U形的开口内，并与所述漏极间隔设置；
    位于不同所述像素电极组且列向相邻的两个所述像素电极，其所分别连接的所述薄膜晶体管的漏极的U形开口方向相背且底部相连接。
  18. 一种液晶面板，包括：根据权利要求1-17任意一项所述的显示基板。
  19. 根据权利要求18所述的液晶面板，还包括遮光矩阵，所述遮光矩阵具有多个透光区，所述像素电极组的每两个列向相邻的所述像素电极在所述衬底上的正投影，落入一个所述透光区在所述衬底上的正投影内。
PCT/CN2019/093664 2019-06-28 2019-06-28 显示基板及液晶面板 WO2020258242A1 (zh)

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