CN105223749A - 阵列基板及其制作方法、显示装置 - Google Patents
阵列基板及其制作方法、显示装置 Download PDFInfo
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- CN105223749A CN105223749A CN201510654443.7A CN201510654443A CN105223749A CN 105223749 A CN105223749 A CN 105223749A CN 201510654443 A CN201510654443 A CN 201510654443A CN 105223749 A CN105223749 A CN 105223749A
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- 238000002360 preparation method Methods 0.000 title abstract description 4
- 238000009413 insulation Methods 0.000 claims abstract description 93
- 239000000758 substrate Substances 0.000 claims abstract description 37
- 239000010409 thin film Substances 0.000 claims abstract description 35
- 238000003860 storage Methods 0.000 claims description 27
- 230000015572 biosynthetic process Effects 0.000 claims description 14
- 238000004519 manufacturing process Methods 0.000 claims description 10
- 239000004973 liquid crystal related substance Substances 0.000 claims description 5
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims description 3
- 125000006850 spacer group Chemical group 0.000 claims description 2
- 238000000034 method Methods 0.000 abstract description 5
- 238000010586 diagram Methods 0.000 description 8
- 238000010276 construction Methods 0.000 description 5
- 239000012212 insulator Substances 0.000 description 4
- 230000000903 blocking effect Effects 0.000 description 3
- 239000010408 film Substances 0.000 description 3
- 238000009826 distribution Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 230000035807 sensation Effects 0.000 description 2
- 230000005540 biological transmission Effects 0.000 description 1
- 210000004556 brain Anatomy 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 230000006870 function Effects 0.000 description 1
- OFIYHXOOOISSDN-UHFFFAOYSA-N tellanylidenegallium Chemical compound [Te]=[Ga] OFIYHXOOOISSDN-UHFFFAOYSA-N 0.000 description 1
Classifications
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- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
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- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136286—Wiring, e.g. gate line, drain line
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- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
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- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
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- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
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- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1337—Surface-induced orientation of the liquid crystal molecules, e.g. by alignment layers
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- G02F2201/00—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1255—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs integrated with passive devices, e.g. auxiliary capacitors
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- Nonlinear Science (AREA)
- General Physics & Mathematics (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Mathematical Physics (AREA)
- Optics & Photonics (AREA)
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Geometry (AREA)
- Power Engineering (AREA)
- Liquid Crystal (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
Abstract
本发明涉及显示技术领域,公开了一种阵列基板及其制作方法、显示装置,包括:形成在衬底基板上的栅线、数据线、公共电极线,公共电极线将显示区域划分成多个像素区域,每个像素区域内都设置有像素电极;其中,像素区域包括:至少两个像素畴区域,像素电极与像素畴区域对应的部分具有条状镂空,栅线和数据线相交,且栅线和数据线中至少一条形成在至少两个像素畴区域之间的暗纹区,栅线和数据线的交叉处形成有薄膜晶体管,薄膜晶体管连接栅线、数据线和像素电极,栅线和数据线之间间隔第一绝缘层,数据线和像素电极之间间隔第二绝缘层。本发明将数据线和栅线中至少一条形成在像素畴区域之间的暗纹区,提高像素开口率,从而提高透明TFT-LCD的透过率。
Description
技术领域
本发明涉及显示技术领域,特别是指一种阵列基板及其制作方法、显示装置。
背景技术
透明TFT液晶显示面板(TFT-LCD,ThinFilmTransistor-LiquidCrystalDisplay)面板是指具有一定程度的透光性,并且可以显示画面后面的背景,可用于建筑物或车辆商店橱窗等的TFT-LCD面板。除了原有的显示功能外,更具备提供资讯等未来显示装置特色,因此受到市场的关注,未来有望占据部分如建筑物,广告牌,公共场所等显示市场,并带动整体TFT-LCD面板市场的发展。
透明TFT-LCD装置最大的特点是透明,而透明是人眼反映给大脑的感觉,这种感觉主要来自于透明TFT-LCD装置背后的物体的亮度,所以现有的透明TFT-LCD装置会在显示屏的后方安装大功率的照明装置,这种方式会造成透明TFT-LCD装置的功率很大。无背光透明TFT-LCD装置可以有效降低显示屏的功耗,但由于目前液晶面板透过率很低,在不使用背光的情况下,透明效果很不理想。目前通常的做法是,去除彩膜侧RGB色阻(即彩膜)制作黑白透明显示屏,将RGB色阻去除后,可以将液晶面板的透过率从5.9%提升至约22%。去RGB色阻的方式使得透明TFT-LCD装置在无背光下透明显示效果有很大提升,但透过率还是有一定的提升空间。
发明内容
本发明要解决的技术问题是:如何提高透明TFT-LCD显示屏的透过率。
为解决上述技术问题,本发明提供了一种阵列基板,包括:形成在衬底基板上的栅线、数据线、公共电极线,所述公共电极线将显示区域划分成多个像素区域,每个所述像素区域内都设置有像素电极;
其中,所述像素区域包括:至少两个像素畴区域,所述像素电极与所述像素畴区域对应的部分具有条状镂空,所述栅线和数据线相交,且所述栅线和数据线中至少一条形成在所述至少两个像素畴区域之间的暗纹区,所述栅线和数据线的交叉处形成有薄膜晶体管,所述薄膜晶体管连接所述栅线、数据线和像素电极,所述栅线和数据线之间间隔第一绝缘层,所述数据线和像素电极之间间隔第二绝缘层。
其中,每个所述像素区域包括:两行、两列四个像素畴区域;所述栅线和数据线相互垂直,且均形成在所述四个像素畴区域之间的暗纹区。
其中,所述像素电极具有的条状镂空相对于其对应的暗纹区对称。
其中,
所述栅线形成在所述衬底基板之上;
所述数据线、公共电极线和薄膜晶体管的第一极位于同一层,位于所述栅线上方且与所述栅线间隔所述第一绝缘层;
所述薄膜晶体管的栅极和栅线一体形成;
所述薄膜晶体管的有源层位于所述栅极上方,与所述栅极间隔所述第一绝缘层,且电连接所述薄膜晶体管的第一极和第二极;
所述薄膜晶体管的第二极与所述数据线一体形成;
所述像素电极位于所述数据线上方,所述像素电极通过穿过所述第二绝缘层的过孔连接所述薄膜晶体管的第一极。
其中,所述第二绝缘层与像素电极之间还形成有第三绝缘层,所述像素电极通过穿过所述第二绝缘层和第三绝缘层的过孔连接所述薄膜晶体管的第一极。
其中,还包括:存储电极,所述存储电极形成在所述公共电极线对应的区域,与所述公共电极线间隔所述第一绝缘层,且连接像素电极,所述存储电极与公共电极线之间形成存储电容。
其中,所述存储电极和栅线位于同一层。
其中,所述像素电极与所述公共电极线具有重叠的区域,与所述公共电极线间隔所述第二绝缘层,所述像素电极与公共电极线之间形成存储电容。
其中,所述像素电极的形状为具有条状镂空的正方形。
本发明还提供了一种显示装置,包括上述任一项所述的阵列基板、与所述阵列基板对置的对置基板及两基板间的液晶,所述阵列基板和对置基板上分别形成有相互垂直的配向层,所述配向层的暗纹区均与所述像素畴区域之间的暗纹区重叠。
其中,所述对置基板上对应所述像素电极的区域为无色透明区域。
本发明还提供了一种阵列基板制作方法,包括:
在衬底基板上形成包括栅线和栅极的图形;
依次形成包括第一绝缘层的图形、包括有源层的图形,并使所述有源层位于栅线和待形成的数据线交叉的区域;
形成包括数据线、公共电极线和薄膜晶体管的第一极和第二极的图形,使所述公共电极线将显示区域划分成多个像素区域,所述像素区域包括:至少两个像素畴区域,所述数据线和栅线相交,且所述栅线和数据线中至少一条形成在所述像素畴区域之间的暗纹区;
形成包括第二绝缘层和穿过所述第二绝缘层的第一过孔;
在每个所述像素区域形成包括像素电极的图形,其中,所述像素电极与像素畴区域对应的部分包括条状镂空,所述像素电极通过第一过孔连接所述薄膜晶体管的第一极。
其中,每个所述像素区域包括:两行、两列四个像素畴区域,形成所述栅线和数据线时,使所述栅线和数据线相互垂直,且均形成在所述四个像素畴区域之间的暗纹区。
其中,在形成所述第二绝缘层的步骤之后、形成像素电极的步骤之前还在第二绝缘层上形成第三绝缘层,所述第一过孔穿过第三绝缘层和第二绝缘层。
其中,在衬底基板上形成包括栅线的图形时,在所述公共电极线对应的区域还同时形成存储电极的图形;形成包括第二绝缘层的同时,在所述存储电极对应的区域还形成穿过所述第一绝缘层和第二绝缘层的第二过孔,使所述像素电极通过所述第二过孔连接所述存储电极。
其中,形成包括具有至少两个像素畴区域的像素电极的图形时,使所述像素电极与所述公共电极线具有重叠的区域。
本发明通过优化像素设计,使数据线和栅线中至少一条形成在像素畴区域之间的暗纹区,尽可能小的占用像素开口率,从而提高透明TFT-LCD显示屏的透过率。
附图说明
为了更清楚地说明本发明实施例或现有技术中的技术方案,下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍,显而易见地,下面描述中的附图仅仅是本发明的一些实施例,对于本领域普通技术人员来讲,在不付出创造性劳动性的前提下,还可以根据这些附图获得其他的附图。
图1是本发明实施例的一种阵列基板的平面结构示意图;
图2是图1沿A-A'和B-B'的剖视图;
图3是本发明实施例的另一种阵列基板的平面结构示意图;
图4是图3沿A-A'和B-B'的剖视图;
图5是制作图1或图3的阵列基板的基本流程图;
图6是制作图1的阵列基板过程中形成栅线和栅极的示意图;
图7是在图6的基础上栅极上方形成第一绝缘层和有源层的示意图;
图8是在图7的基础上形成包括数据线、公共电极线和第一极的示意图;
图9是制作图3的阵列基板过程中形成栅线、栅极和存储电极的示意图;
图10是在图9的基础上栅极上方形成第一绝缘层和有源层的示意图;
图11是在图10的基础上形成包括数据线、公共电极线和第一极的示意图。
具体实施方式
下面将结合本发明实施例中的附图,对本发明实施例中的技术方案进行清楚、完整地描述,显然,所描述的实施例仅仅是本发明一部分实施例,而不是全部的实施例。基于本发明中的实施例,本领域普通技术人员在没有作出创造性劳动前提下所获得的所有其他实施例,都属于本发明保护的范围。
本实施例的阵列基板,包括:形成在衬底基板上的栅线、数据线和公共电极线。所述公共电极线将显示区域划分成多个像素区域。每个像素区域内都设置有像素电极。像素区域包括:至少两个像素畴区域,像素电极与所述像素畴区域对应的部分具有条状镂空。栅线和数据线相交,由于这种多畴结构的像素电极,在显示时畴与畴之间会形成一个暗纹区(畴结构的像素电极的两个相邻畴之间都会存在一个暗纹区),本实施例中,为提高透过率,将栅线和数据线中至少一条形成在像素畴之间暗纹区。栅线和数据线的交叉处形成有薄膜晶体管,薄膜晶体管连接栅线、数据线和像素电极。栅线和数据线之间间隔第一绝缘层,数据线和像素电极之间间隔第二绝缘层。
本实施例中,通过公共电极线分割成多个像素区域,每个像素区域包括至少两个像素畴区域,栅线和数据线中的至少一条正好处于像素畴区域之间的暗纹区,尽可能小的占用像素开口率,从而提高透明TFT-LCD的透过率。
像素电极可以包括两个像素畴区域,两个像素畴区域之间只有一个暗纹区,栅线和数据线中的其中一条正好处于像素畴区域之间的暗纹区,例如栅线位于像素畴的暗纹区,数据线与栅线垂直,公共电极线与数据线平行设置;或者,数据线位于像素畴的暗纹区,数据线与栅线垂直,公共电极线与栅线平行设置。
像素电极可以包括四个像素畴的像素电极,具体如图1~4所示,本实施例的阵列基板,包括:形成在衬底基板8上的栅线1、数据线3、公共电极线4及由公共电极线4划分成的多个像素区域(图中只示出了一个像素区域)。每个像素区域包括:两行、两列四个像素畴区域(如图1中像素电极区域的四个条纹区域),其中,上下或左右相邻的像素畴区域的像素电极5具有不同方向的条状镂空图案。栅线1和数据线3相互垂直,由于这种多畴结构的像素电极,在显示时畴与畴之间会形成暗纹区(畴结构的像素电极的两个相邻畴区域之间都会存在一个暗纹区,从而在整个像素区域的横向和纵向各形成一个暗纹区),本实施例中,为提高透过率,将栅线1和数据线3形成在像素畴之间暗纹区,图中1和3中,栅线1和数据线3分别形成在横向和纵向暗纹区。栅线1和数据线3的交叉处形成有薄膜晶体管(即TFT,如图2和图4虚线框部分),薄膜晶体管连接栅线1、数据线3和像素电极5。栅线1和数据线3之间间隔第一绝缘层9,数据线3和像素电极5之间间隔第二绝缘层10。
本实施例中,通过公共电极线4划分成多个像素区域,每个像素区域包括:两行、两列四个像素畴区域,栅线1和数据线3像素电极正好处于像素畴区域之间的暗纹区,尽可能小的占用像素开口率,从而提高透明TFT-LCD的透过率。
进一步的,上述像素电极具有的条状镂空图案(图1中像素电极5上的条纹)相对于其对应的暗纹区对称,使得在显示时,像素电极的各个畴对应区域和公共电极产生均匀的电场。
本实施例以底栅型薄膜晶体管(对于顶栅型的TFT也同样适用于上述的由公共电极线划分成的多个像素区域的电极结构)为例说明阵列基板(一个像素)的具体结构,栅线1形成在衬底基板8之上。数据线3、公共电极线4和薄膜晶体管的第一极72位于同一层,位于栅线1上方且与栅线1之间间隔第一绝缘层9。薄膜晶体管的栅极11和栅线1一体形成,薄膜晶体管的有源层71位于栅极11上方,与栅极11间隔第一绝缘层9(即栅绝缘层),且连接薄膜晶体管的第一极72和第二极,薄膜晶体管的第二极(数据线3位于有源层71之上的部分)与数据线3一体形成,像素电极5位于数据线3上方,像素电极5通过穿过第二绝缘层10的第一过孔12连接第一极72。
如图2和4所示,第二绝缘层10与像素电极5之间还形成有第三绝缘层13。像素电极5通过穿过第二绝缘层10和第三绝缘层13的第一过孔12连接第一极72。第三绝缘层13增加了像素电极5和数据线3之间绝缘层的厚度,尽量减小了寄生电容,从而在显示时减轻了串扰现象。第三绝缘层13通常采用有机绝缘层,有机绝缘层容易做得较厚,以方便增大像素电极5和数据线3之间的距离。
每个像素中还包括存储电容的结构,本实施例第一种形成存储电容的结构如图1和2所示,像素电极5与公共电极线4具有重叠的区域。在该重叠区域像素电极5和公共电极线4间隔有第二绝缘层10(及第三绝缘层13),使得像素电极5与公共电极线4之间形成存储电容的结构。
本实施例第二种形成存储电容的结构如图3和4所示,还包括:存储电极2,该存储电极2形成在公共电极线4对应的区域,即与公共电极线4重叠,存储电极2和公共电极线4间隔第一绝缘层9,且通过穿过第一绝缘层9和第二绝缘层10(及第三绝缘层13)的第二过孔6连接像素电极5,存储电极2与公共电极线4之间形成存储电容。
为了节省制作工艺,存储电极2和栅线1位于同一层,两者可以在同一次制作工艺中形成。
由于该阵列基板可以用于没有彩膜的显示装置,因此不需要形成亚像素的结构(即子像素也为像素),像素电极5的形状为具有条状镂空的正方形。
本发明还提供了一种显示装置,包括上述的阵列基板、与该阵列基板对置的对置基板及两基板间的液晶。阵列基板和对置基板上分别形成有相互垂直的配向。通过垂直的配向使配向层的暗纹区在配向层平面呈垂直分布,且正好与像素畴的暗纹区重叠(阵列基板和对置基板各自的配向层上的配向图案叠加后会产生暗纹区,相互垂直的配向使得叠加后产生的暗纹区也垂直分布),这样就可以减小配向层的暗纹区对透过率的损失。
对置基板上对应所述像素电极的区域为无色透明区域,进一步提高透过率。
该显示装置可以是ADS模式或TN模式,对于ADS模式的显示装置,公共电极形成在阵列基板上,且与公共电极线连接。对于TN模式的显示装置,公共电极形成在对置基板上,在对盒后与公共电极线连接。
本发明还提供了一种阵列基板制作方法,其流程如图5所示,包括:
步骤S510,在衬底基板上形成包括栅线和栅极的图形。
步骤S520,依次形成包括第一绝缘层的图形、包括有源层的图形,并使所述有源层位于栅线和待形成的数据线交叉的区域。
步骤S530,形成包括数据线、公共电极线和薄膜晶体管的第一极和第二极的图形,使所述公共电极线将显示区域划分成多个像素区域,所述像素区域包括:至少两个像素畴区域,所述数据线和栅线相交,且所述栅线和数据线中至少一条形成在所述像素畴区域之间的暗纹区。
步骤S540,形成包括第二绝缘层和穿过所述第二绝缘层的第一过孔。
步骤S550,在每个所述像素区域形成包括像素电极的图形,其中,所述像素电极与像素畴区域对应的部分包括条状镂空,所述像素电极通过第一过孔连接所述薄膜晶体管的第一极。
本实施例中,具体制作图1和图2的阵列基板制作方法,如图6~8所示,包括:
在衬底基板(图中未示出)上形成包括栅线1和栅极11的图形。
形成包括第一绝缘层和有源层71的图形,使有源层71位于栅线1和待形成的数据线3交叉的区域。
形成包括数据线3、公共电极线4和第一极72的图形,使公共电极线4将显示区域划分成多个像素区域,且使栅线1和数据线3相互垂直,位于待形成的具有两行、两列四个像素畴区域的像素电极的像素畴区域之间对应的区域。
形成包括第二绝缘层和穿过所述第二绝缘层的第一过孔的图形;
形成包括具有两行、两列四个像素畴区域的像素电极的图形,像素电极通过第一过孔连接所述第一极72,最终形成如图1和2的结构。
为了减轻像素电极和数据线3之间的串扰,在形成第二绝缘层的步骤之后、形成像素电极的步骤之前还在第二绝缘层上形成第三绝缘层,所述第一过孔穿过第三绝缘层和第二绝缘层。第三绝缘层通常采用有机绝缘层。
为了形成存储电容,形成包括具有至少两个像素畴区域的像素电极的图形时,使所述像素电极与公共电极线具有重叠的区域。像素电极与公共电极线之间间隔第二绝缘层和第三绝缘层,从而形成存储电极。
如图9~11所示,示出了制作图3和图4的带有存储电极结构的阵列基板制作流程。
如图9所示,在衬底基板上形成包括栅线1的图形时,在公共电极线4对应的区域还同时形成存储电极2的图形。
如图10所示,形成包括第一绝缘层和有源层71的图形,使有源层71位于栅线1和待形成的数据线3交叉的区域。
如图11所示,形成包括数据线3、公共电极线4和第一极72的图形,使公共电极线4划分成多个像素阵列,且使栅线1和数据线3相互垂直,位于待形成的具有至少两个像素畴区域的像素电极的像素畴区域之间对应的区域。
之后在形成包括第二绝缘层的同时还在第一极72对应区域形成穿过所述第二绝缘层的第一过孔,及在存储电极2对应的区域形成穿过第一绝缘层和第二绝缘层的第二过孔,使像素电极通过所述第二过孔连接所述存储电极2,存储电极2和公共电极线4形成存储电容。
形成包括具有两行、两列四个像素畴区域的像素电极的图形,像素电极通过第一过孔连接第一极72,并通过第二过孔连接存储电极2,最终形成如图3和4的结构。
为了减轻像素电极和数据线3之间的串扰,在形成第二绝缘层的步骤之后、形成像素电极的步骤之前还在第二绝缘层上形成第三绝缘层,第一过孔穿过第三绝缘层和第二绝缘层,第二过孔穿过第三绝缘层、第二绝缘层和第一绝缘层。第三绝缘层通常采用有机绝缘层。
以上所述仅为本发明的较佳实施例而已,并不用以限制本发明,凡在本发明的精神和原则之内,所作的任何修改、等同替换、改进等,均应包含在本发明的保护范围之内。
Claims (16)
1.一种阵列基板,其特征在于,包括:形成在衬底基板上的栅线、数据线、公共电极线,所述公共电极线将显示区域划分成多个像素区域,每个所述像素区域内都设置有像素电极;
其中,所述像素区域包括:至少两个像素畴区域,所述像素电极与所述像素畴区域对应的部分具有条状镂空,所述栅线和数据线相交,且所述栅线和数据线中至少一条形成在所述至少两个像素畴区域之间的暗纹区,所述栅线和数据线的交叉处形成有薄膜晶体管,所述薄膜晶体管连接所述栅线、数据线和像素电极,所述栅线和数据线之间间隔第一绝缘层,所述数据线和像素电极之间间隔第二绝缘层。
2.如权利要求1所述的阵列基板,其特征在于,每个所述像素区域包括:两行、两列四个像素畴区域;所述栅线和数据线相互垂直,且均形成在所述四个像素畴区域之间的暗纹区。
3.如权利要求1或2所述的阵列基板,其特征在于,所述像素电极具有的条状镂空相对于其对应的暗纹区对称。
4.如权利要求1或2所述的阵列基板,其特征在于,
所述栅线形成在所述衬底基板之上;
所述数据线、公共电极线和薄膜晶体管的第一极位于同一层,位于所述栅线上方且与所述栅线间隔所述第一绝缘层;
所述薄膜晶体管的栅极和栅线一体形成;
所述薄膜晶体管的有源层位于所述栅极上方,与所述栅极间隔所述第一绝缘层,且电连接所述薄膜晶体管的第一极和第二极;
所述薄膜晶体管的第二极与所述数据线一体形成;
所述像素电极位于所述数据线上方,所述像素电极通过穿过所述第二绝缘层的过孔连接所述薄膜晶体管的第一极。
5.如权利要求4所述的阵列基板,其特征在于,所述第二绝缘层与像素电极之间还形成有第三绝缘层,所述像素电极通过穿过所述第二绝缘层和第三绝缘层的过孔连接所述薄膜晶体管的第一极。
6.如权利要求1或2所述的阵列基板,其特征在于,还包括:存储电极,所述存储电极形成在所述公共电极线对应的区域,与所述公共电极线间隔所述第一绝缘层,且连接像素电极,所述存储电极与公共电极线之间形成存储电容。
7.如权利要求6所述的阵列基板,其特征在于,所述存储电极和栅线位于同一层。
8.如权利要求1或2所述的阵列基板,其特征在于,所述像素电极与所述公共电极线具有重叠的区域,与所述公共电极线间隔所述第二绝缘层,所述像素电极与公共电极线之间形成存储电容。
9.如权利要求1或2所述的阵列基板,其特征在于,所述像素电极的形状为具有条状镂空的正方形。
10.一种显示装置,其特征在于,包括如权利要求1~9中任一项所述的阵列基板、与所述阵列基板对置的对置基板及两基板间的液晶,所述阵列基板和对置基板上分别形成有相互垂直的配向层,所述配向层的暗纹区均与所述像素畴区域之间的暗纹区重叠。
11.如权利要求10所述的显示装置,其特征在于,所述对置基板上对应所述像素电极的区域为无色透明区域。
12.一种阵列基板制作方法,其特征在于,包括:
在衬底基板上形成包括栅线和栅极的图形;
依次形成包括第一绝缘层的图形、包括有源层的图形,并使所述有源层位于栅线和待形成的数据线交叉的区域;
形成包括数据线、公共电极线和薄膜晶体管的第一极和第二极的图形,使所述公共电极线将显示区域划分成多个像素区域,所述像素区域包括:至少两个像素畴区域,所述数据线和栅线相交,且所述栅线和数据线中至少一条形成在所述像素畴区域之间的暗纹区;
形成包括第二绝缘层和穿过所述第二绝缘层的第一过孔;
在每个所述像素区域形成包括像素电极的图形,其中,所述像素电极与像素畴区域对应的部分包括条状镂空,所述像素电极通过第一过孔连接所述薄膜晶体管的第一极。
13.如权利要求12所述的阵列基板制作方法,其特征在于,每个所述像素区域包括:两行、两列四个像素畴区域,形成所述栅线和数据线时,使所述栅线和数据线相互垂直,且均形成在所述四个像素畴区域之间的暗纹区。
14.如权利要求12所述的阵列基板制作方法,其特征在于,在形成所述第二绝缘层的步骤之后、形成像素电极的步骤之前还在第二绝缘层上形成第三绝缘层,所述第一过孔穿过第三绝缘层和第二绝缘层。
15.如权利要求12所述的阵列基板制作方法,其特征在于,在衬底基板上形成包括栅线的图形时,在所述公共电极线对应的区域还同时形成存储电极的图形;形成包括第二绝缘层的同时,在所述存储电极对应的区域还形成穿过所述第一绝缘层和第二绝缘层的第二过孔,使所述像素电极通过所述第二过孔连接所述存储电极。
16.如权利要求12所述的阵列基板制作方法,其特征在于,形成包括具有至少两个像素畴区域的像素电极的图形时,使所述像素电极与所述公共电极线具有重叠的区域。
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US10048559B2 (en) | 2018-08-14 |
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WO2017059825A1 (en) | 2017-04-13 |
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