CN1996585B - 具有嵌入到塑料壳体中的半导体结构组件的半导体构件 - Google Patents
具有嵌入到塑料壳体中的半导体结构组件的半导体构件 Download PDFInfo
- Publication number
- CN1996585B CN1996585B CN2006100641222A CN200610064122A CN1996585B CN 1996585 B CN1996585 B CN 1996585B CN 2006100641222 A CN2006100641222 A CN 2006100641222A CN 200610064122 A CN200610064122 A CN 200610064122A CN 1996585 B CN1996585 B CN 1996585B
- Authority
- CN
- China
- Prior art keywords
- system frame
- resilient coating
- semiconductor
- structure assembly
- semiconductor component
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 222
- 239000004033 plastic Substances 0.000 title claims abstract description 87
- 229920003023 plastic Polymers 0.000 title claims abstract description 87
- 238000000576 coating method Methods 0.000 claims description 147
- 239000011248 coating agent Substances 0.000 claims description 146
- 229920001169 thermoplastic Polymers 0.000 claims description 61
- 239000004416 thermosoftening plastic Substances 0.000 claims description 61
- 238000000034 method Methods 0.000 claims description 58
- 239000004020 conductor Substances 0.000 claims description 51
- 239000010410 layer Substances 0.000 claims description 48
- 239000000853 adhesive Substances 0.000 claims description 44
- 230000001070 adhesive effect Effects 0.000 claims description 32
- 239000011159 matrix material Substances 0.000 claims description 27
- 229910052751 metal Inorganic materials 0.000 claims description 24
- 239000002184 metal Substances 0.000 claims description 24
- 239000000463 material Substances 0.000 claims description 19
- 239000011521 glass Substances 0.000 claims description 12
- 230000008569 process Effects 0.000 claims description 12
- 230000009466 transformation Effects 0.000 claims description 12
- 239000003822 epoxy resin Substances 0.000 claims description 11
- 229920000647 polyepoxide Polymers 0.000 claims description 11
- 239000000919 ceramic Substances 0.000 claims description 9
- 238000010276 construction Methods 0.000 claims description 9
- 230000004927 fusion Effects 0.000 claims description 6
- 229910044991 metal oxide Inorganic materials 0.000 claims description 6
- 150000004706 metal oxides Chemical class 0.000 claims description 6
- 239000000758 substrate Substances 0.000 claims description 6
- 229920002302 Nylon 6,6 Polymers 0.000 claims description 5
- 239000000203 mixture Substances 0.000 claims description 5
- 239000004642 Polyimide Substances 0.000 claims description 4
- 230000015572 biosynthetic process Effects 0.000 claims description 4
- 239000010949 copper Substances 0.000 claims description 4
- 230000008021 deposition Effects 0.000 claims description 4
- 229920001721 polyimide Polymers 0.000 claims description 4
- 229920000642 polymer Polymers 0.000 claims description 4
- 239000011241 protective layer Substances 0.000 claims description 4
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 3
- 229920003189 Nylon 4,6 Polymers 0.000 claims description 3
- 239000004696 Poly ether ether ketone Substances 0.000 claims description 3
- 239000004721 Polyphenylene oxide Substances 0.000 claims description 3
- 229920001577 copolymer Polymers 0.000 claims description 3
- 229910052802 copper Inorganic materials 0.000 claims description 3
- 150000002118 epoxides Chemical class 0.000 claims description 3
- 229920000058 polyacrylate Polymers 0.000 claims description 3
- 229920006260 polyaryletherketone Polymers 0.000 claims description 3
- 229920002530 polyetherether ketone Polymers 0.000 claims description 3
- 229920005644 polyethylene terephthalate glycol copolymer Polymers 0.000 claims description 3
- 229920006380 polyphenylene oxide Polymers 0.000 claims description 3
- 229910000679 solder Inorganic materials 0.000 claims description 3
- 238000005987 sulfurization reaction Methods 0.000 claims description 3
- 229910000881 Cu alloy Inorganic materials 0.000 claims description 2
- 229910045601 alloy Inorganic materials 0.000 claims description 2
- 239000000956 alloy Substances 0.000 claims description 2
- 229910052709 silver Inorganic materials 0.000 claims description 2
- 239000004332 silver Substances 0.000 claims description 2
- 239000007787 solid Substances 0.000 claims description 2
- 238000007598 dipping method Methods 0.000 claims 2
- 238000002347 injection Methods 0.000 claims 2
- 239000007924 injection Substances 0.000 claims 2
- 238000007639 printing Methods 0.000 claims 2
- 238000002360 preparation method Methods 0.000 claims 1
- 230000007704 transition Effects 0.000 claims 1
- 150000001875 compounds Chemical class 0.000 abstract description 3
- 239000012815 thermoplastic material Substances 0.000 abstract description 2
- 208000037656 Respiratory Sounds Diseases 0.000 description 23
- 230000008901 benefit Effects 0.000 description 17
- 238000004519 manufacturing process Methods 0.000 description 10
- 238000012360 testing method Methods 0.000 description 9
- 230000000712 assembly Effects 0.000 description 8
- 238000000429 assembly Methods 0.000 description 8
- 230000000694 effects Effects 0.000 description 6
- 206010011376 Crepitations Diseases 0.000 description 5
- 238000013459 approach Methods 0.000 description 4
- 230000033228 biological regulation Effects 0.000 description 4
- 238000005476 soldering Methods 0.000 description 4
- 235000002017 Zea mays subsp mays Nutrition 0.000 description 2
- 241000482268 Zea mays subsp. mays Species 0.000 description 2
- 238000013461 design Methods 0.000 description 2
- 238000009713 electroplating Methods 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 230000002349 favourable effect Effects 0.000 description 2
- 238000009413 insulation Methods 0.000 description 2
- 230000007246 mechanism Effects 0.000 description 2
- 238000012545 processing Methods 0.000 description 2
- 239000000523 sample Substances 0.000 description 2
- 239000011265 semifinished product Substances 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 description 1
- HCHKCACWOHOZIP-UHFFFAOYSA-N Zinc Chemical compound [Zn] HCHKCACWOHOZIP-UHFFFAOYSA-N 0.000 description 1
- 239000004411 aluminium Substances 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 238000005219 brazing Methods 0.000 description 1
- 239000000969 carrier Substances 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 229910052804 chromium Inorganic materials 0.000 description 1
- 239000011651 chromium Substances 0.000 description 1
- 239000012050 conventional carrier Substances 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 230000007797 corrosion Effects 0.000 description 1
- 238000005260 corrosion Methods 0.000 description 1
- 230000032798 delamination Effects 0.000 description 1
- 238000001514 detection method Methods 0.000 description 1
- 239000003989 dielectric material Substances 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 230000007613 environmental effect Effects 0.000 description 1
- 238000011049 filling Methods 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 238000007654 immersion Methods 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 238000000608 laser ablation Methods 0.000 description 1
- 238000011068 loading method Methods 0.000 description 1
- 229910001092 metal group alloy Inorganic materials 0.000 description 1
- 238000005457 optimization Methods 0.000 description 1
- 238000001020 plasma etching Methods 0.000 description 1
- 239000013047 polymeric layer Substances 0.000 description 1
- 238000006116 polymerization reaction Methods 0.000 description 1
- 239000012925 reference material Substances 0.000 description 1
- 238000011069 regeneration method Methods 0.000 description 1
- 230000008439 repair process Effects 0.000 description 1
- 238000005507 spraying Methods 0.000 description 1
- 230000007480 spreading Effects 0.000 description 1
- 238000003892 spreading Methods 0.000 description 1
- 238000003466 welding Methods 0.000 description 1
- -1 wherein Substances 0.000 description 1
- 229910052725 zinc Inorganic materials 0.000 description 1
- 239000011701 zinc Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3142—Sealing arrangements between parts, e.g. adhesion promotors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05599—Material
- H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05617—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
- H01L2224/05624—Aluminium [Al] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
- H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/485—Material
- H01L2224/48505—Material at the bonding interface
- H01L2224/48599—Principal constituent of the connecting portion of the wire connector being Gold (Au)
- H01L2224/486—Principal constituent of the connecting portion of the wire connector being Gold (Au) with a principal constituent of the bonding area being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/48617—Principal constituent of the connecting portion of the wire connector being Gold (Au) with a principal constituent of the bonding area being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950 °C
- H01L2224/48624—Aluminium (Al) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
- H01L2224/85909—Post-treatment of the connector or wire bonding area
- H01L2224/8592—Applying permanent coating, e.g. protective coating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01005—Boron [B]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01006—Carbon [C]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01013—Aluminum [Al]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01015—Phosphorus [P]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01024—Chromium [Cr]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01028—Nickel [Ni]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01029—Copper [Cu]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/0103—Zinc [Zn]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01033—Arsenic [As]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01047—Silver [Ag]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01078—Platinum [Pt]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01082—Lead [Pb]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/014—Solder alloys
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1204—Optical Diode
- H01L2924/12041—LED
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/156—Material
- H01L2924/15786—Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
- H01L2924/15787—Ceramics, e.g. crystalline carbides, nitrides or oxides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
- H01L2924/183—Connection portion, e.g. seal
- H01L2924/18301—Connection portion, e.g. seal being an anchoring portion, i.e. mechanical interlocking between the encapsulation resin and another package part
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
- Die Bonding (AREA)
Abstract
本发明涉及一种具有嵌入到塑料壳体中的半导体结构组件的半导体构件(1),其中,在所述与塑料壳体形成界面的半导体构件(1)的半导体结构组件的表面上至少部分地设置一个缓冲层(5)。该缓冲层设置在半导体结构组件(28)和塑料壳体(4)之间,并且该缓冲层(5)至少部分地具有一种热塑性材料(6)。
Description
技术领域
本发明涉及一种具有嵌入到塑料壳体中的半导体结构组件的半导体结构组件,其中,半导体结构组件的表面至少部分地具有一个缓冲层。此外,本发明还涉及一种制造半导体构件、系统支架和这样一种类型的缓冲层的方法。
背景技术
按照这种制造方法检测构件的功能性以及可靠性。由于提高了温度,这种方法会导致形成裂纹,甚至在半导体构件的不同的材料之间的边界上导致脱层。特别是在电路支架和塑料壳体之间形成裂纹是一个问题。
在系统支架和塑料壳体之间缺乏粘合在半导体构件中导致水气聚集在系统支架和塑料壳体之间的边界层中。当将半导体构件焊接到印刷电路板上时半导体构件在最短的时间内从室温一直加热到260℃时水气突然膨胀。水分含量突然膨胀的结果是在半导体构件的壳体中出现裂纹和/或破裂,这就叫做“爆玉米花效应”。
为了防止这种爆玉米花效应必须阻止水分在半导体结构组件和塑料壳体之间的边界层中的聚集。通过改进半导体结构组件表面和塑料壳体表面之间的粘合可减少水分的聚集。为了改进这种粘合已公开不同的方法。
US-5,554,569公开了一种使扁平导线框架表面机械粗糙的方法。粗糙的表面可以使得与塑料壳体的啮合,并且因此有更好的附着性。然而这种方法执行起来困难,并且成本高。
也公开了在安装之前在系统支架上涂覆粘附剂。在US 5122858中在扁平导线框架上涂覆一层聚合物层。
DE 10124047公开了一种具有半导体芯片和系统支架的电子构件以及制造该构件的方法,其中,金属系统支架具有一个由金属氧化物,特别是金属锌、铬制成的,并且形成树枝形态的电镀沉积的附着层。
这种构件和制造方法具有如下缺点,即通过电镀沉积只能在金属表面上产生这类树枝形态,这样就在没有前面的具有短路的、但是金属能导电的层的情况下不能为半导体结构组件,如由陶瓷或者印刷电路板材料制成的系统支架制造出这种粘附剂层。
也需要改进必须满足环保法律的未来要求的“绿色”构件的可靠性。特别是希望使用无铅的焊料。然而无铅焊料有下述缺点,即需要更高的焊接温度260℃。所以在“绿色”构件中形成裂纹是一个特别的问题。
发明内容
因此,本发明的任务是提供一种具有半导体结构组件的半导体构件,其中,这些半导体结构组件具有一种与包围它们的塑料壳体的可靠的粘合。
这个任务通过这样一种具有嵌入到塑料壳体中的半导体结构组件的半导体构件来完成:与塑料壳体形成界面的半导体结构组件的表面至少部分地具有一个缓冲层,所述塑料壳体具有环氧树脂,该缓冲层设置在半导体结构组件和塑料壳体之间。缓冲层至少部分地由一种热塑性材料制成,该缓冲层直接在半导体结构组件和塑料壳体之间延伸。
根据本发明的具有热塑性材料的缓冲层具有下述优点,即它富有弹性且为粘弹性的。当温度超过它的玻璃转变温度时该缓冲层的热塑性材料会软化和重复流动。因此热塑性材料可以流入在半导体结构组件和塑料壳体之间出现的裂纹和气泡之中。这种功能没有在已公开的粘附剂层中显示出来,本发明规定的是完全另一种方案。因此根据本发明的缓冲层的作用和根据已改进的机械锚接,或者已改进的化合物而设计的粘附剂层不同。
在已嵌入的结构组件上涂覆粘附剂层的半导体构件中出现裂纹以后,这些裂纹不能进行修复。因此人们通常试图借助改进的粘附剂层来改进半导体结构组件和塑料壳体之间的粘合。这例如通过一种多孔的层达到,以改进机械锚接。这可以替代地可借助一些聚合物办到,这些聚合物具有确定的化学端基,这些化学端基对于结构组件的材料具有一种特别的亲合力。
与此相反的是本发明规定的是一种具有自我修复机制的半导体构件。当提高温度时由于构件的材料的不同的膨胀系数而形成裂纹。热塑性材料具有这样的特性,即当温度超过它的玻璃转变温度时它会重复地流动。例如在测试过程中当在扁平导线框架的芯片岛和塑料壳体之间的边界上出现裂纹时这些裂纹可通过缓冲层的已软化的热塑性材料的流动填平。因此,在根据本发明的构件中在测试过程中会发生形成裂纹并且修复这些裂纹。在根据本发明的结构组件中不仅能制造无裂纹的构件,而且也能给顾客提供一种能自动修复以后产生的裂纹的构件。
另一优点是热塑性材料也可以阻止裂纹的蔓延,这样就提高了在继续测试过程中和运行中的结构组件的可靠性。因此表明了该结构组件的稳定性和可靠性。
这种半导体构件的另一优点是,可以在由不同材料制成的半导体结构组件的所有表面上设置缓冲层,这样就在半导体构件的金属表面、陶瓷表面和/或其它塑料表面和例如由一种环氧树脂制成的塑料壳体之间形成一个防水和防腐蚀的边界层。此外也可在具有相应结构化的金属涂层的陶瓷板或者印刷电路板的系统支架上涂覆缓冲层。
本发明的优选的技术方案在下文中得出。
在一种实施方式中热塑性材料具有低于150℃的玻璃转变温度(Tg)。这种热塑性材料软化,并且在低于150℃温度时流动,并且适合最高测试温度为150℃时的应用。这可使得热塑性材料软化,并且在测试过程期间出现的裂纹可以填平。可为顾客提供无裂纹的构件。
在另一实施方式中热塑性材料具有低于120℃的玻璃转变温度(Tg)。这种材料具有当达到典型的压热器温度121℃时可以流动的优点。
热塑性材料有利地具有高于260℃的熔化温度(Tm)。260℃是无铅钎焊所使用的最高钎焊温度,并且典型地是给构件加载的最高温度和构件应承受的最高温度。因此具有高于260的熔化温度的缓冲层的热塑性材料在将构件钎焊在其上的印刷电路板上时是稳定的。
热塑性材料可以是聚酰胺66、聚酰胺46、硫化聚苯醚、聚对苯二甲酸乙二醇酯、聚芳基醚酮、聚醚醚酮,或者聚碳酸酯,或者由这些物质构成的共聚物。
缓冲层可以具有2nm≤D≤10μm,优选2nm≤D≤300nm,优选2nm≤D≤50nm之间的平均厚度D。可以如此地选择厚度,即可盖住确定材料的表面,并且涂覆技术可最佳化。这导致缓冲层的更加可靠的效果。
在另一实施方式中缓冲层具有一种粘附剂。这种实施方式具有下述优点,即既改进与塑料壳体以及半导体结构组件的粘合性,同时又能实现上述应力补偿和裂纹修复效果的优点。
在一种实施方式中粘附剂容纳在热塑性材料的结构中。这种做法的优点是在待嵌入的半导体构件的表面上仅涂覆一层。这种做法减化了制造方法,并且减少了制造成本。
在另一实施方式中粘附剂以涂层的形式涂覆在热塑性材料上。这种做法的好处是可以不规定热塑性材料和粘附剂的结构兼容的组合。
粘附剂可以是环氧化物、聚酰亚胺、聚丙烯酸酯、金属氧化物或者半导体氧化物。也可设想将这些物质的混合物用作粘附剂。这些材料具有下述优点,即它们具有在半导体结构组件中用作粘附剂层适合的特性。
在本发明的另一实施方式中,缓冲层的孔隙率逐渐地从半导体结构组件表面上的无孔涂层增加到塑料壳体的过渡区域中的微孔形态。通过从开始封闭的缓冲层到表面的微孔形态的孔隙率的逐渐增加使半导体结构组件的表面在金属-塑料结合处的边界表面免于腐蚀,而随着缓冲层厚度的增加孔隙率的逐渐增加强化了与塑料壳体的啮合。在这种情况中粘附剂的材料与聚合的塑料壳体整体结合。通过粘附剂的这种内部结构也进一步地减小了边界表面中的应力。
在根据本发明的另一优选的实施方式中,半导体构件具有带有结构化的金属涂层的布线基质作为半导体结构组件。这种布线基质采用到目前为止已公开的工艺只能在结构化的金属涂层的区域中涂覆缓冲层,而采用常规的方法不能给绝缘的表面区域电镀涂层,除非人们冒险将整个的布线基质进行薄的、短路的金属涂层。但是这与这种类型的布线基质的目的和任务相矛盾,即借助结构化的金属涂层应在半导体构件的不同元件之间建立接合线和导体电路。在根据本发明的缓冲层中既给不导电的布线基质的区域,也给具有结构化的金属涂层的基质区域完全地和始终不变地设置一个缓冲层。
在本发明的另一实施方式中,半导体构件具有带有结构化金属层的陶瓷基质作为半导体结构组件。这种类型的多层陶瓷基质用于制造高频技术的半导体构件。在此也能通过根据本发明的缓冲层将半导体结构组件的陶瓷表面完全地设置一个缓冲层。
此外还规定,半导体构件具有带有结构化金属涂层的印刷电路板作为半导体结构组件。在这种情况中绝缘板的区域也可如印刷电路板上的结构化的金属涂层一样涂上一层根据本发明的缓冲层,这样,就可与盖住印刷电路板的塑料壳体有紧凑连接。
本发明的另一方面涉及一种具有多个并排地和/或依次地按横列和/或纵列地设置的半导体构件位置的系统支架。这种类型的系统支架用于将半导体结构组件容纳到具有用于与半导体芯片电连接的内接触表面的立体布线结构中,这些半导体构件位置具有一种带有用于与半导体芯片电连接的内接触表面的立体的布线结构。在制造半导体构件时,与塑料壳体构成界面的根据本发明的系统支架表面有选择地具有一个缓冲层,该缓冲层至少部分地具有热塑性材料,其中塑料壳体具有环氧树脂,并且该缓冲层直接在半导体结构组件和塑料壳体之间延伸。在这种情况中系统支架的内接触表面没有粘附剂层。
缓冲层本身在它的组成上和它的形态上和已经在上面用于涂覆在半导体结构组件上的那种详细叙述的缓冲层相同。因此,系统支架可以具有一种带有结构化金属涂层的陶瓷基质或者布线基质,或者具有带有结构化涂层的印刷电路板。在所有的情况中系统支架可以在制造半导体构件时与塑料壳体接触的表面上有选择地涂覆一层根据本发明的缓冲层。
若系统支架具有带内接触连接表面的内扁平导线则特别是这样。这些内扁平导线转变为外扁平导线,并且被系统支架的一个系统支架框支承。在这种情况中扁平导线框架可以具有一个带有许多依次设置的半导体构件位置的扁平导线带。
内扁平导线在它们的表面上具有缓冲层,该缓冲层的成分和结构上面已经详细叙述过。然而内接触表面、外扁平导线和系统支架框架仍然没有缓冲层。这种系统支架是制造半导体构件的半成品,可由半导体工业的提供厂家作为半成品生产。
在具有可选择地设置缓冲层的系统支架的另一有利的实施方式中这个系统支架为了它在安装机中的定位沿系统支架框架具有孔隙。这种做法具有下述优点,即在一个这种类型的带式系统支架上可自动地制造出许多半导体构件。
此外,系统支架优选地在内接触表面可以具有一个由银和/或焊料-合金构成的金属-合金电镀层。在这种情况中,接触连接表面不仅没有粘附剂层,而是甚至还用一个促进钎焊或者连接过程的涂层覆盖。
在本发明的另一优选的实施方式中系统支架的基准材料由高纯铜和/或铜合金构成,这些材料由于它们高的导电能力而有利。
用于制造半导体构件的系统支架的方法具有如下的方法步骤:首先将具有至少一个金属表面的基质板进行结构化,使其设计成一个系统支架。在结构化过程中产生用于将半导体结构组件容纳在半导体构件位置中的许多连续的模型。然后给系统支架的表面-这些表面在制造半导体构件时和塑料壳体形成边界面-涂覆一层缓冲层,其中,塑料壳体具有环氧树脂。根据本发明,该缓冲层至少部分地由一种热塑性材料构成,该缓冲层直接在半导体结构组件和塑料壳体之间延伸。
在继续优选地实施该方法时,在给系统支架涂覆缓冲层之前用保护层将应外露的表面区域盖住。在涂层之后可以以有利的方式使这个保护层膨胀,这样就可将它从重叠在待外露的表面区域中揭下来。
在继续优选地实施本方法时,待外露的表面区域是在给系统支架的表面涂覆缓冲层以后才重新外露的。在这种方法中在外露之前可对应保留缓冲层的表面区域进行保护。外露可用激光去除法或者借助等离子腐蚀法进行。
用于采用具有多个半导体构件位置的未涂覆缓冲层的系统支架来制造多个半导体构件的方法附加地具有下述方法步骤:将半导体结构组件、例如半导体芯片安装到在半导体构件位置中的系统支架上,其中,通过电连接元件将半导体芯片与系统支架的接触连接表面连接起来;将缓冲层涂覆到应嵌入到塑料壳体中的半导体结构组件的表面上,其中,塑料壳体具有环氧树脂,缓冲层至少部分地由一种热塑性材料制成,该缓冲层直接在半导体结构组件和塑料壳体之间延伸;将半导体结构组件嵌入到塑料壳体中;将系统支架拆开为单个的半导体结构组件。
因此,首先提供在它的表面上有选择地涂覆有缓冲层的系统支架。选择是指用缓冲层仅盖住系统支架的与塑料壳体应形成边界层的表面区域。用于电连接的接触连接表面和/或用于与半导体芯片接触的芯片连接表面则不涂覆粘附剂层。
现在将在半导体构件位置中的半导体结构组件,如半导体芯片,安装到这种类型的系统支架上,其中,通过电连接元件将半导体芯片和系统支架的接触连接表面连接。在将整个半导体结构组件安装到系统支架以后将这些半导体结构组件嵌入到塑料壳体中。然后可将该系统支架拆开成单个的半导体构件。
在这个方法中,系统支架本身可以是一个具有金属结构的印刷电路板,或者是一个多层的陶瓷板,或者是一个金属的扁平导线框架。这种方法的优点是涂覆缓冲层与半导体结构组件的材料无关。这样,金属倒装接触点还有金属接合线可像半导体芯片的表面和系统支架的表面一样也设置一个缓冲层。当半导体结构组件未嵌入到塑料壳体中之前半导体结构组件的还未涂层的表面也应涂覆缓冲层时特别使用缓冲层的这一特性。
在采用系统支架制造半导体构件的一种替代方法中也可使用一种刚开始没有任何缓冲层的系统支架。在第一步骤中将在半导体构件位置中的半导体结构组件如半导体芯片装入到该系统支架上,其中,为了进行电连接将半导体芯片和系统支架的接触连接表面连接起来。在此之后将由热塑性材料构成的缓冲层涂覆到半导体结构组件的整个表面上,而这些半导体结构组件是应该嵌入到塑料壳体之中的。然后将这些设置有缓冲层的半导体结构组件嵌入到塑料壳体中。
然后可将该系统支架拆开成单个的半导体构件。在该方法中半导体生产厂家的任务是首先将所有的半导体结构组件都安装在常规的载体上,然后将缓冲层涂覆到这些半导体结构组件的表面上。这种替代方法的优点是用塑料壳体覆盖的表面无一不涂上缓冲层。
附图说明
下面借助附图对本发明进行详细说明:
图1是根据本发明的一种第一实施方式的有选择地涂有缓冲层的半导体构件的横截面图,
图2是根据本发明的一种第二实施方式的半导体构件的横截面图,在该半导体构件中已嵌入的半导体结构组件的表面全部涂有缓冲层,
图3是根据本发明的一种第三实施方式的半导体结构组件的截面图,此外,在该半导体构件中缓冲层还具有一种粘附剂。
具体实施方式
图1表示一个具有一个半导体芯片2和一个扁平导线框架3的半导体结构组件1的截面图。扁平导线框架3的嵌入到塑料壳体4中的区域涂覆有一个缓冲层5。缓冲层5由一种热塑性材料6制成,在该实施方式中该材料为聚酰胺66。
扁平导线框加3具有一个芯片岛7和包围该芯片岛7的多个扁平导线8。每个扁平导线具有一个嵌入构件1的塑料壳体4的内部的内部区域9和一个位于塑料壳体4的外部的外部区域10。扁平导线8的外部区域10规定半导体构件的外触点,用这些外触点可将半导体构件1安装在其上的印刷电路板上。每个扁平导线8的内部区域9具有一个内接触表面11。扁平导线框架3具有Cu,内接触表面11具有一个Ni/NiP层。
半导体芯片2的惰性的背面通过粘合剂层12安装在芯片岛7上。半导体芯片2的活性的上表面具有在图1中未示出的集成电路和芯片接触表面13。芯片接触表面13通过接合线14与扁平导线8电连接。接合线14分别在芯片接触表面13和一个内接触表面11之间延伸。
半导体芯片2、接合线14、芯片岛7和扁平导线8的内部区域9嵌入到塑料壳体4中。塑料壳体4具有环氧树脂15。
扁平导线框架8的在塑料壳体4内部嵌入的内部区域9涂覆有一层由热塑性材料6构成的缓冲层5。内接触表面11以及芯片岛7的中心区域-半导体芯片2安装在其上-不涂缓冲层5。
在这种实施方式中设置了一个有选择地涂覆有缓冲层5的扁平导线框架3。半导体芯片2安装在芯片岛7上,并且接合线14设置在芯片接触表面13和扁平导线8的内接触表面之间。半导体芯片2、接合线14和扁平导线框架3的涂有缓冲层5的区域嵌入在塑料壳体4中,以制造半导体构件1。
缓冲层5是在构件安装前借助浸渍涂覆在扁平导线框架3上的。在前,用保护层将内接触表面11以及扁平导线8的外部区域10盖住,以便使这些区域免于涂上缓冲层5的热塑性材料6。
由于金属扁平导线框架和塑料壳体具有不同的膨胀系数所以会形成裂纹。因此当提高温度时,例如在制造厂家做测试过程中,或者当钎焊时形成裂纹。由热塑性材料制成的缓冲层具有在温度升高时热塑性材料会软化并且能流动的优点。因此,在根据本发明的构件中这些在测试过程中出现的裂纹也会在测试过程中被填平并且得到修复。
由一种热塑性材料6构成的缓冲层5具有下述优点,即当温度超过热塑性材料6的玻璃转变温度时该热塑性材料会重复地软化和流动。聚酰胺66的玻璃转变温度大约为80℃,它比在测试过程中所达到的最高温度低。当在测试过程中在金属扁平导线框架8和塑料壳体15之间出现裂纹或者间隙时热塑性材料6可将该裂纹或者间隙填满。
表1表示适用于根据本发明的缓冲层5的不同的热塑性材料。每种材料有低于150℃的玻璃转变温度和至少为260℃的熔化温度。
低于150℃的玻璃转变温度(Tg)有如下优点,即在典型的最高测试温度时热塑性材料软化和流动。高于260℃的熔化温度具有下述优点,即在钎焊构件时热塑性材料保持稳定。
图2表示按照本发明的第二实施方式的一个半导体构件16。在该实施方式中半导体构件16具有一个环绕布线基质17。该基质17在它的上表面具有内接触表面11,该内接触表面有铜,该基质17在它的下表面18上具有外接触表面19。内接触表面11通过导轨20和贯通触点21与外接触表面19电连接。导轨20和贯通触点21形成基质17的环绕布线结构。在这个实施例中基质17具有一个电介质层22。导轨设置在电介质层22的上侧以及下侧。
半导体芯片2的背面借助一个固定层12固定在基质17的上侧。芯片接触表面13通过接合线14与内接触表面11电连接。芯片接触表面13具有铝,接合线14具有金。
在图2中所看到的实施例中半导体结构组件28的所有已嵌入的表面都涂有缓冲层5。
在这方面半导体结构组件28就是指嵌入在塑料壳体中的那些半导体结构组件。在图2的实施方式中半导体芯片2、接合线14和环绕布线基质17的上侧就是半导体结构组件。因此接合线、半导体芯片2以及环绕布线基质17的上侧的表面都用缓冲层5覆盖。
在这个实施例中缓冲层5具有一种热塑性材料,此外还具有粘附剂部件23。粘附剂部件容纳在热塑性材料的结构中。粘附剂部件23改进热塑性材料6和塑料壳体4之间以及已嵌入的半导体部件和塑料壳体4之间的粘合。在这个实施例中粘附剂是聚酰亚胺。接合线14、半导体芯片2和环绕布线基质17的上侧的表面都涂覆有缓冲层5。这可借助喷射或者浸渍进行。
通过下述方法制造根据本发明的结构组件16。借助一个固定层12将半导体芯片2安装在基质17的上侧面。在芯片接触表面13和基质17的内接触表面11之间产生接合线14连接,因此半导体芯片2与基质17电连接。将缓冲层5涂覆在接合线、半导体芯片2以及环绕布线基质17的上侧的表面上,这样表面完全用缓冲层5覆盖。
然后将涂层的半导体芯片2、涂层的接合线14以及基质17的涂层的上侧面嵌入在塑料壳体4中。然后可将外触点安装在外触点表面上,这样就可将构件16安装在一个印刷电路板上。然后可对该结构组件16进行检测。
图3表示一个具有扁平导线框架3的半导体构件24的横截面简图,在该图中嵌入的半导体结构组件的表面全部涂上一层缓冲层5。在这种实施方式中缓冲层5具有一个由一种热塑性材料6构成的第一层和一个由带有粘附剂27的第二层26。因此该粘附剂27设置在热塑性材料6上。
在图3的实施方式中半导体结构组件28是半导体芯片2、接合线14、芯片岛7和扁平导线8的内区域9。
粘附剂层27具有一种金属氧化物,粘附剂层在该实施方式中设有多孔的粗糙表面。粗糙表面改进嵌入半导体结构组件28和塑料壳体4之间的机械锚接。
附加的粘附剂层26有如下优点,即改进塑料壳体4和塑性材料6之间以及塑料壳体4和扁平导线框架3和其它嵌入的半导体结构组件之间的附着。由于这种粘附剂27,这种设计进一步降低了形成裂纹的危险,并且同时设置了一个在出现裂纹时用热塑性材料填平这些裂纹的机构。
在这种半导体构件中,为了改进半导体结构组件3和塑料壳体4的表面之间的表面附着在它们安装到扁平导线框架3之后整个半导体结构组件3都涂覆缓冲层5。首先是将表面涂覆由热塑性材料6构成的层25。然后在热塑性材料层25上再涂上一层粘附剂层26。
附图标记列表
1 第一半导体构件
2 半导体芯片
3 扁平导线框架
4 塑料壳体
5 缓冲层
6 热塑性材料
7 芯片岛
8 扁平导线
9 扁平导线的内区域
10 扁平导线的外区域
11 内接触表面
12 胶粘剂
13 芯片接触表面
14 接合线
15 环氧树脂
16 第二半导体构件
17 环绕布线基质
18 下侧面
19 外接触表面
20 导轨
21 贯通触点
22 介电材料
23 粘附剂
24 第三半导体构件
25 第一层
26 第二层
27 金属氧化物
28 半导体结构组件
Claims (58)
1.具有嵌入到塑料壳体(4)中的半导体结构组件(28)的半导体构件(1;16;24),其中,塑料壳体(4)具有环氧树脂(15),与塑料壳体(4)形成界面的所述半导体结构组件(28)的表面至少部分地具有一个缓冲层(5),该缓冲层设置在半导体结构组件(28)和塑料壳体(4)之间,并且其中该缓冲层(5)至少部分地由一种热塑性材料(6)制成,该缓冲层直接在半导体结构组件和塑料壳体之间延伸,其中所述缓冲层(5)的孔隙率逐渐地从半导体结构组件(28)的表面上的无孔隙涂层增加到塑料壳体(4)的过渡区域中的微孔形态。
2.按照权利要求1所述的半导体构件(1;16;24),其特征在于,所述热塑性材料(6)具有低于150℃的玻璃转变温度(Tg)。
3.按照权利要求2所述的半导体构件(1;16;24),其特征在于,所述热塑性材料(6)具有低于120℃的玻璃转变温度(Tg)。
4.按照前述权利要求中任一项所述的半导体构件(1;16;24),其特征在于,所述热塑性材料(6)具有高于260℃的熔化温度(Tm)。
5.按照权利要求1至3中任一项所述的半导体构件(1;16;24),其特征在于,所述热塑性材料(6)具有聚酰胺66、聚酰胺46、硫化聚苯醚、聚对苯二甲酸乙二醇酯、聚芳基醚酮、聚醚醚酮或者聚碳酸酯,或者这些聚合物的共聚物。
6.按照权利要求1至3中任一项所述的半导体构件(1;16;24),其特征在于,所述缓冲层(5)具有一种在2nm≤D≤10μm之间的平均厚度D。
7.按照权利要求6所述的半导体构件(1;16;24),其特征在于,所述缓冲层(5)具有一种在2nm≤D≤300nm之间的平均厚度D。
8.按照权利要求7所述的半导体构件(1;16;24),其特征在于,所述缓冲层(5)具有一种在2nm≤D≤50nm之间的平均厚度D。
9.按照权利要求1至3中任一项所述的半导体构件(1;16;24),其特征在于,此外,所述缓冲层(5)还具有一种粘附剂(23)。
10.按照权利要求9所述的半导体构件(1;16;24),其特征在于,所述粘附剂(23)容纳在热塑性材料(6)的结构中。
11.按照权利要求9所述的半导体构件(1;16;24),其特征在于,所述粘附剂(27)作为涂层(26)设置在热塑性材料(6)上。
12.按照权利要求9所述的半导体构件(1;16;24),其特征在于,所述粘附剂(23;27)具有环氧化物、聚酰亚胺、聚丙烯酸酯、金属氧化物或半导体氧化物或者这些物质的混合物。
13.按照权利要求1至3中任一项所述的半导体构件(1;16;24),其特征在于,所述半导体构件(16)具有带有结构化的金属涂层(11、19、20)的布线基质(17),作为半导体结构组件(28)。
14.按照权利要求1至3中任一项所述的半导体构件(1;16;24),其特征在于,所述半导体构件(16)具有一个带有结构化的金属层的陶瓷基质,作为半导体结构组件(28)。
15.按照权利要求1至3中任一项所述的半导体构件(1;16;24),其特征在于,所述半导体构件(1;24)具有一个扁平导线框架(3),作为半导体结构组件(28),该导线框架具有一个芯片岛(7)和内部扁平导线(9),它们在塑料壳体(4)的外部过渡到作为外触点的外扁平导线(10)。
16.按照权利要求1至3中任一项所述的半导体构件(1;16;24),其特征在于,所述半导体构件(1)具有一个半导体芯片(2)作为半导体结构组件(28)。
17.按照权利要求1至3中任一项所述的半导体构件(1;16;24),其特征在于,所述半导体构件(1)具有接合线(14)作为半导体结构组件(28)。
18.具有多个并排和/或依次地按横列和/或按纵列设置的半导体构件位置的系统支架(3),为了容纳半导体结构组件(28)这些半导体构件位置具有一种带有用于与半导体芯片(2)电连接的内接触表面(11)的立体的布线结构(15),其中,在制造半导体构件(1)时与塑料壳体(4)构成界面的所述系统支架(3)的表面(19)至少部分地具有一个缓冲层(5),该缓冲层至少部分地由一种热塑性材料(6)制成,其中塑料壳体(4)具有环氧树脂(15),该缓冲层直接在半导体结构组件和塑料壳体之间延伸,并且其中所述内接触表面(11)没有缓冲层(5),其中所述缓冲层(5)的孔隙率逐渐从半导体结构组件(28)的表面上的无孔隙涂层增加到塑料壳体(4)的过渡区域中的微孔形态。
19.按照权利要求18所述的系统支架,其特征在于,所述热塑性材料(6)具有低于150℃的玻璃转变温度(Tg)。
20.按照权利要求19所述的系统支架,其特征在于,所述热塑性材料(6)具有低于120℃的玻璃转变温度(Tg)。
21.按照权利要求18至20中任一项所述的系统支架,其特征在于,所述热塑性材料(6)具有高于260℃的熔化温度(Tm)。
22.按照权利要求18至20中任一项所述的系统支架,其特征在于,所述热塑性材料(6)具有聚酰胺66、聚酰胺46、硫化聚苯醚、聚对苯二甲酸乙二醇酯、聚芳基醚酮、聚醚醚酮或者聚碳酸酯,或者这些聚合物的共聚物。
23.按照权利要求18至20中任一项所述的系统支架,其特征在于,所述缓冲层(5)具有一种在2nm≤D≤10μm之间的平均厚度D。
24.按照权利要求23所述的系统支架,其特征在于,所述缓冲层(5)具有一种在2nm≤D≤300nm之间的平均厚度D。
25.按照权利要求24所述的系统支架,其特征在于,所述缓冲层(5)具有一种在2nm≤D≤50nm之间的平均厚度D。
26.按照权利要求18至20中任一项所述的系统支架,其特征在于,所述缓冲层(5)还具有一种粘附剂(23、27)。
27.按照权利要求26所述的系统支架,其特征在于,所述粘附剂(23)容纳在热塑性材料(6)的结构中。
28.按照权利要求26所述的系统支架,其特征在于,所述粘附剂(27)作为涂层(26)设置在热塑性材料(6)上。
29.按照权利要求26所述的系统支架,其特征在于,所述粘附剂(23;27)具有环氧化物、聚酰亚胺、聚丙烯酸酯、金属氧化物或半导体氧化物、或者这些物质的混合物。
30.按照权利要求18至20中任一项所述的系统支架,其特征在于,所述半导体构件(16)具有一种带有结构化的金属涂层(11、19、20)的布线基质(17),作为半导体结构组件(28)。
31.按照权利要求18至20中任一项所述的系统支架,其特征在于,所述半导体构件(16)具有一种带有结构化的金属层(11、19、20)的陶瓷基质,作为半导体结构组件(28)。
32.按照权利要求18至20中任一项所述的系统支架,其特征在于,所述半导体构件(1;24)具有一个扁平导线框架(3),作为半导体结构组件(28),该扁平导线框架具有一个芯片岛(7)和一个内扁平导线(9),它们在塑料壳体(4)的外部转变为作为外触点的外扁平导线(10)。
33.按照权利要求32所述的系统支架,其特征在于,所述系统支架(3)具有带有内接触表面(11)的内扁平导线(9),这些内接触表面转变为外扁平导线(11)并且由一个系统支架框支承,其中,扁平导线框架具有一个带有许多依次设置的半导体构件位置的扁平导线带,其中,内扁平导线(9)在它们的表面上具有缓冲层(5),并且其中接触连接表面(11)、外扁平导线(10)和系统支架框架没有缓冲层(5)。
34.按照权利要求18至20中任一项所述的系统支架,其特征在于,具有有选择地设置的缓冲层(5)的系统支架(3)为了它在安装机械中的定位沿系统支架框具有孔隙。
35.按照权利要求18至20中任一项所述的系统支架,其特征在于,所述系统支架(3)在接触连接表面(11)上具有金属-合金-电镀层。
36.按照权利要求35所述的系统支架,其特征在于,所述金属-合金-电镀层由银和/或焊料合金制成。
37.按照权利要求18至20中任一项所述的系统支架,其特征在于,所述系统支架(3)具有高纯铜和/或铜合金作为基础材料。
38.制造用于半导体构件(1)的系统支架(3)的方法,该方法具有下述方法步骤:
-对于具有至少一个金属表面的基质板进行结构化,使其成为一个具有多个连续的模型的系统支架(3),该模型用于将半导体结构组件(28)容纳在系统支架(3)的半导体构件位置中;
-给系统支架(3)的表面涂上一层缓冲层(5),该系统支架的表面在制造半导体构件(1)时与塑料壳体(4)构成一个界面,其中,塑料壳体(4)具有环氧树脂(15),该缓冲层(5)至少部分地由一种热塑性材料(6)制成,该缓冲层直接在半导体结构组件和塑料壳体之间延伸,其中所述缓冲层(5)的孔隙率逐渐从半导体结构组件(28)的表面上的无孔隙涂层增加到塑料壳体(4)的过渡区域中的微孔形态。
39.按照权利要求38所述的方法,其特征在于,所述缓冲层(5)借助于浸渍、喷射或者印刷方法来进行。
40.按照权利要求38或者权利要求39所述的方法,其特征在于,所述缓冲层(5)全面地沉淀在系统支架(3)的外露的表面上。
41.按照权利要求38或39所述的方法,其特征在于,在给系统支架(3)涂覆缓冲层(5)之前用一种保护层盖住应外露的表面区域。
42.按照权利要求38或39所述的方法,其特征在于,在给系统支架(3)涂覆缓冲层(5)之后将应外露的表面区域露出。
43.按照权利要求38或39所述的方法,其特征在于,此外,所述缓冲层(5)还具有一种粘附剂(23;27)。
44.按照权利要求43所述的方法,其特征在于,在热塑性材料(6)沉淀之后在热塑性材料(6)的表面上涂覆粘附剂(27)。
45.按照权利要求38或39所述的方法,其特征在于,利用一种在2nm≤D≤10μm之间的平均厚度D来涂覆所述缓冲层(5)。
46.按照权利要求45所述的方法,其特征在于,所述缓冲层(5)以在2nm≤D≤300nm之间的平均厚度D来进行涂覆。
47.按照权利要求45所述的方法,其特征在于,所述缓冲层(5)以在2nm≤D ≤50nm之间的平均厚度D来进行涂覆。
48.按照权利要求38或39所述的方法,该方法具有下述附加的方法步骤:
-制备在表面上有选择地涂覆有缓冲层(5)的系统支架(3),所述表面与塑料壳体(4)具有一个边界层,其中,接触连接表面(11)不涂层;
-将半导体结构组件(28)安装到半导体构件位置中的系统支架(3)上,其中,通过电连接元件(14)将半导体芯片(2)与系统支架(3)的内接触表面(11)连接起来;
-将半导体结构组件(28)嵌入到一个塑料壳体(4)中;
-将系统支架(3)拆开为单个的半导体构件(1;16;24)。
49.按照权利要求48所述的方法,其特征在于,在将半导体结构组件(28)嵌入到塑料壳体(4)中之前,将半导体结构组件(28)的还未涂层的表面也用缓冲层(5)进行涂覆。
50.按照权利要求48所述的方法,其特征在于,所述半导体结构组件(28)设置为半导体芯片(2)。
51.采用首先未涂覆缓冲层(5)的系统支架(3)来制造多个半导体构件(1)的方法,包括下列步骤:
-将半导体结构组件(28)安装到在半导体构件位置中的系统支架(3;17)上,其中,通过电连接元件(14)将半导体芯片(2)与系统支架(3)的接触连接表面(11)连接起来;
-将缓冲层(5)涂覆到应嵌入到塑料壳体(4)中的半导体结构组件(28)的表面上,其中,塑料壳体(4)具有环氧树脂(15),缓冲层(5)至少部分地由一种热塑性材料(6)制成,该缓冲层直接在半导体结构组件和塑料壳体之间延伸;
-将半导体结构组件(28)嵌入到塑料壳体(4)中;
-将系统支架(3)拆开为单个的半导体结构组件(1;16;24);
-所述缓冲层(5)的孔隙率逐渐从半导体结构组件(28)的表面上的无孔隙涂层增加到塑料壳体(4)的过渡区域中的微孔形态。
52.按照权利要求51所述的方法,其特征在于,借助于浸渍、喷射或者印刷方法完成对于结构组件(28)的表面的涂层。
53.按照权利要求51或52所述的方法,其特征在于,此外,所述缓冲层(5)还具有一种粘附剂(23;27)。
54.按照权利要求53所述的方法,其特征在于,在热塑性材料(6)沉淀以后,在热塑性材料(6)的表面上涂覆所述粘附剂(27)。
55.按照权利要求51或52所述的方法,其特征在于,以一种在2nm≤D≤10μm之间的平均厚度D来涂覆缓冲层(5)。
56.按照权利要求55所述的方法,其特征在于,以一种在2nm≤D≤300nm之间的平均厚度D来涂覆缓冲层(5)。
57.按照权利要求55所述的方法,其特征在于,以一种在2nm≤D≤50nm之间的平均厚度D来涂覆缓冲层(5)。
58.按照权利要求51所述的方法,其特征在于,所述半导体结构组件(28)设置为半导体芯片(2)。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE102005047856.5 | 2005-10-05 | ||
DE102005047856A DE102005047856B4 (de) | 2005-10-05 | 2005-10-05 | Halbleiterbauteil mit in Kunststoffgehäusemasse eingebetteten Halbleiterbauteilkomponenten, Systemträger zur Aufnahme der Halbleiterbauteilkomponenten und Verfahren zur Herstellung des Systemträgers und von Halbleiterbauteilen |
Publications (2)
Publication Number | Publication Date |
---|---|
CN1996585A CN1996585A (zh) | 2007-07-11 |
CN1996585B true CN1996585B (zh) | 2012-08-15 |
Family
ID=37896239
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN2006100641222A Expired - Fee Related CN1996585B (zh) | 2005-10-05 | 2006-09-30 | 具有嵌入到塑料壳体中的半导体结构组件的半导体构件 |
Country Status (3)
Country | Link |
---|---|
US (1) | US7777352B2 (zh) |
CN (1) | CN1996585B (zh) |
DE (1) | DE102005047856B4 (zh) |
Families Citing this family (35)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8679674B2 (en) | 2005-03-25 | 2014-03-25 | Front Edge Technology, Inc. | Battery with protective packaging |
US7846579B2 (en) | 2005-03-25 | 2010-12-07 | Victor Krasnov | Thin film battery with protective packaging |
US8577996B2 (en) * | 2007-09-18 | 2013-11-05 | Tremor Video, Inc. | Method and apparatus for tracing users of online video web sites |
EP2154713B1 (en) * | 2008-08-11 | 2013-01-02 | Sensirion AG | Method for manufacturing a sensor device with a stress relief layer |
JP2010109011A (ja) * | 2008-10-28 | 2010-05-13 | Nec Electronics Corp | 半導体装置およびその製造方法 |
KR101013557B1 (ko) | 2008-11-06 | 2011-02-14 | 주식회사 하이닉스반도체 | 플랙시블 반도체 패키지 및 이를 제조하기 위한 와이어 본딩 장치 |
JP5619381B2 (ja) * | 2009-07-09 | 2014-11-05 | ピーエスフォー ルクスコ エスエイアールエルPS4 Luxco S.a.r.l. | 半導体装置及び半導体装置の製造方法 |
DE102009054189A1 (de) * | 2009-11-20 | 2011-05-26 | Roman Cihar | Neuartige, Stoß- gedämpfte Räder oder Rollen sowie Verfahren zu deren Herstellung |
DE102010048982B4 (de) | 2010-09-03 | 2022-06-09 | Inficon Gmbh | Lecksuchgerät |
JP2012174996A (ja) * | 2011-02-23 | 2012-09-10 | Fujitsu Ltd | 半導体装置及び半導体装置の製造方法 |
US8252631B1 (en) * | 2011-04-28 | 2012-08-28 | Freescale Semiconductor, Inc. | Method and apparatus for integrated circuit packages using materials with low melting point |
US8865340B2 (en) | 2011-10-20 | 2014-10-21 | Front Edge Technology Inc. | Thin film battery packaging formed by localized heating |
US9887429B2 (en) | 2011-12-21 | 2018-02-06 | Front Edge Technology Inc. | Laminated lithium battery |
US8864954B2 (en) | 2011-12-23 | 2014-10-21 | Front Edge Technology Inc. | Sputtering lithium-containing material with multiple targets |
US9257695B2 (en) | 2012-03-29 | 2016-02-09 | Front Edge Technology, Inc. | Localized heat treatment of battery component films |
US9077000B2 (en) | 2012-03-29 | 2015-07-07 | Front Edge Technology, Inc. | Thin film battery and localized heat treatment |
US9159964B2 (en) | 2012-09-25 | 2015-10-13 | Front Edge Technology, Inc. | Solid state battery having mismatched battery cells |
US8753724B2 (en) | 2012-09-26 | 2014-06-17 | Front Edge Technology Inc. | Plasma deposition on a partially formed battery through a mesh screen |
US9356320B2 (en) | 2012-10-15 | 2016-05-31 | Front Edge Technology Inc. | Lithium battery having low leakage anode |
TWI477023B (zh) * | 2013-01-18 | 2015-03-11 | 矽品精密工業股份有限公司 | 電子封裝件及其製法 |
US20150252666A1 (en) | 2014-03-05 | 2015-09-10 | Baker Hughes Incorporated | Packaging for electronics in downhole assemblies |
US9343385B2 (en) * | 2014-07-30 | 2016-05-17 | Taiwan Semiconductor Manufacturing Company Ltd. | Semiconductor device comprising a chip substrate, a mold, and a buffer layer |
DE102014114808B4 (de) | 2014-10-13 | 2018-03-08 | Infineon Technologies Ag | Elektronikmodul und Verfahren zur Herstellung eines Elektronikmoduls |
JP6327114B2 (ja) * | 2014-10-30 | 2018-05-23 | 三菱電機株式会社 | 電子部品搭載基板、電動機、空気調和機、及び電子部品搭載基板の製造方法 |
CN104538566A (zh) * | 2015-01-22 | 2015-04-22 | 深圳市华星光电技术有限公司 | Oled的封装方法及oled封装结构 |
US10008739B2 (en) | 2015-02-23 | 2018-06-26 | Front Edge Technology, Inc. | Solid-state lithium battery with electrolyte |
DE102015108736A1 (de) * | 2015-06-02 | 2016-12-08 | Osram Opto Semiconductors Gmbh | Optoelektronisches Bauelement und Verfahren zur Herstellung eines optoelektronischen Bauelements |
DE102016106137B4 (de) * | 2016-04-04 | 2023-12-28 | Infineon Technologies Ag | Elektronikvorrichtungsgehäuse umfassend eine dielektrische Schicht und ein Kapselungsmaterial |
CN110392924B (zh) | 2017-02-21 | 2022-11-15 | 三菱电机株式会社 | 半导体装置 |
KR20190000213A (ko) * | 2017-06-22 | 2019-01-02 | 최용규 | 반도체소자의 접합 구조 |
DE102017211727A1 (de) * | 2017-07-10 | 2019-01-10 | Tridonic Jennersdorf Gmbh | Gebondete LED-Chips in einer Polymermatrix |
US10957886B2 (en) | 2018-03-14 | 2021-03-23 | Front Edge Technology, Inc. | Battery having multilayer protective casing |
DE102018111610A1 (de) * | 2018-05-15 | 2019-11-21 | Osram Opto Semiconductors Gmbh | Optoelektronische Leuchtvorrichtung, Bonddraht und Verfahren zur Herstellung einer optoelektronischen Leuchtvorrichtung |
CN110112103B (zh) * | 2019-05-20 | 2021-06-04 | 东莞市美康仕电子科技有限公司 | 一种有效提高抗冲击性能的集成电路板 |
CN114380268A (zh) * | 2021-11-29 | 2022-04-22 | 上海航天控制技术研究所 | 带减振结构的封装管壳及mems惯性器件 |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5536970A (en) * | 1992-09-29 | 1996-07-16 | Kabushiki Kaisha Toshiba | Resin-encapsulated semiconductor device |
CN1172345A (zh) * | 1996-07-30 | 1998-02-04 | Lg半导体株式会社 | 抗裂半导体封装,其制造方法以及所用制造设备 |
US6118183A (en) * | 1996-12-19 | 2000-09-12 | Texas Instruments Incorporated | Semiconductor device, manufacturing method thereof, and insulating substrate for same |
Family Cites Families (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4814943A (en) * | 1986-06-04 | 1989-03-21 | Oki Electric Industry Co., Ltd. | Printed circuit devices using thermoplastic resin cover plate |
JPS63135452A (ja) | 1986-11-26 | 1988-06-07 | Matsushita Electronics Corp | 封止用樹脂材 |
US5122858A (en) * | 1990-09-10 | 1992-06-16 | Olin Corporation | Lead frame having polymer coated surface portions |
JP3388369B2 (ja) | 1994-01-31 | 2003-03-17 | 日本テキサス・インスツルメンツ株式会社 | 半導体パッケージ装置 |
US5554569A (en) * | 1994-06-06 | 1996-09-10 | Motorola, Inc. | Method and apparatus for improving interfacial adhesion between a polymer and a metal |
JP2000228467A (ja) | 1998-12-02 | 2000-08-15 | Toshiba Corp | 半導体封止用樹脂組成物及び半導体装置とその製造方法 |
US6841256B2 (en) * | 1999-06-07 | 2005-01-11 | Honeywell International Inc. | Low dielectric constant polyorganosilicon materials generated from polycarbosilanes |
JP3062192B1 (ja) * | 1999-09-01 | 2000-07-10 | 松下電子工業株式会社 | リ―ドフレ―ムとそれを用いた樹脂封止型半導体装置の製造方法 |
EP1215724B1 (en) * | 2000-11-20 | 2012-10-31 | Texas Instruments Incorporated | Wire bonded semiconductor device with low capacitance coupling |
DE10124047B4 (de) * | 2001-05-16 | 2006-12-14 | Infineon Technologies Ag | Verfahren zur Herstellung elektronischer Bauteile mit Halbleiterchips und Systemträger |
JP3719234B2 (ja) * | 2001-08-06 | 2005-11-24 | 日立化成工業株式会社 | 半導体用接着フィルム、およびこれを用いた半導体用接着フィルム付きリードフレームならびに半導体装置 |
WO2004000966A1 (en) * | 2002-06-24 | 2003-12-31 | 3M Innovative Properties Company | Heat curable adhesive composition, article, semiconductor apparatus and method |
DE10250541B9 (de) * | 2002-10-29 | 2004-09-16 | Infineon Technologies Ag | Elektronisches Bauteil mit Unterfüllstoffen aus Thermoplasten und Verfahren zu dessen Herstellung |
JPWO2004075293A1 (ja) * | 2003-02-19 | 2006-06-01 | 日立化成工業株式会社 | 半導体用接着フィルム、これを用いた接着フィルム付金属板、接着フィルム付配線回路及び半導体装置並びに半導体装置の製造方法 |
WO2005071741A2 (de) * | 2004-01-27 | 2005-08-04 | Infineon Technologies Ag | Haftvermittelnde organische beschichtungen in halbleitergehäusen |
-
2005
- 2005-10-05 DE DE102005047856A patent/DE102005047856B4/de not_active Expired - Fee Related
-
2006
- 2006-09-30 CN CN2006100641222A patent/CN1996585B/zh not_active Expired - Fee Related
- 2006-10-05 US US11/543,315 patent/US7777352B2/en not_active Expired - Fee Related
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5536970A (en) * | 1992-09-29 | 1996-07-16 | Kabushiki Kaisha Toshiba | Resin-encapsulated semiconductor device |
CN1172345A (zh) * | 1996-07-30 | 1998-02-04 | Lg半导体株式会社 | 抗裂半导体封装,其制造方法以及所用制造设备 |
US6118183A (en) * | 1996-12-19 | 2000-09-12 | Texas Instruments Incorporated | Semiconductor device, manufacturing method thereof, and insulating substrate for same |
Also Published As
Publication number | Publication date |
---|---|
DE102005047856B4 (de) | 2007-09-06 |
CN1996585A (zh) | 2007-07-11 |
DE102005047856A1 (de) | 2007-04-19 |
US7777352B2 (en) | 2010-08-17 |
US20070200258A1 (en) | 2007-08-30 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN1996585B (zh) | 具有嵌入到塑料壳体中的半导体结构组件的半导体构件 | |
EP0588603B1 (en) | Hermetically sealed packaged electronic system and method of fabrication | |
CN100556233C (zh) | 制造电子模块的方法以及电子模块 | |
CN101315917B (zh) | 配线基板及其制造方法 | |
JP4359257B2 (ja) | Bgaパッケージおよびその製造方法 | |
KR100796884B1 (ko) | 적층형 반도체 장치의 제조 방법 및 적층형 전자 부품의제조 방법 | |
CN102956594A (zh) | 带有引线框连接的功率覆盖结构 | |
CN102856219B (zh) | 用于把金属表面附着到载体的方法以及包装模块 | |
WO1999057762A1 (en) | Flip chip assembly with via interconnection | |
KR100665151B1 (ko) | 회로 장치 | |
US11862600B2 (en) | Method of forming a chip package and chip package | |
US6800815B1 (en) | Materials and structure for a high reliability bga connection between LTCC and PB boards | |
US5510139A (en) | Process for assembly and bonding of electronic components on an insulating support | |
US10818805B2 (en) | Semiconductor sensor device and method for fabricating the same | |
US8250748B2 (en) | Method for producing an LTCC substrate | |
CN106465538A (zh) | 用于制造箔结构的方法及对应的箔结构 | |
KR100582145B1 (ko) | 반도체 장치의 제조 방법 | |
JP4193712B2 (ja) | ランドを備える基板の製造方法 | |
JP2009212160A (ja) | 配線基板およびその製造方法 | |
JP5693748B2 (ja) | 表面実装機により真空保持されるようにするための電気モジュール | |
US20030127495A1 (en) | Method of forming metallic z-interconnects for laminate chip packages and boards | |
JP2011526422A (ja) | 高温で使用するためのプレーナ型電力電子構成素子およびその製造方法 | |
JP2008028069A (ja) | 外部接合電極付き基板およびその製造方法 | |
US7939940B2 (en) | Multilayer chip scale package | |
JP2007227464A (ja) | 半導体装置及び半導体装置の製造方法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20120815 |
|
CF01 | Termination of patent right due to non-payment of annual fee |