CN1867225A - 多层组件及其制造方法 - Google Patents
多层组件及其制造方法 Download PDFInfo
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- CN1867225A CN1867225A CNA2006100809115A CN200610080911A CN1867225A CN 1867225 A CN1867225 A CN 1867225A CN A2006100809115 A CNA2006100809115 A CN A2006100809115A CN 200610080911 A CN200610080911 A CN 200610080911A CN 1867225 A CN1867225 A CN 1867225A
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Abstract
使用由在电路基板(1)的一个面一侧上覆盖电子部件(2a)的树脂层(39)、设置在该树脂层(39)和电路基板(1)的另一面一侧的任何一方上的连接端子(34a、34b)、和把组件(32)的两面连接起来的贯通孔(46)预先形成的部件内置组件;同时,使用由在组件(33)上形成在与连接端子(34a、34b)对应的位置上的连接端子(35a、35b)、和把该连接端子(35a、35b)与电子部件(2b)之间连接起来的贯通孔(47)预先形成的组件;在设置在导体层(34)和导体层(35)之间的绝缘层(36)上,设置分别把连接端子(34a、34b)和连接端子(35a、35b)之间连接起来导电性粘接剂(37)。借助于这样的结构,在组件(33)中,贯通孔(47)和电子部件(2b)的位置,就不会受贯通孔(46)的位置的限制。
Description
技术领域
本发明涉及把多个组件重叠起来的多层组件。
背景技术
以下,用附图对现有的多层组件进行说明。
图12是现有的多层组件的剖面图。在图12中,电路基板300是多层基板,在该电路基板300的上表面一侧300a上,形成有导体图形400,在该导体图形400上装配有半导体元件或芯片部件等的电子部件200a。此外,在电路基板300的下表面一侧300b上则形成有导体图形500。
在这样的电路基板300的上表面一侧300a上,以把电子部件200a的外周覆盖起来的方式形成有树脂层600。另外,在树脂层600的上表面600a上形成有导体图形700。此外,形成在树脂层600的上表面600a上的导体图形700a与形成在电路基板300的下表面一侧300b上的导体图形500a,通过贯通电路基板300和树脂层600的贯通孔800而连接起来。
在导体图形700上边,进而装配有半导体元件或芯片部件等的电子部件200b。此外,树脂层600的上表面600a一侧,以把电子部件200b覆盖起来的方式形成有树脂层900。另外,在树脂层900的上表面900a上设置有导体图形1000。此外,为了把树脂层900的上表面900a的导体图形1000a和树脂层600的上表面600a的导体图形700b连接起来,形成有贯通树脂层600、900这双方、同时在电路基板300的下表面一侧300b与导体图形500b进行连接的贯通孔1300。
在像这样地形成的多层组件1200中,进而在电路基板300的下表面一侧300b与树脂层900的上表面900a各自的外周附近上,形成导体图形500c、1000b。此外,这些导体图形500c、1000b由设置在多层组件1200的侧面上的贯通孔1300而连接起来。在这里,导体图形500c和贯通孔1300,被用做向母基板上装设多层组件1200的情况下的连接端子。
以下,用附图对像这样地构成的现有的多层组件的制造方法进行说明。
图13是现有的多层组件的制造流程图。
在图13中,首先,在部件装配步骤S21a中在把多个电路基板300连结起来的状态下,把半电子部件或芯片部件200a装设到电路基板300的上表面一侧300a上。树脂层形成步骤S22a,是以将在部件装配步骤S21a中所装设的半电子部件或芯片部件200a覆盖起来的方式向电路基板300的上表面一侧300a供给树脂、并通过加热而使树脂硬化的步骤。在像这样地在树脂层形成步骤S22a中形成树脂层600之后,在导体层形成步骤S23a中,借助于粘接剂等把铜箔粘贴到树脂层600的上表面600a上。
其次,在端子和图形形成步骤S24a中,借助于刻蚀等而使铜箔形成规定的形状的导体图形700、700a,同时,形成把导体图形700a、500a连接起来的贯通孔800,完成多层组件1200的第1层。
然后,第2层或以上的组装,与第1层同样,使从部件装配步骤S21a到端子和图形形成步骤S24b为止的步骤反复进行将树脂层重叠起来那么多次。在端子和图形形成步骤S24b中,在完成了作为多层组件1200的布线之后,在切断步骤S25中切断电路基板300与树脂层600、900。
另外,与本申请的发明有关联的在先技术,已经公开于例如特开2000-183283号公报、特开2003-31954号公报。
但是,在这样的现有的多层组件中,把导体图形1000a和导体图形700b连接起来的贯通孔1300,由于是在电路基板300上边依次堆叠了树脂层600、900之后形成的,因此形成为贯通树脂层600、900这双方。因此,在已经形成有贯通孔1300的位置上,就不能装设半电子部件或芯片部件200a。为此,要进行重叠的树脂层的层数越多则由贯通孔所产生的不能装设电子部件的区域就会变得越大。此外,贯通孔800由于已被设置为贯通树脂层600,故在该贯通孔800上边,就不能再装配半电子部件或芯片部件200a。
如上所述,在现有的多层组件中,由于通过为了把层间连接起来而形成的贯通孔800、1300会产生不能装设电子部件的区域,故存在着多层组件会大型化的课题。
发明的内容
本发明,解决了该问题,提供一种与树脂层的层数无关的小型的多层组件。
本发明的多层组件,是把具备第2电路基板和已经装设到第2电路基板的一个面一侧上的第2电子部件的第2组件,叠层并连接到具备第1电路基板和已经装设到第1电路基板的一个面一侧上的第1电子部件的第1组件的上边的组件。第1组件还具备:在第1电路基板的一个面一侧上以覆盖第1电子部件的方式形成的第1树脂层,在第1树脂层和第1电路基板的另一面一侧中的任何一方上形成的第1导体层,设置在第1导体层上的第1连接端子,设置在第1导体层的相反的面上的第2导体层,和把第2导体层与第1导体层连接起来的贯通孔。第2导体层还具备:与第1导体层相向配置的第3导体层,在第3导体层上在与第1连接端子相对应的位置上形成的第2连接端子,和把第2连接端子和第2电子部件之间连接起来的连接导体。
此外,本发明的多层组件,在第1导体层与第3导体层之间具有绝缘层,具有把第1连接端子和第2连接端子连接起来的连接构件。此外,在第1组件与第2组件的外周部上分别具有切断面,切断面被形成为排列在一条直线上。
通过采用这样的结构,在第2组件中把第2连接端子与电子部件之间连接起来的连接导体或电子部件的位置,就不会因第1组件上的贯通孔的位置而受到限制。因此,由于可以缩小由贯通孔所产生的电子部件的装设位置的限制区域、可以高密度地装配电子部件而与要进行重叠的组件的层数无关,故可以使多层组件小型化。
附图说明
图1是本发明的实施方式1的多层组件的剖面图。
图2是本发明的实施方式1的多层组件的制造流程图。
图3是在本发明的实施方式1的多层组件中使用的薄片组件制造流程图。
图4是在本发明的实施方式1的多层组件中使用的一体化步骤的薄片组件的剖面图。
图5是在本发明的实施方式1的多层组件中使用的切断步骤的薄片组件的剖面图。
图6是在本发明的实施方式1中把3个组件叠层起来的情况下的多层组件的剖面图。
图7是在本发明的实施方式1中作为连接构件使用膏状焊料的情况下的多层组件的剖面图。
图8是在本发明的实施方式1中以电路基板彼此件相向的方式把组件叠层起来的多层组件的剖面图。
图9是本发明的实施方式2的多层组件的剖面图。
图10是本发明的实施方式2的多层组件的制造流程图。
图11是在本发明的实施方式3的多层组件的母基板装配状态下的剖面图。
图12是现有的多层组件的剖面图。
图13是现有的多层组件的制造流程图。
标号说明
1:电路基板(第1电路基板)
2a:电子部件(第1电子部件)
2b:电子部件(第2电子部件)
2c:电子部件(第3电子部件)
5:导体图形(第2导体层)
32:第1组件
33:第2组件
34:导体图形(第1导体层)
35:导体图形(第3导体层)
45:导体图形(第4导体层)
34a:连接端子(第1连接端子)
35a:连接端子(第2连接端子)
36:绝缘层
37:导电性粘接剂(连接构件)
38:电路基板(第2电路基板)
39:树脂层(第1树脂层)
40:树脂层(第2树脂层)
46:贯通孔
47:贯通孔(连接导体)
具体实施方式
以下,用附图对本实施方式1进行说明。
图1是本发明的实施方式1的多层组件的剖面图。在图1中,在本实施方式1的多层组件31中,是把组件33(第2组件)重叠到了组件32(第1组件)的上边的构造。此外,以把绝缘层36夹在中间的方式配置在组件32的上表面上32a上形成的导体图形34(第1导体层)和在组件33的下表面33a上形成的导体图形35(第3导体层)。另外,绝缘层36使用硬化性树脂的环氧树脂。此外,绝缘层36,作为基材使用在其中心部上加入了玻璃纤维布的绝缘层,提高了多层组件31的弯曲强度。
在这里,在导体图形34、35中的每一个中,都设置有连接端子34a(第1连接端子)、34b、35a(第2连接端子)、35b。另外,在这些组件32和33中,把对应的连接端子34a和35a、34b和35b设置在相向的位置上,这些连接端子34a、34b、35a、35b彼此间,分别由导电性粘接剂37(连接构件)连接起来。另外。在本实施方式1中,虽然作为连接构件使用的是导电性树脂,但是,连接构件也可以是热硬化性的导电性膏等。
其次,对组件32、33的结构进行说明。组件32、33的电路基板1(第1电路基板)、电路基板38(第2电路基板)是多层基板,这些多层基板1、38的上表面侧1a、38a一侧与下表面侧1b、38b或内层导体(图未示)等之间,分别用贯通孔(图未示)或导电性粘接剂(图未示)等连接起来。
此外,这些组件32、33,在各自的电路基板1、38上都装设有半导体元件或芯片部件等电子部件2a(第1电子部件)、电子部件2b(第2电子部件)。此外,在这些电路基板1、38的电子部件2a、2b装配面一侧上,都以把这些电子部件2a、2b覆盖起来的方式装设有树脂层39(第1树脂层)、树脂层40(第2树脂层)。另外,这些树脂层39、40中的每一个,都是由覆盖电子部件2a、2b的树脂埋设部41、42,和覆盖该树脂埋设部41、42的基材添加树脂部43、44形成的。另外,树脂埋设部41、42是环氧树脂,基材添加树脂部43、44为把环氧树脂和作为基材的玻璃纤维布交替地叠层起来的结构。如上所述,树脂层39、40由覆盖电子部件的树脂埋设部41、42及基材添加树脂部43、44构成。
此外,树脂层1、38,使用由玻璃纤维布基材和环氧树脂构成的基板。借助于此,结果就变成为组件32、33的上下都可以由基材添加层构成,故可以加大组件32、33的弯曲强度。此外,作为基材的玻璃纤维布等那样的基材,由于线膨胀系数小,故可以实现挠曲小的多层组件。
在这些基材添加树脂部43、44表面上,分别布线有导体图形34、35。另一方面,在电路基板1、38的树脂层39、40形成一侧的相反的一侧上,分别布线有导体图形5(第2导体层)、导体图形45(第4导体层)。然后,用贯通孔46把这些导体图形34和导体图形5连接起来,用贯通孔47(连接导体)把导体图形35与导体图形45连接起来。
另外,贯通孔46、47,优选为都预先形成于基材添加树脂部43、44上。这是因为玻璃纤维布的线膨胀系数与环氧树脂比起来小的缘故。即,若在已添加进玻璃纤维布基材的基材添加树脂部43、44上设置贯通孔46、47,则贯通孔46、47对热变动的伸缩率就要减小,就难于在贯通孔46、47上产生因热变动而产生的裂纹等。因此,就可以实现可靠性良好的多层组件。
进而,采用把电子部件2c(第3电子部件)装配到导体图形45上,并以把这些电子部件覆盖起来的方式装设金属制的外壳48的办法,完成多层组件31。
如上所述,组件33也内置电子部件2b。此外,对于该组件33,还可以装设电子部件2c。因此,在本实施方式1中就变成为3层构造,可以实现小型的多层组件31。
通过采用这样的结构,就可以把贯通孔46形成为使得仅仅贯通组件32。然后,以使之相向的方式配置导体图形34和导体图形35,在这些导体图形34、35之间形成绝缘层36。
此外,在组件33中,贯通孔47把导体图形35和电子部件2b连接起来。借助于此,在组件33中,贯通孔47的位置,就不会因组件32中的贯通孔46的位置而受到限制。因此,就可以减小因贯通孔46引起的电子部件2b的装设位置的限制区域而与要进行重叠的组件的层数无关。因此,由于可以高密度地装配电子部件2b,故可使多层组件31小型化。
另外,导电性粘接剂37和绝缘层36,由于都是热硬化性的,故不会因在向母基板等上焊接装配组件31的情况下的热等而熔融,不会出现组件32和组件33被剥离那样的情况。因此,组件32、33的各个电路间的连接可靠性变高。
此外,贯通孔46是在组件32的侧面上以半圆状的形状形成的,故可以效率良好地把电子部件2a配置装配到电路基板1的中央部上。此外,由于可以把贯通孔46用做用来装设多层组件31的端子,故可以有效地利用空间而使多层组件31小型化。
其次,用附图对多层组件31的制造方法进行说明。
图2是本发明的实施方式1的多层组件31的制造流程图。图3是在本发明的实施方式1的多层组件中使用的薄片组件81(示于图4)的制造流程图。图4是在本发明的实施方式1的多层组件中使用的一体化步骤的薄片组件81的剖面图。
图3的薄片组件制造步骤S61,是制造把多个组件32或组件33连结起来的薄片组件81(示于图4)的步骤。
以薄片组件制造步骤S61a为代表对该薄片组件制造步骤S61的细节进行说明。在图2、图3、图4中,在薄片组件制造步骤S61a中,进行把电子部件2a装配到已把多个电路基板1连结起来的薄片基板62上的部件装配步骤S64。在这里,电子部件2a使用高熔点的膏状焊料等,进行软化回流焊接。此外,集成电路元件等则可对电路基板1面朝下进行倒装装配。另外,在薄片基板62的下表面62a上预先形成有导体图形5。
其次,在部件装配步骤S64之后进行叠层步骤S65,首先把4块在孔加工步骤S66中已预先形成了与电子部件2a相对应的孔部82的预浸渍坯件67(用作树脂薄片的一个例子)叠层到薄片基板62的电子部件2a装设面一侧上。然后,在预浸渍坯件67的上边,把已预先形成了导体图形35的电路基板68(已硬化完毕)以使得导体图形35朝向外侧的方式叠层。如上所述,在这里把4块预浸渍坯件67叠层起来的厚度,设置得比电子部件2a的高度还大。此外,为了使预浸渍坯件67的叠层变得容易进行,孔部82设置得比电子部件2a的外周更大。这样一来,就可以在电子部件2a的上方和侧方形成间隙83。
在叠层步骤S65之后,设置树脂强制流入步骤S69。在该树脂强制流入步骤S69中,在将预浸渍坯件67和电路基板68叠层到了薄片基板62的上边的状态下,用压板84把该叠层部分的上下夹住。然后,在图4中,在向A方向进行压缩,同时进行加热。
在这里,浸渗于预浸渍坯件67内的树脂,是热硬化性树脂的环氧树脂。此外,本实施方式1的环氧树脂,从常温到约90℃(第1温度范围)是板状体。但是,伴随着温度上升黏度变小变成为可流动。本实施方式1的由压板84施加的压力约为40kg/cm2,在该压力下环氧树脂在从约90℃到约150℃的温度(第2温度范围)下变成为可流动。然后,当超过了150℃以上的温度(第3温度范围)后就要硬化。另外,这些环氧树脂的黏度,也将随着环氧树脂的升温条件等的变化而变化。此外,流动开始的温度也随着压板84的压力的值的变动而变动。因此,在树脂强制流入步骤S69中使用的环氧树脂的特性等,并不限于上述条件,只要设为与使用的设备或使用的树脂相对应地使用的条件即可。
如上所述,在树脂强制流入步骤S69中,通过以40kg/cm2的压力压缩预浸渍坯件67的办法,强制性地使温度在90℃或以上而且在150℃或以下变成为可流动的环氧树脂向间隙83内流入。然后,在该流入完全结束之后通过冷却,形成树脂流动埋设部41,完成内置有电子部件的树脂层39。借助于此,即便是电子部件2a与电路基板1之间的狭窄的间隙等,也可以可靠地填充树脂。因此,就没有必要预先在电子部件2a与电路基板1之间放入中间材料(底充)等。
另外,在冷却时在树脂层39(参看图1)上会产生热收缩。于是,可以通过把树脂层39夹在硬化完毕的电路基板68与电路基板1之间的办法,减小由树脂层39的收缩引起的挠曲。于是,优选把电路基板68与电路基板1的厚度设为同一厚度。
在贯通孔加工步骤S70中,在该树脂强制流入步骤S69之后,加工用来把导体图形34和导体图形5之间连接起来的贯通孔46。
通过以上那样的步骤,完成薄片组件81。另外,在这里,虽然是对把多个组件32连结起来的薄片组件81的制造步骤进行了说明,但是,对于把多个组件33连结起来的薄片组件,也可以经过与薄片组件81相同的步骤而形成。借助于这样的步骤,组件32、33就可以作为部件内置组件而完成。
其次,在图2中,连接构件供给步骤S71,是向在薄片组件制造步骤S61a中所制作的薄片组件81的连接端子34a、34b上边供给导电性粘接剂37的步骤。在这里,对于未硬化预浸渍坯件,准备在与连接端子34a、34b、35a、35b对应的位置上预先进行孔加工、并把导体膏埋入到该孔部内的预浸渍坯件。然后,通过把该未硬化预浸渍坯件叠层到组件32的上表面32a上边的办法,向连接端子34a、34b上边供给导电性粘接剂37,同时,也供给用来形成绝缘层36的树脂。另外,该未硬化预浸渍坯件使用的是已把环氧树脂浸渗于玻璃基材内的预浸渍坯件。
其次,叠层步骤S72,在连接构件供给步骤S71之后,把薄片状态的组件33叠层到未硬化预浸渍坯件的上边。另外,这时组件33被叠层为使得组件32与组件33的树脂层39和树脂层40相向。
在一体化步骤S73中,通过在叠层步骤S72之后进行加热的办法,使未硬化预浸渍坯件硬化,在组件32与组件33之间形成绝缘层36,同时,使薄片状态的组件32与薄片状态的组件33一体化。此外,同时也使导电性粘接剂37硬化,由此分别把连接端子34a、34b和连接端子35a、35b连接起来。
在这里,由于在薄片组件制造步骤S61的冷却时树脂层39会进行收缩,故在树脂层39形成一侧就易于产生挠曲。于是,在本实施方式1中,为了对该挠曲进行矫正,以使得树脂层39与树脂层40相向的方式叠层组件33。即,以使得组件32与组件33的挠曲变成为相反的方向的方式进行叠层。借助于此,由于组件32与组件33的挠曲变成为相反的方向,结果就变成为在一体化之后彼此的挠曲互相抵消,故可以减小薄片组件的挠曲。
此外,除此之外,优选把组件32、33的树脂层39、40的厚度设为相等。这是因为组件32、33的挠曲量与树脂层的厚度成比例地增加的缘故,如上所述,若将树脂层39与树脂层40的厚度设为相等,则就可以使组件32与组件33的挠曲量变成为相等。借助于此,由于一体化后的组件的挠曲减小,故在该薄片组件的状态下就可以进一步装配电子部件等。因此,可以在保持薄片的状态下进行电子部件的装配,可以实现生产性优异的多层组件。
另外,在一体化步骤S73中,与树脂强制流入步骤S69同样,在加热的同时供给压力。借助于此,就可以进一步矫正由冷却时的树脂层的热收缩而产生的薄片状组件的挠曲。此外,借助于该加压,组件32与组件33之间,由于可以无间隙地用环氧树脂进行填充,故组件32与组件33之间的接合强度增强。
此外,在一体化步骤S73中使用的设备,由于可以使用在树脂强制流入步骤S69中使用的设备,故不需要一体化步骤S73专用的设备。因此,还具有可以减少设备投资、实现低价格的多层组件的效果。
此外,未硬化预浸渍坯件,使用在中心上具有约80微米的玻璃纤维布的预浸渍坯件。借助于此,在一体化步骤S73中,即便是加上了压力,绝缘层36也不会变成为小于玻璃纤维布的厚度。因此,就可以可靠地形成绝缘层36。
图5是在本发明的实施方式1的多层组件中使用的切断步骤的薄片组件的剖面图。在图5中,薄片状态的组件32和薄片状态的组件33成为一体的叠层薄片组件91,借助于上边所说的一连串的制造步骤完成。
其次,在部件装配步骤S74中,在叠层薄片组件91的导体图形45(示于图1)上边,装设有电子部件2c。另外,用于装配该电子部件2c的焊料,使用与部件装配步骤S64的高熔点焊料相比熔点低的焊料。这是因为要防止:因为由部件装配步骤S74的软化回流热所产生的组件32、33内的焊料的再熔融,而在树脂层39、40内发生电路短路等。
其次,外壳装设步骤S75,在部件装配步骤S74之后,把外壳48(示于图1)装设、焊接到叠层薄片组件91的装设电子部件2c一侧上。
其次,在切断步骤S76中,借助于预先设置在连结部92的每一个间隔内的切断刀齿93切断图5所示的叠层薄片组件91的连结部92。借助于此,将组件32、33和绝缘层36一起切断。另外组件32与组件33的切断面变成为在一条直线上。如上所述,由于可以一起切断组件32、33和绝缘层36,故生产性良好,同时,外形尺寸也稳定。
在这里,切断步骤S76,由于在已装设有外壳48的状态下进行连结部的切断,故为使得切断刀齿93不会伤及外壳48,必须设置得在外壳48的外形与切断刀齿93之间具有间隙94。因此,外壳48的外形必须设置得小于切断面(示于图1)的宽度。
另外,导电性粘接剂37(示于图1),优选设置为使之在该切断步骤S76中不会被切断。即,以在组件32、33的外周端面之间形成绝缘层36的方式,连接端子34a、35a、34b、35b形成在相对于切断面49成为内侧那样的位置上。通过采用这样的结构,可以减少导电性粘接剂37因由切断所产生的应力而剥落的情况。
如上所述,在本实施方式1的多层组件31的制造方法中,在薄片组件制造步骤S61中预先制作多个薄片组件。然后,在连接构件供给步骤S71之后,以使得组件32与组件32之间存在绝缘层的方式进行叠层,在该进行了叠层的状态下使组件32与组件33一体化。借助于此,在组件33中,贯通孔47的位置就不会因组件32的贯通孔46的位置而受到限制。因此,可以减小由贯通孔46产生的电子部件2b的装设位置的限制区域而与要进行重叠的组件的层数无关。因此,由于可以高密度地装配电子部件2b,故可使多层组件31小型化。
此外,借助于绝缘层而使预先在薄片组件制造步骤S61中制造的多个的薄片状态的组件一体化,然后再分割成单片。形成树脂层39、40的步骤,在各个组件中只进行一次,可以一起使这些单独地制作的组件32、33一体化。借助于此,在使组件多层化的情况下,因树脂层39、40的热收缩所产生的挠曲就不会积累。因此,像现有技术的多层组件那样与叠层次数的增加对应的挠曲的增加就会减小。
进而,在本实施方式1中,绝缘层36由1块预浸渍坯件形成,绝缘层36的厚度比组件32、33的厚度更薄。因此,在一体化步骤S73中,就可以减小因未硬化预浸渍坯件硬化时的热收缩而产生的多层组件31的挠曲。而且,如后所述,即便是相对于例如形成把3块或以上的组件叠层起来的多层组件的情况,也具有同样的效果。
另外,本实施方式1的多层组件31,把2个组件重叠了起来,但是该多层组件也可以把3个或以上的组件叠层起来。
图6是把3个组件叠层起来的情况下的多层组件100的剖面图。在图6中,多层组件100在组件33a的导体图形45上也形成连接端子45a、45b。该连接端子45a、45b,借助于导电性粘接剂37而连接到在组件101的下表面上形成的连接端子102a、102b上。此外,在在组件101的下表面的导体图形102与导体图形45之间形成了绝缘层103的状态下,将组件32、33a、101一体化。
另外,组件101也与组件32、33a同样,借助于薄片组件制造步骤S61,作为内置有电子部件2c的薄片状的部件内置组件而完成。
此外,在该多层组件100的制造方法中,与多层组件31的制造方法不同的是,在图2所示的连接构件供给步骤S71中,在组件33a的上表面上也叠层未硬化预浸渍坯件。另外,在该未硬化预浸渍坯件上,在与连接端子45a、45b、102a、102b相对应的位置上设置有孔部,在该孔部内填埋有导电性粘接剂37。
然后,在叠层步骤S72中,把这3个组件32、33a、101叠层起来,在一体化步骤S73中一起进行加热·压接。
如上所述,即便是在把3层或以上的组件重叠起来的多层组件中,在各个组件中用于形成树脂层的步骤每个组件也各进行一次。此外,这些单独地制作的组件可以通过一次加热·压接步骤同时一体化。因此,即便是在3层或以上多层组件中,也可以不使树脂层的热收缩的挠曲累积地减小挠曲,
特别是在要把偶数个数的部件内置组件叠层起来形成多层组件的情况下,优选将这些部件内置组件的树脂层朝向上方(以下叫做正方向)进行叠的组件、和朝向下方(以下叫做反方向)进行叠层的组件的个数设为相等。这是因为:由于在正方向上进行叠层的组件和在反方向上进行叠层的组件的挠曲方向相反,故一体化后就可以实现挠曲小的多层组件。
此外,在正方向上叠层起来的组件的树脂层的总厚度与在反方向上叠层起来的组件的树脂层的总厚度,优选设为大体上相等。这是为了要减小一体化后的多层组件100的挠曲的缘故。此外,特别是在树脂层39、40中,优选把成为挠曲的主要原因的树脂流动埋设部41、42的厚度设为相等。于是,例如在图6的多层组件100中,将正方向的组件32、101的树脂流动埋设部41与树脂流动埋设部105之间的合计厚度,与组件33的树脂流动埋设部42的厚度设为相等。
进而,在图6所示的多层组件中,在最上层的组件101的上表面上形成有地线图形(グランドパタン)104。此外,在对于例如高频组件使用这样的多层组件100的情况下,由于在最上层上设置有地线图形104,故可以屏蔽高频信号。借助于此,由于可以去掉外壳48自身,也不再需要外壳装设步骤S75,故可以实现低价格的高频组件。
在本实施方式1中,在图2所示的连接构件供给步骤S71中作为连接构件向组件32上供给导电性树脂,但是也可以供给膏状焊料。
图7是作为连接构件使用膏状焊料的情况下的多层组件110的剖面图。在图7中,组件32的连接端子34a、34b和内置有部件的组件33b的连接端子35a、35b,分别通过膏状焊料111进行连接。如上所述,即便是在使用膏状焊料111的情况下,组件33的贯通孔47的位置,也不会因组件32的贯通孔46的位置而受到限制。因此,就可以减小因贯通孔46引起的电子部件2b的装设位置的限制区域而与要进行重叠的组件的层数无关。因此,由于可以高密度地装配电子部件2b,故可使多层组件110小型化。
另外,在使用膏状焊料111连接组件32和组件33b的情况下,优选把组件33b的电路基板38和组件32的树脂层39配置为相向。如果像这样地进行叠层,由于组件32与组件33b的挠曲方向变成为同一方向,故在一体化步骤S73中就不需要用压板等夹住而进行压缩。因此,在图2所示的多层组件110的一体化步骤S73中,就可以使用一般的软化回流炉容易地进行一体化。
此外,连接构件的向连接端子34a、34b上的供给,可以使用丝网漏印等。因此,孔加工、或向孔部内填埋导电性粘接剂37等的步骤就不再需要,可以实现生产性良好的多层组件。进而,在组件32与组件33相向的一侧的表面上,如果分别形成阻焊剂112(用做绝缘层的一个例子),则可以通过容易的结构进行绝缘。
图8是以使得多个电路基板彼此相向的方式把组件叠层起来的多层组件的剖面图。在图1中,把组件32、33的树脂层39和树脂层40叠层为使得它们相向,但是,如图8所示,也可以把电路基板1和电路基板38叠层为以中间存在着绝缘层36的方式相向。在这样的情况下,由于也以使得组件32与组件33的挠曲变成为反方向的方式进行叠层,故也可以通过进行一体化而使彼此的挠曲相抵消,实现挠曲小的多层组件。
(实施方式2)
以下用附图对实施方式2进行说明。
图9是实施方式2的多层组件的剖面图。在图9中,组件32b是内置有解调电路的部件内置组件,组件33d是内置有包括振荡电路的接收电路的部件内置组件。此外,通过把组件33d叠层到组件32b上,形成高频组件130。构成振荡电路的电感器121,由电路基板38的内层图形形成,通过该电感器121与电子部件2b构成振荡电路和接收电路等。另外,电子部件2a、2b分别在装配于电路基板1、38上的状态下内置于树脂层39、40内。
图10是本发明的实施方式2的多层组件(高频组件)的制造流程图。在图10中,在薄片组件制造步骤S61与连接构件供给步骤S71之间,存在着微调整步骤S131。在该微调整步骤S131中,借助于激光光束等从背面一侧(导体图形35面一侧)进行微调整。然后调整电感器121的电感值。使得振荡电路的振荡频率变成为规定的值。
在叠层步骤S72中,以使得电路基板38这一侧变成为绝缘层36这一侧的方式对组件33d进行叠层。这样一来,在一体化步骤S73中浸渗于未硬化预浸渍坯件内的环氧树脂就会熔融而流入到激光微调整孔部122内,激光微调整孔部122被环氧树脂所填埋起来。因此,由于激光微调整孔部122被环氧树脂所密封,故相对于湿度等,振荡电路的振荡频率变得在很长时间内很难发生变化。
此外,在本实施方式2中,组件33d的上侧的导体图形45被设为地线。借助于此,由于没有必要另外使用外壳等,故可以实现低价格的多层组件。
(实施方式3)
以下,用附图对实施方式3进行说明。
图11是本实施方式3的多层组件的母基板装配状态下的剖面图。在图11中,作为把组件32c和组件33c之间连接起来的连接构件,使用的是膏状焊料111。此外,多层组件141与母基板的导体图形143之间的连接也通过膏状焊料144进行。在这里,优选使用膏状焊料111的熔点比膏状焊料144的熔点更高的膏状焊料。借助于此,即便由向母基板142上软化回流焊接多层组件141时的热,膏状焊料111也不会熔融。因此,由于在母基板142的软化回流步骤中在膏状焊料111中难于产生断线等,故可以实现可靠性高的多层组件。
此外,通过设为这样的结构,故可以使得组件32c与组件33c的挠曲变成为相反的方向的方式进行叠层。在母基板142的软化回流步骤中,当膏状焊料111熔融时,组件32c、33c要返回原来的挠曲方向。但是,由于膏状焊料111不熔融,故在连接部上就不会产生断线。此外,还可以减小多层组件141的挠曲。
工业上应用前景
本发明的多层组件,具有可以使复合有多种功能的组件小型化的效果,作为可装载于便携用设备的组件而有用。
Claims (38)
1.一种多层组件,该多层组件把具备第2电路基板和装设在上述第2电路基板的一个面一侧上的第2电子部件的第2组件,叠层并连接到具备第1电路基板和装设在上述第1电路基板的一个面一侧上的第1电子部件的第1组件的上边,其中:
上述第1组件还具备:
在上述第1电路基板的一个面一侧上以覆盖上述第1电子部件的方式形成的第1树脂层;
在上述第1树脂层和上述第1电路基板的另一面一侧中的任何一方上形成的第1导体层;
设置在上述第1导体层上的第1连接端子;
设置在与上述第1导体层相反的面上的第2导体层;和
把上述第2导体层与上述第1导体层连接起来的贯通孔;
上述第2组件还具备:
与上述第1导体层相向配置的第3导体层;
在上述第3导体层上在与上述第1连接端子相对应的位置上形成的第2连接端子;和
把上述第2连接端子与上述第2电子部件之间连接起来的连接导体;
在上述第1导体层与上述第3导体层之间具有绝缘层;
具有把上述第1连接端子与上述第2连接端子连接起来的连接构件。
2.根据权利要求1所述的多层组件,其中:
在上述第1组件与上述第2组件的外周部上分别具有切断面;
上述切断面被形成为排列在一条直线上。
3.根据权利要求1所述的多层组件,其中:
上述连接构件是热硬化性的导电性粘接剂。
4.根据权利要求1所述的多层组件,其中:
上述绝缘层是热硬化性树脂。
5.根据权利要求4所述的多层组件,其中:
上述第2组件,还具备:
振荡电路和构成上述振荡电路的电感器;
在上述第3导体层一侧上设置有进行上述电感器的微调整的调整孔部。
6.根据权利要求1所述的多层组件,其中:
上述第1树脂层,由覆盖电子部件的树脂埋设部和被形成为覆盖上述树脂埋设部的基材添加树脂部构成。
7.根据权利要求6所述的多层组件,其中:
上述第1树脂层的外周部由上述基材添加树脂部构成;
在上述基材添加树脂部上形成有上述贯通孔。
8.根据权利要求1所述的多层组件,其中:
上述贯通孔是半圆状,而且形成在上述第1组件的侧面上。
9.根据权利要求1所述的多层组件,其中:
在上述第1组件与上述第2组件的外周部之间,是上述绝缘层。
10.根据权利要求1所述的多层组件,其中:
上述绝缘层是阻焊剂;
上述连接构件是膏状焊料。
11.根据权利要求10所述的多层组件,其中:
以使得上述第1组件和上述第2组件的挠曲方向变成为同一方向的方式进行叠层。
12.根据权利要求10所述的多层组件,其中:
上述第1组件与上述第2组件,挠曲量彼此相同。
13.根据权利要求10所述的多层组件,其中:
上述膏状焊料的熔点,比权利要求10所述的用于把多层组件连接到母基板上所使用的焊料的熔点高。
14.根据权利要求10所述的多层组件,其中:
上述第1组件与上述第2组件的挠曲方向彼此相反。
15.根据权利要求1所述的多层组件,其中:
上述第2组件,在上述第2电路基板的一个面一侧还具有以把电子部件覆盖起来的方式形成的第2树脂层;
上述第3导体层,形成在上述第2树脂层与上述第2电路基板的另一面一侧中的任何一方上。
16.根据权利要求15所述的多层组件,其中:
上述第2组件在上述第1导体层的相反的面一侧还具有第4导体层;
在上述第4导体层上装设有上述第2电子部件。
17.根据权利要求15所述的多层组件,其中:
上述第4导体层是地线。
18.根据权利要求15所述的多层组件,其中:
上述第1组件与上述第2组件,被配置为使得上述第1树脂层与上述第2树脂层彼此相向。
19.根据权利要求15所述的多层组件,其中:
上述第1组件与上述第2组件,被配置为使得上述第1电路基板与上述第2电路基板彼此相向。
20.根据权利要求18所述的多层组件,其中:
上述第1树脂层与上述第2树脂层的厚度相等。
21.根据权利要求15所述的多层组件,其中:
上述第2树脂层用热硬化性树脂进行填充。
22.根据权利要求15所述的多层组件,其中:
以使得上述第1组件与第2组件的挠曲方向变成为彼此相反的方式进行叠层。
23.根据权利要求15所述的多层组件,其中:
上述绝缘层用热硬化性树脂进行填充。
24.根据权利要求15所述的多层组件,其中:
上述绝缘层用基材添加树脂进行填充。
25.一种多层组件,该多层组件具备多个组件,这些组件具有:
电路基板;
装设在上述电路基板的一方上的电子部件;
设置在上述电路基板的一个面上并覆盖上述电子部件的树脂层;
设置在上述树脂层与上述电路基板中的至少任何一方上的导体层;和
设置在上述导体层上的连接端子;
并以使得上述多个组件的连接端子彼此间相向配置的方式而将上述多个组件叠层起来;其中:
上述多个的组件,还具备:
设置在上述导体层彼此间的绝缘层;和
把上述连接端子彼此间连接起来的连接构件。
26.据权利要求25所述的多层组件,其中:
上述多个的组件,具有:
以在上述电路基板的上侧配置有上述树脂层的方式进行叠层的正方向组件;和
以相对于上述正方向组件、上述树脂层变成为相反方向的方式进行叠层的反方向组件。
27.据权利要求26所述的多层组件,其中:
上述正方向组件和上述反方向组件,分别以相同个数进行叠层。
28.据权利要求26所述的多层组件,其中:
上述正方向组件的上述树脂层的厚度与上述反方向组件的上述树脂层的厚度相等。
29.根据权利要求2所述的多层组件的制造方法,其中,具有:
相对于把多个上述第1组件连结起来的第1薄片组件,向上述第1连接端子上供给上述连接构件的供给步骤;
以使得把多个上述第2组件连结起来的第2薄片组件的上述第2连接端子与上述连接构件相对应的方式进行叠层的叠层步骤;
采用加热压接的办法而使上述第1组件、上述连接构件与上述第2组件的叠层体一体化的一体化步骤;和
将上述第1组件与上述第2组件之间的连结部切断的切断步骤。
30.根据权利要求29所述的多层组件的制造方法,其中:
上述供给步骤,具有:
把上述第1薄片组件内的多个电路基板连结起来的连结步骤;
在上述电路基板的一个面上装设电子部件的装设步骤;
在上述电路基板的电子部件装设面一侧上以覆盖上述电子部件的方式形成第1树脂层的树脂层形成步骤;
在上述第1树脂层的上边形成上述第2连接端子的端子形成步骤;和
用贯通孔把上述第1导体层与上述第2导体层之间连接起来的连接步骤。
31.根据权利要求30所述的多层组件的制造方法,其中:
上述供给步骤,还具有:
在与上述电路基板的电子部件装设面一侧的上述电子部件相对应的位置上形成孔部的孔部形成步骤;和
对热硬化性树脂制的树脂薄片进行叠层的叠层步骤。
32.根据权利要求31所述的多层组件的制造方法,其中:
上述树脂叠层步骤,具有:
把在第1温度范围中为板状体、在比上述第1温度范围更高的第2温度范围中具有热流动性、在比上述第2温度范围更高的第3温度范围中硬化的热硬化性的树脂用做上述树脂薄片,并使上述树脂薄片的温度上升到上述第2温度范围以使上述脂薄片熔化的树脂溶化步骤;
在上述树脂薄片的温度变成为上述第3温度范围之前,压缩上述树脂薄片使上述树脂薄片向上述孔部内强制流入从而埋设上述孔部的孔部埋设步骤;和
使温度向上述第3温度范围上升的温度上升步骤。
33.根据权利要求31所述的多层组件的制造方法,其中:
上述叠层步骤,具有:在包括上述电路基板与上述树脂薄片的叠层体的上边,以使得上述第2连接端子的形成面变成为上侧的方式而对已形成有上述第2连接端子的硬化完毕的基板进行叠层的步骤。
34.根据权利要求30所述的多层组件的制造方法,其中:
还具有以把已经装设到上述第2组件的另一个面上的第3电子部件覆盖起来的方式对外壳进行装设的外壳装设步骤。
35.根据权利要求30所述的多层组件的制造方法,其中还具有:
当在上述第1组件或上述第2组件内含有振荡器的情况下,对构成上述振荡器的振荡用电感器进行微调整以调整上述振荡器的振荡频率的步骤。
36.根据权利要求30所述的多层组件的制造方法,其中:
上述叠层步骤,具有:把形成在将上述连接构件设置在与上述第2连接端子相对应的位置上的孔部上的热硬化性的导电性树脂制的预浸渍坯件,叠层到上述第1组件上边的步骤。
37.根据权利要求29所述的多层组件的制造方法,其中具有:
当在上述第1组件的下方配置有部件内置组件的情况下,同时进行上述部件内置组件与上述第1组件之间的连接和上述第1组件与上述第2组件之间的连接的步骤。
38.根据权利要求37所述的多层组件的制造方法,其中:
上述供给步骤,具有向上述部件内置组件的上表面上供给上述连接构件的步骤;
上述叠层步骤,具有:以把上述连接构件夹入到上述部件内置组件间的方式进行叠层以形成上述部件内置组件的叠层体的步骤;
上述一体化步骤,具有对上述叠层体和上述部件内置组件一起进行加热压接的步骤。
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CN105161485A (zh) * | 2015-07-28 | 2015-12-16 | 昆明物理研究所 | 一体化封装管壳和半导体恒温器及其制备方法 |
CN106208623A (zh) * | 2015-05-29 | 2016-12-07 | 台达电子国际(新加坡)私人有限公司 | 电源模块 |
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- 2006-05-18 US US11/435,716 patent/US7532485B2/en not_active Expired - Fee Related
- 2006-05-22 CN CN2006100809115A patent/CN1867225B/zh not_active Expired - Fee Related
Cited By (6)
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CN106208623A (zh) * | 2015-05-29 | 2016-12-07 | 台达电子国际(新加坡)私人有限公司 | 电源模块 |
CN106208623B (zh) * | 2015-05-29 | 2019-03-05 | 台达电子国际(新加坡)私人有限公司 | 电源模块 |
CN105161485A (zh) * | 2015-07-28 | 2015-12-16 | 昆明物理研究所 | 一体化封装管壳和半导体恒温器及其制备方法 |
CN105161485B (zh) * | 2015-07-28 | 2017-12-26 | 昆明物理研究所 | 一体化封装管壳和半导体恒温器及其制备方法 |
CN113727519A (zh) * | 2021-08-09 | 2021-11-30 | 维沃移动通信有限公司 | 电路板组件和电子设备 |
CN113727519B (zh) * | 2021-08-09 | 2023-02-03 | 维沃移动通信有限公司 | 电路板组件和电子设备 |
Also Published As
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US7532485B2 (en) | 2009-05-12 |
CN1867225B (zh) | 2010-05-12 |
EP1724832A3 (en) | 2010-09-01 |
US20060261472A1 (en) | 2006-11-23 |
EP1724832A2 (en) | 2006-11-22 |
JP2006324568A (ja) | 2006-11-30 |
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