CN1691292B - 用于制造半导体器件的方法和电子器件 - Google Patents

用于制造半导体器件的方法和电子器件 Download PDF

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Publication number
CN1691292B
CN1691292B CN2005100684632A CN200510068463A CN1691292B CN 1691292 B CN1691292 B CN 1691292B CN 2005100684632 A CN2005100684632 A CN 2005100684632A CN 200510068463 A CN200510068463 A CN 200510068463A CN 1691292 B CN1691292 B CN 1691292B
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China
Prior art keywords
conductive layer
reaction product
mask
layer
forming
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Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
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CN2005100684632A
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English (en)
Chinese (zh)
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CN1691292A (zh
Inventor
冈本悟
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Semiconductor Energy Laboratory Co Ltd
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Semiconductor Energy Laboratory Co Ltd
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Publication of CN1691292A publication Critical patent/CN1691292A/zh
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/01—Manufacture or treatment
    • H10D86/021—Manufacture or treatment of multiple TFTs
    • H10D86/0231—Manufacture or treatment of multiple TFTs using masks, e.g. half-tone masks
    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
    • C25D5/02—Electroplating of selected surface areas
    • C25D5/022—Electroplating of selected surface areas using masking means
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02041—Cleaning
    • H01L21/02057—Cleaning during device manufacture
    • H01L21/02068—Cleaning during device manufacture during, before or after processing of conductive layers, e.g. polysilicon or amorphous silicon layers
    • H01L21/02071—Cleaning during device manufacture during, before or after processing of conductive layers, e.g. polysilicon or amorphous silicon layers the processing being a delineation, e.g. RIE, of conductive layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32133—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
    • H01L21/32135—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only
    • H01L21/32136—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only using plasmas
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/031—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT]
    • H10D30/0312—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] characterised by the gate electrodes
    • H10D30/0314—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] characterised by the gate electrodes of lateral top-gate TFTs comprising only a single gate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/031—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT]
    • H10D30/0321—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] comprising silicon, e.g. amorphous silicon or polysilicon
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6704—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device
    • H10D30/6713—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes
    • H10D30/6715—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes characterised by the doping profiles, e.g. having lightly-doped source or drain extensions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/60—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices

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  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Physics & Mathematics (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • General Physics & Mathematics (AREA)
  • Electrochemistry (AREA)
  • General Chemical & Material Sciences (AREA)
  • Plasma & Fusion (AREA)
  • Materials Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Drying Of Semiconductors (AREA)
  • Thin Film Transistor (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Cleaning Or Drying Semiconductors (AREA)
CN2005100684632A 2004-04-28 2005-04-28 用于制造半导体器件的方法和电子器件 Expired - Fee Related CN1691292B (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP132677/04 2004-04-28
JP2004132677A JP4519512B2 (ja) 2004-04-28 2004-04-28 半導体装置の作製方法、除去方法

Publications (2)

Publication Number Publication Date
CN1691292A CN1691292A (zh) 2005-11-02
CN1691292B true CN1691292B (zh) 2011-01-12

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US (1) US7432211B2 (enExample)
JP (1) JP4519512B2 (enExample)
CN (1) CN1691292B (enExample)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5352081B2 (ja) 2006-12-20 2013-11-27 株式会社半導体エネルギー研究所 半導体装置の作製方法
JP2009033727A (ja) * 2007-06-22 2009-02-12 Semiconductor Energy Lab Co Ltd 半導体装置
KR101892430B1 (ko) * 2009-10-21 2018-08-30 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 장치
WO2024197615A1 (zh) * 2023-03-29 2024-10-03 京东方科技集团股份有限公司 金属网格的制备方法和天线的制备方法

Citations (2)

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CN1124406A (zh) * 1994-07-28 1996-06-12 现代电子产业株式会社 形成半导体器件图形的方法
US6461923B1 (en) * 1999-08-18 2002-10-08 Advanced Micro Devices, Inc. Sidewall spacer etch process for improved silicide formation

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JPH065563A (ja) 1992-06-19 1994-01-14 Oki Electric Ind Co Ltd レジストのアッシング方法
US5427622A (en) * 1993-02-12 1995-06-27 International Business Machines Corporation Method for uniform cleaning of wafers using megasonic energy
US5387556A (en) * 1993-02-24 1995-02-07 Applied Materials, Inc. Etching aluminum and its alloys using HC1, C1-containing etchant and N.sub.2
JPH07326609A (ja) * 1994-04-07 1995-12-12 Matsushita Electron Corp 半導体装置の製造方法
JPH08181148A (ja) * 1994-12-27 1996-07-12 Kawasaki Steel Corp 半導体装置の製造方法
IL115931A0 (en) * 1995-11-09 1996-01-31 Oramir Semiconductor Ltd Laser stripping improvement by modified gas composition
US6004839A (en) * 1996-01-17 1999-12-21 Nec Corporation Semiconductor device with conductive plugs
JPH09213704A (ja) * 1996-02-05 1997-08-15 Mitsubishi Gas Chem Co Inc 半導体装置の製造方法
JPH09213703A (ja) 1996-02-05 1997-08-15 Matsushita Electron Corp 半導体装置の製造方法
JP3574270B2 (ja) 1996-04-17 2004-10-06 三菱電機株式会社 Ａｌテーパドライエッチング方法
TW376547B (en) * 1997-03-27 1999-12-11 Matsushita Electric Industrial Co Ltd Method and apparatus for plasma processing
JPH10303197A (ja) * 1997-04-24 1998-11-13 Matsushita Electron Corp 半導体装置の製造方法
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KR100252889B1 (ko) * 1997-11-14 2000-04-15 김영환 백금식각방법
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Also Published As

Publication number Publication date
JP2005317699A (ja) 2005-11-10
CN1691292A (zh) 2005-11-02
US20050241952A1 (en) 2005-11-03
US7432211B2 (en) 2008-10-07
JP4519512B2 (ja) 2010-08-04

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