CN1691280A - 半导体基板的制造方法和电光学装置的制造方法 - Google Patents

半导体基板的制造方法和电光学装置的制造方法 Download PDF

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CN1691280A
CN1691280A CNA2005100649380A CN200510064938A CN1691280A CN 1691280 A CN1691280 A CN 1691280A CN A2005100649380 A CNA2005100649380 A CN A2005100649380A CN 200510064938 A CN200510064938 A CN 200510064938A CN 1691280 A CN1691280 A CN 1691280A
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substrate
side terminal
manufacture method
semiconductor element
semiconductor
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CN100495644C (zh
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赤川卓
依田刚
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Samsung Electronics Co Ltd
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Seiko Epson Corp
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Abstract

提供一种不会使元件破损和损伤,能够确实使夜间与配线基板导通的半导体基板的制造方法。本发明的半导体基板的制造方法,其特征在于其中包括:将配线基板(10)与元件基板(20)粘合后,将元件基板(20)的第二基板(20a)从半导体元件(13)剥离,通过无电解电镀法将该经剥离剥下的元件侧端子(61),与位于半导体元件(13)外侧的配线侧端子(14)进行电连接的工序。

Description

半导体基板的制造方法和电光学装置的制造方法
技术领域
本发明涉及半导体基板的制造方法和电光学装置的制造方法。
背景技术
作为液晶显示装置和有机电致发光(以下简称EL)装置等电光学装置,一般知道包括在基板上具备薄膜晶体管(以下简称TFT)等半导体元件的结构的。制造包括这种半导体元件的半导体基板时,由于大多需要高温过程,所以一旦在基板上形成该半导体元件制成电光学装置,会产生基板的变形和四周电路元件的破坏,导致寿命降低,其结果有引起该电光学装置特性降低的担心。
而且近年来有人提出,用包括高温过程的已有的半导体制造技术在耐热性的基础基板上形成TFT等半导体元件后,将形成有TFT的元件形成膜(层)从该基础基板上剥离,通过再将其粘合在配线基板上的方法制造电光学装置的转印技术(例如参照专利文献1)。采用这种转印技术,能够在耐热性较低的塑料基板等上形成半导体元件,拓宽该电光学装置的设计思路,同时使四周的电路元件并不暴露在高温过程中,结果可以提供一种能够抑制基板的热变形和电路元件的破坏,适宜的电光学装置。
专利文献1:特开2003-031778
上述专利文献1中,将导电性粒子印刷配置在于配线基板上形成的凸起上,进而借助于固化性树脂将TFT基板转印后,通过加热将配线基板与TFT接合。然而,对于上述转印技术而言,在配线基板与TFT接合时,凸起的高度精度、导电性粒子的印刷精度(印刷量、形状、位置精度)、转印时基板因热压的弯曲、导电性粒子的扑捉率等精度一旦恶化,就不能确保TFT的导通,因而有发生开机不良之虞。而且,一旦为回避这种开机不良而提高转印时的热压量,往往会引起TFT的破损和损伤。
发明内容
本发明正是鉴于上述课题而提出的,其目的在于提供一种不会使元件破损和损伤,能够确实使元件与配线基板导通的半导体基板的制造方法以及电光学装置的制造方法。
为了解决上述课题,本发明的半导体基板的制造方法,是一种在配线基板上安装半导体元件而成的半导体基板的制造方法,其特征在于,包括:第一基板表面上具有配线侧端子的配线基板的制造工序;在第二基板上形成具有元件侧端子的半导体元件,使所述元件侧端子面对所述第二基板表面,制造元件基板的工序;使所述第一基板中形成了所述配线侧端子的面,与所述第二基板中形成所述半导体元件的面分别相对向,将所述配线基板与所述元件基板粘合,使所述配线侧端子位置在基板面内处于所述半导体元件外侧的工序;所述粘合后,将所述第二基板与所述半导体元件剥离的工序;和将经过所述第二基板的剥离而剥下的元件侧端子,与位于所述半导体元件外侧的配线侧端子,通过无电解电镀法实现电连接的工序。
采用这种制造方法,由于将半导体元件在配线基板上转印,使配线侧端子朝向上方(粘合面侧),而且元件侧端子朝向上方(粘合面的反面)后,通过无电解电镀法将各自朝向上方的配线侧端子和元件侧端子之间实现电连接,所以不会出现为连接提高热压量而伴随破损和损伤之类不良现象,能进一步提高导通性能。而且由于各端子间的连接部均朝向上方,所以容易通过触针式检查方法等对连接状况进行确认。此外,即使假定产生连接不良的情况下,因为连接部朝向上方,所以其修复操作也变得简单。
所述配线基板形成工序中,形成由多个配线侧端子构成的端子组,在所述粘合工序中以所述端子组的面内内侧区域作为粘合面,在该内侧区域涂布粘着剂,能用该粘着剂将所述配线基板与所述元件基板粘合。通过进行这种粘合的方式,由于能够提高该粘合的强度,而且将粘着剂涂布在配线侧端子的端子组内侧区域,所以能够防止乃至抑制该配线侧端子被粘着剂覆盖,其结果能够充分保证与元件侧端子的连接性能。这里所述配线侧端子的端子组内侧区域,是指元件基板被粘合区域,即形成与元件基板的粘合面的区域。具体讲,将由多个配线侧端子所构成的端子组形成环状,能够在该环状的内侧区域涂布粘着剂,并能以该环状的内侧区域作为粘合面。
在所述端子间进行电连接的工序中,能够采用从两种端子使镀层生长的方式进行连接。若采用这种方法,在缩短连接工序处理时间的同时,由于自配线侧端子与元件侧端子双方析出的镀层进行电连接,所以还能提高二者之间的连接性(导通性)。
在所述端子间进行电连接工序之前,能够在位于所述半导体元件四周的配线侧端子的外侧,形成限制镀层向外侧开展用的绝缘壁。这样形成绝缘层的情况下,能使镀层充分析出,进一步提高导通性。例如,即使配线侧端子与元件侧端子之间的距离与设计不同(即使转印位置偏离),也能确保导通性良好。
此外,为了解决上述课题,本发明的电光学装置的制造方法,是将驱动发光元件用的开关元件安装在配线基板上制成的电光学装置的制造方法,其特征在于,采用半导体元件作为所述开关元件,采用上述的半导体基板的制造方法作为该半导体元件在所述配线基板上的安装工序。这样得到的电光学装置,元件特性良好,而且可靠性极高。
附图说明
图1是表示半导体基板及电光学装置的大体构成的剖面图。
图2是表示半导体基板大体构成的平面图(a)和剖面图(b)。
图3是表示元件基板大体构成的平面图(a)和剖面图(b)。
图4是用剖面表示本发明的半导体基板制造工序的说明图。
图5是用剖面表示本发明的半导体基板制造工序的说明图。
图6是用平面表示本发明的半导体基板制造工序的说明图。
图7是用平面表示本发明的半导体基板制造工序的说明图。
图8是表示半导体元件构成的变形例的剖面图。
图9是表示绝缘壁构成的剖面图。
图10是表示半导体元件构成的变形例的平面图。
图中:
3…半导体基板,10…配线基板,10a…第一基板,13…半导体元件,14…配线侧端子,20…元件基板,20a…第二基板,61…元件侧端子。
具体实施方式
以下参照附图说明本发明的优选实施方式。在以下说明用的各图中,由于将各部件绘成可以识别的尺寸,所以对各部件的比例持做了适当变更。
首先,参照图1说明采用本发明设计的半导体基板的制造方法制造的电光学装置的构成。图1是表示电光学装置大体构成的剖面图,电光学装置1至少具备基板接合体2,该基板接合体2具有将半导体基板3和有机EL基板4粘合而成的构成。
半导体基板3由配线基板10、在配线基板10上形成的所定形状的配线图案11、与配线图案11连接的电路部12、驱动有机EL元件124的TFT(半导体元件)13、用以将TFT13与配线图案11电连接的TFT电连接部(配线侧端子)14、将有机EL元件124与图案图案11接合的有机EL连接部15构成。其中,TFT连接部14是根据TFT13的端子图案形成的。
有机EL基板4由透光性透明基板120、使光线散射的光散射部121、由ITO等透明金属组成的阳极122、空穴注入/输送层123、有机EL元件124、阴极(负极)125和阴极隔板126构成。其中阳极122、空穴注入/输送层123、有机EL元件124和阴极125,是向有机EL元件124供给空穴或电子而使其发光的、所谓发光功能元件。另外,关于这种发光功能元件可以采用公知技术。而且也可以在有机EL元件124与阴极125之间形成空穴注入/输送层。
在半导体基板3与有机EL基板4之间事先充填密封糊料30,再设置使有机E连接部15与阴极125之间电导通用的导电性糊料31。其中在本实施方式中虽然是就采用有机EL基板作为发光元件基板的情况进行说明的,但是并不限于这种情况,也可以采用具有LED等固体发光元件的发光元件基板。
以下说明图1所示电光学装置1的制造方法。
本实施方式的电光学装置1的制造方法,主要有半导体基板3的制造工序、有机EL基板4的制造工序、和将这些半导体基板3和有机EL基板4粘合的工序。以下说明各工序;但是本实施方式尤其是以半导体基板3的制造工序为特征的。
(1.半导体基板的制造工序)
在半导体基板3的制造工序中,首先采用在配线基板10上转印作为半导体元件的TFT13的方法。也就是说,将具有TFT13的基板(元件基板)粘合在具有TFT连接部14的配线基板10上,将该TFT13转印在配线基板10侧上,得到半导体基板3。而且对这些配线基板10和元件基板20(参见图3)的制造工序说明后,再依次说明将这些配线基板10和元件基板20的粘合工序;及TFT13的转印工序等。
图2是表示配线基板10的构成的平面图(图2(a))及其沿着其A-A’线的剖面图(图2(b)),图3是表示元件基板20的构成的平面图(图(a))及其沿着其B-B’线的剖面图(图3(b))。而且图4~图5是表示各基板10、20的粘合工序乃至TFT13的转印工序的剖面图,图6~图7是表示图4~图5所示的粘合工序乃至转印工序的平面图。
(1-1.配线基板的制造工序)
首先说明图2所示的配线基板10的制造工序。
首先准备玻璃基板(第一基板)10a。优选由石英玻璃、钠玻璃等制成的透光性耐热基板作为玻璃基板10a。而且用CVD(化学气相生长)法在这种玻璃基板10a的表面上形成氧化硅膜(图示略)后,在该氧化硅膜上形成配线图案11。
接着在配线图案11上形成树脂绝缘膜(图示略)后,除去一部分该树脂绝缘膜并形成开口部,从而形成配线图案11的露出部。进而将开口部作为TFT连接部14。通过以上工序能够得到图2所示的配线基板10。
其中TFT连接部14根据所定图案形成,具体讲如图2(a)所示,多个TFT连接部14构成平面呈矩形环状的连接部(端子组),在该连接部组的内侧区域以具有粘合区域13a的形状形成。
这里在每一芯片(一个TFT13)上形成10个TFT连接部14,其配置如图2所示,以5×2列配置。而且将TFT连接部14的尺寸定为(5~30微米)×(5~30微米),在TFT连接部14、14之间的间隙定为10~25微米。
(1-2.元件基板的制造工序)
以下说明图3所示的元件基板20的制造工序。
首先准备玻璃基板(第二基板)20a。优选由石英玻璃、钠玻璃等制成的透光性耐热基板作为玻璃基板20a。而且在这种玻璃基板20a的表面上形成TFT13。TFT13的制造方法由于可以采用包括高温工艺的公知技术,所以说明省略。其中利用公知的高温工艺技术形成该TFT13,使TFT13的连接端子61处于玻璃基板20a的正上位置上,即TFT13的连接端子61处于玻璃基板20a的表面上。
其中在玻璃基板20a的TFT13的形成表面上,形成剥离层41。剥离层41采用经过激光光线等照射在该层内和界面上将会产生剥离(“层内剥离”或界面剥离“”)的材料形成。也就是说,通过照射一定强度的光线,在构成组成物质的原子或分子内原子间或分子间的接合力消失或减小,因产生脱落(ablation)等而引起剥离。而且当通过照射光线的照射,由于剥离层41中所含的成分因气化而放出,导致剥离的情况下,剥离层41常常因吸收光线而变成气体,放出其蒸气而导致剥离。
作为剥离层41的组成,这里采用非晶形硅(a-Si),而且该非晶形硅中也可以含有氢(H)。一旦含有氢,经过光照射而放出氢,使剥离层41内产生内压,此内压将促进剥离,这种情况较好。此时的氢含量优选大约2原子%以上,更优选2~20原子%。氢的含量,可以通过成膜条件,例如当采用CVD法的情况下,根据该气体组成、气体压力、气体气氛、气体流量、气体温度、基板温度、输入功率等来调整。作为其他剥离层材料,可以举出氧化硅或硅氧化合物、氮化硅、氮化铝、氮化钛等氮化物陶瓷材料,有机高分子材料(经过光照射其分子间价键断裂的物质),金属、例如Al、Li、Ti、Mn、In、Sn、Y、La、Ce、Nd、Pr、Gd或Sm或者至少含有其中之一的合金。
剥离层41的厚度,优选1纳米~20微米左右,更优选10纳米~2微米左右,最好是20纳米~1微米左右。剥离层41的厚度一旦过薄,将因所形成膜的均匀性丧失而在剥离上产生不均,反之剥离层41的厚度一旦过厚,就需要加大剥离所需照射光的功率(光量),而且还要为除去剥离后残留的剥离层41残渣而花费时间。
剥离层41的形成方法,只要是能以均匀厚度形成剥离层的方法均可采用,而且可以根据剥离层41的组成和厚度等条件适当选择。例如可以采用CVD(包括MOCCVD、低压CVD、ECR-CVD)法、蒸镀法、分子蒸镀(MB)法、溅射法、离子掺杂法、PVD法等各种气相成膜法,电镀法、浸镀法(浸涂法)、无电解电镀法等各种电镀法,朗缪尔-布罗杰特(LB)法、旋涂法、喷涂法、辊涂法等涂布方法,各种印刷法,转印法,喷墨法,粉末喷射法等。这些方法中也可以将两种以上方法组合。
尤其当剥离层41的组成是非晶形硅(a-Si)的情况下,优选采用CVD法,特别是低压CVD法和等离子CVD法成膜。而且以陶瓷原料采用溶胶-凝胶法使剥离层41成膜的情况下和用有机高分子材料构成的情况下,优选采用涂布法,特别是由旋涂法成膜。
(1-3.粘合工序)
将上述方法制造的配线基板10和元件基板20进行粘合。其中首先如图4(a)和图6(a)所示,将粘着剂51涂布在处于配线基板10的玻璃基板10a的,由多个TFT连接部14构成的连接部组的内侧区域(粘合区域)13a上。粘着剂51的涂布方法例如可以采用分配法、光刻法或采用喷墨装置的液滴喷出法进行。
粘着剂51的涂布部分,处于避开玻璃基板10a的TFT连接部14形成区域的位置上,将后述的TFT13粘合时,粘着剂51处于不会向该TFT连接部14流动湿润扩展的位置。而且将粘着剂51的涂布量同样设定得不会向TFT连接部14流动湿润扩展的程度。
而且,粘着剂51的涂布,既可以在元件基板20一侧进行,也可以在配线基板10和元件基板20双方进行。而且粘着剂51的涂布形状,除平面为正方形或圆形以外,还可以以点或线的形式存在。作为粘着剂51,除热塑性树脂以外,既可以使用光固化性树脂,也可以使用在粘着剂51中含有填料和颗粒的。
然后利用涂布的粘着剂51,将配线基板10和元件基板20粘合。具体讲如图4(b)和图6(b)所示,将配线基板10的玻璃基板10a中形成TFT连接部14的面,与元件基板20一侧的玻璃基板20a中形成连接端子61的面分别相对向的情况下,将各基板10、20粘合。因此TFT13将与配线基板10的表面对接。而且特别是粘合得使TFT连接部14在基板面内处于TFT13外侧位置上,即使TFT13位于粘合区域13a内。
(1-4.转印工序)
接着为了将在玻璃基板20a侧形成的TFT13转印在玻璃基板10a侧(布线基板10侧),对玻璃基板20a进行剥离。具体讲如图4(c)所示,从玻璃基板20a的背面侧(元件基板20的未形成TFT13的侧面)照射激光光线L。于是剥离层41的原子或分子的键减弱,而且剥离层41内的氢分子化,从结晶的接合分离,即TFT13与玻璃基板20a之间的接合力变得不完全,激光光线照射部分的玻璃基板20a与TFT13间的接合(粘结)能够容易地被清除。
通过上述那样激光光线照射,当玻璃基板20a与TFT13剥离的情况下,如图5(a)和图7(a)所示,TFT13将被转印在配线基板10上。而且正如同图所示,配线基板10的端子(TFT连接部)14的表面,与元件基板20的端子61的表面,均被配置得各自指向相同方向的形状。
(1-5.端子的连接工序)
进行上述转印之后,进行各连接端子14、61之间的电连接。其中,制成采用无电解电镀法连接的。首先浸渍在处理液中以便提高各连接端子14、61的表面湿润性能并除去残渣。本实施方式中,在含有0.01~0.1%氢氟酸和0.1~10%硫酸的水溶液中浸渍1~5分钟。或者也可以在0.1~10%的氢氧化钠等水溶液浴中浸渍1~10分钟。
然后用氢氧化钠浴在加热至20~60℃的pH9~13的碱性水溶液中浸渍1秒钟至5分钟,除去表面的氧化膜。或者在制成5~30%硝酸的pH1~3的、加热至20~60℃的酸性水溶液浴中浸渍1秒钟至5分钟。
进而在含有ZnO的pH11~13的锌酸盐溶液中浸渍1秒钟至2分钟,使端子表面置换成锌。而且再于锌酸盐浴中浸渍1秒钟至2分钟,使致密的锌微粒在铝表面上析出。然后浸渍在无电解电镀浴中,形成镍镀层。
使Ni镀层析出的厚度达到2~10微米。电镀浴是以次亚磷酸钠作为还原剂的浴,pH4~5,浴温80~95℃。
在这种工序中,由于在次亚磷酸钠浴中进行,所以共同析出磷(P)。镀层金属由于是从配线基板3的连接端子(TFT连接部)14和TFT13的连接端子61二者上各向同性生长的,所以在两种端子14、61上生长的镀层金属通过生长至各端子高度间隙的一半厚度而连接。其中,为了增加连接面积,应当在连接后还要继续一定程度的电镀。
将全部端子14、61间连接之后,最后在置换Au的电镀浴中浸渍,使Ni表面变成Au。形成0.05~0.3微米左右厚度的Au。金(Au)浴使用无氰类型的,pH6~8,浴温50~80℃,浸渍1~30分钟。这样能在两种端子14、61上形成Ni-Au镀层凸起。
这样一来如图5(b)和图7(b)所示,两种端子14、61通过无电解电镀生长的凸起71、72而实现互相电连接,能够得到在配线基板10上安装了作为半导体元件的TFT13的半导体基板3。
综上所述,本实施方式中,由于在使各端子14、61分别朝上地将TFT13转印在配线基板10上之后,在各自朝上的端子14、61之间通过无电解电镀实现电连接,所以能够容易借助于外观、触针式检查方法等确认连接状况。此外,即使假定产生连接不良的情况下,由于连接部均朝上,所以其修复操作也变得容易。
(2.有机EL基板的制造方法)
以下说明与半导体基板3相对地粘合的有机EL基板的制造方法。其中可以采用公知的有机EL基板的制造方法,具体讲分别如图1所示那样通过在透明基板120上形成阳极122、阴极隔板126、空穴注入输送层123、有机EL元件124和阴极125,得到有机EL基板4。
(3.半导体基板与有机EL基板的粘合工序)
以下说明将上述半导体基板3与有机EL基板4粘合,最终形成图1所示的电光学装置1的工序。
首先,在半导体基板3上形成由导电性材料构成的有机EL连接部15,在该有机EL连接部15上形成由银糊料组成的导电性糊料31。
进而将有机EL基板4与半导体基板3粘合,使有机EL基板4的阴极125与半导体基板3的导电性糊料31对接。而且在粘合时,在两种基板之间的空间中封入密封用糊料30,接着用密封剂32将两基板的四周密封。
通过以上的各工序,制成图1所示的电光学装置1。
这种电光学装置1,是从有机EL基板4中的半导体基板3一侧开始,依次配置了阴极125、有机EL元件124、空穴注入/输送层123和阳极122的、能从阳极122一侧取出发光的顶部出射型有机EL装置。
以上虽然说明了本实施方式,但是本发明并不限于上述实施方式。例如在本实施方式中,为了实现端子14、61之间的电连接,对各端子14、61分别实施了无电解电镀,但是也可以仅对各端子14和61中的一方端子实施无电解电镀,使镀层从该方端子析出而进行连接。也就是说,可以采用难以析出镀层或者不能析出镀层的材料制成端子14和61中的一方。其中,作为这些端子14、61的构成材料,例如除Al、Cu等金属导电性材料以外,还可以采用TiN等氮化膜。
而且为了使各端子14、61的镀层容易连接,如图8(a)所示,也可以将TFT13的形状构成为截面锥形状。也就是说,朝向配线基板10侧下部扩展形状的TFT13。如图8(b)所示,若镀层70超过各端子14、61之间的阶差,则能够实现容易接合、可靠性更高导电性电连接。
此外由于镀层以蘑菇形同样生长,所以在配线基板10的端子14之间间隙窄的情况下,和端子14与端子61间距离大需要析出大量镀层的情况下,也可以如图9所示形成绝缘层。
另外,在本实施方式中,虽然是就采用矩形TFT(芯片)13的情况加以说明的,但是也可以例如如图10所示采用圆形的TFT(芯片)。这种情况下,也能使各端子14、61指向上方,通过无电解电镀法在各端子14、61之间进行电连接。而且,采用这种圆形的TFT(芯片)的情况下,能够粘着剂51以各向同性地扩展,有效地抑制从粘着剂51的粘合面渗出的不利情况出现。

Claims (5)

1.一种半导体基板的制造方法,是在配线基板上安装半导体元件而成的半导体基板的制造方法,其特征在于,包括:
第一基板表面上具有配线侧端子的配线基板的制造工序;
在第二基板上形成具有元件侧端子的半导体元件,使所述元件侧端子面对所述第二基板表面,制造元件基板的工序;
使所述第一基板中形成了所述配线侧端子的面,与所述第二基板中形成所述半导体元件的面分别相对向,将所述配线基板与所述元件基板粘合,使所述配线侧端子位置在基板面内处于所述半导体元件的外侧的工序;
所述粘合后,将所述第二基板与所述半导体元件剥离的工序;和
将经过所述第二基板的剥离而剥下的元件侧端子,与位于所述半导体元件外侧的配线侧端子,通过无电解电镀法实现电连接的工序。
2.根据权利要求1所述的半导体基板的制造方法,其特征在于:
在所述配线基板的形成工序中,形成由多个配线侧端子构成的端子组;
在所述粘合工序中,以所述端子组的面内内侧区域作为粘合面,在该内侧区域涂布粘着剂,用该粘着剂将所述配线基板与所述元件基板粘合。
3.根据权利要求1或2所述的半导体基板的制造方法,其特征在于:在对所述端子间电连接的工序中,从配线侧端子和元件侧端子双方使镀层生长的方式进行连接。
4.根据权利要求1~3中任何一项所述的半导体基板的制造方法,其特征在于:将所述端子间电连接的工序之前,在位于所述半导体元件四周的配线侧端子的外侧,形成用以限制镀层向外侧开展的绝缘壁。
5.一种电光学装置的制造方法,是将用以驱动发光元件的开关元件安装在配线基板上制成的电光学装置的制造方法,其特征在于:采用半导体元件作为所述开关元件,采用权利要求1~4中任何一项所述的半导体基板的制造方法作为将该半导体元件安装在所述配线基板上的工序。
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