CN1663031A - 半导体装置的制造方法 - Google Patents

半导体装置的制造方法 Download PDF

Info

Publication number
CN1663031A
CN1663031A CN03814509XA CN03814509A CN1663031A CN 1663031 A CN1663031 A CN 1663031A CN 03814509X A CN03814509X A CN 03814509XA CN 03814509 A CN03814509 A CN 03814509A CN 1663031 A CN1663031 A CN 1663031A
Authority
CN
China
Prior art keywords
film
semiconductor device
manufacture method
metal oxide
oxide film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN03814509XA
Other languages
English (en)
Other versions
CN100388438C (zh
Inventor
神力博
久保万身
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tokyo Electron Ltd
Original Assignee
Tokyo Electron Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Electron Ltd filed Critical Tokyo Electron Ltd
Publication of CN1663031A publication Critical patent/CN1663031A/zh
Application granted granted Critical
Publication of CN100388438C publication Critical patent/CN100388438C/zh
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008Making conductor-insulator-semiconductor electrodes
    • H01L21/28017Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28158Making the insulator
    • H01L21/28167Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation
    • H01L21/28194Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation by deposition, e.g. evaporation, ALD, CVD, sputtering, laser deposition
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/02Pretreatment of the material to be coated
    • C23C16/0272Deposition of sub-layers, e.g. to promote the adhesion of the main coating
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/22Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
    • C23C16/30Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
    • C23C16/40Oxides
    • C23C16/405Oxides of refractory metals or yttrium
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02126Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
    • H01L21/0214Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC the material being a silicon oxynitride, e.g. SiON or SiON:H
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02164Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/022Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being a laminate, i.e. composed of sublayers, e.g. stacks of alternating high-k metal oxides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02296Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
    • H01L21/02318Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
    • H01L21/02356Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment to change the morphology of the insulating layer, e.g. transformation of an amorphous layer into a crystalline layer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008Making conductor-insulator-semiconductor electrodes
    • H01L21/28017Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28158Making the insulator
    • H01L21/28167Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation
    • H01L21/28202Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation in a nitrogen-containing ambient, e.g. nitride deposition, growth, oxynitridation, NH3 nitridation, N2O oxidation, thermal nitridation, RTN, plasma nitridation, RPN
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/314Inorganic layers
    • H01L21/316Inorganic layers composed of oxides or glassy oxides or oxide based glass
    • H01L21/31604Deposition from a gas or vapour
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/51Insulating materials associated therewith
    • H01L29/511Insulating materials associated therewith with a compositional variation, e.g. multilayer structures
    • H01L29/513Insulating materials associated therewith with a compositional variation, e.g. multilayer structures the variation being perpendicular to the channel plane
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02142Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing silicon and at least one metal element, e.g. metal silicate based insulators or metal silicon oxynitrides
    • H01L21/02148Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing silicon and at least one metal element, e.g. metal silicate based insulators or metal silicon oxynitrides the material containing hafnium, e.g. HfSiOx or HfSiON
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02172Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
    • H01L21/02175Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal
    • H01L21/02181Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal the material containing hafnium, e.g. HfO2
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02172Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
    • H01L21/02175Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal
    • H01L21/02189Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal the material containing zirconium, e.g. ZrO2
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H01L21/0228Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition deposition by cyclic CVD, e.g. ALD, ALE, pulsed CVD
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/314Inorganic layers
    • H01L21/316Inorganic layers composed of oxides or glassy oxides or oxide based glass
    • H01L21/31604Deposition from a gas or vapour
    • H01L21/31608Deposition of SiO2
    • H01L21/31612Deposition of SiO2 on a silicon body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40Capacitors
    • H01L28/55Capacitors with a dielectric comprising a perovskite structure material
    • H01L28/56Capacitors with a dielectric comprising a perovskite structure material the dielectric comprising two or more layers, e.g. comprising buffer layers, seed layers, gradient layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/51Insulating materials associated therewith
    • H01L29/517Insulating materials associated therewith the insulating material comprising a metallic compound, e.g. metal oxide, metal silicate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/51Insulating materials associated therewith
    • H01L29/518Insulating materials associated therewith the insulating material containing nitrogen, e.g. nitride, oxynitride, nitrogen-doped material

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Materials Engineering (AREA)
  • Mechanical Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Inorganic Chemistry (AREA)
  • Ceramic Engineering (AREA)
  • Formation Of Insulating Films (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Chemical Vapour Deposition (AREA)

Abstract

一种半导体装置的制造方法,其包括:在硅基板上形成含有Si和氧的绝缘膜的工序;利用使用了有机金属原料的化学气相堆积法、在上述绝缘膜上堆积金属氧化物膜的工序,其中:进行上述堆积金属氧化膜的工序,使得上述金属氧化膜在堆积后不久的状态下成为结晶质。

Description

半导体装置的制造方法
技术领域
本发明涉及半导体装置,特别是涉及具有高电介质膜或所谓high-K电介质膜的超微细化高速半导体装置的制造方法。
在现今的超高速半导体装置中,在微细化加工处理进步的同时,栅极长度可以做到0.1μm以下。通常在微细化的同时,半导体装置的动作速度提高,然而在这种作得非常微细的半导体装置中,随着微细化使栅极长度缩短,根据比例法则,需要减小栅极绝缘膜的膜厚。
但是,当栅极长度在0.1μm以下时,在使用SiO2的情况下,栅极绝缘膜的厚度需要设定为1~2nm或其以下。这样,在非常薄的栅极绝缘膜中,隧道电流增大,其结果是不能回避栅极泄漏电流增大的问题。
对于这个问题,目前提出了在栅极绝缘膜上采用比介电率远比SiO2膜的比介电率大、因而即使实际的物理膜厚大而换算为SiO2膜时的膜厚小的Ta2O5或Al2O3、ZrO2、HfO2、再就是ZrSiO4或HfSiO4那样的high-K电介质材料。通过使用这种high-K电介质材料,当栅极长度在0.1μm以下时,即使在非常短的超高速半导体装置中,也可以使用物理膜厚为10nm左右的栅极绝缘膜,可以抑制由隧道效果产生的栅极泄漏电流。
在栅极绝缘膜上使用这种high-K电介质膜的半导体装置中,直接在硅基板上形成high-K电介质膜,对于减小绝缘膜换算为SiO2实际膜厚是较好的,但这样,当直接在硅基板上形成high-K电介质膜时,金属元素会从high-K电介质膜扩散至硅基板中,在隧道区域中产生载流子散乱的问题。
从提高沟道区域中的载流子流动性的观点来看,最好在high-K电介质栅极氧化膜和硅基板之间,放入厚度在1nm以下、最好为0.8nm以下的厚度极薄的基极氧化膜。上述基极氧化膜需要非常薄,当厚度厚时,在栅极绝缘膜上使用high-K电介质膜的效果被抵消。
背景技术
图1A~1C表示目前提出的具有high-K电介质栅极绝缘膜的半导体装置的制造工序。
从图1A可看出,在硅基板11上,通过使用例如紫外光激发氧自由基的自由基氧化处理,形成非常薄的最好膜厚在1nm以下的SiO2膜构成的基极氧化膜12。在图1B的工序中,在上述基极氧化膜12上,利用原子层堆积(ALD)法或有机金属化学气相堆积(MOCVD)法等,形成HfO2或ZrO2等的金属氧化膜13。
在图1A的工序中,可以使用例如特开2002-100627号公报所述的方法,进行上述自由基氧化处理。通过硅基板的紫外光激发自由基氧化处理,可以稳定地再现性良好地形成膜厚相当于2~3个分子层的基极氧化膜。另外,当使用上述特开2002-100627号公报所述的方法时,可在这样形成的非常薄的硅氧化膜中导入氮原子,将上述基极氧化膜12作成硅氧氮化膜。
在图1B的工序中,可以使用特开2002-151489号公报中所述的ALD法或MOCVD法进行上述金属氧化膜13的堆积。
然而,上述金属氧化膜13是作为high-K电介质膜形成的,但为了显现出上述金属氧化膜13作为high-K电介质膜的功能,不利用SiO2膜那样的非晶质膜,而需要进行结晶化。因此,目前,如图1C所示,对在图1B的工序中得出的结构进行热处理,使金属氧化膜13结晶化的工序。由于金属氧化膜13在非晶质的基极氧化膜12上形成,所以在结晶化时,成为由微结晶的集合构成的多晶体。这种结晶化的金属氧化膜13,可以作为高速半导体装置的high-K电介质栅极绝缘膜使用。
然而,如上所述,要求这种high-K电介质栅极绝缘膜13和硅基板11之间的界面上形成的基极氧化膜12要求尽可能薄。当上述基极氧化膜12的膜厚增大时,使用high-K电介质栅极绝缘膜13的效果被抵消。
另一方面,在图1B的金属氧化膜13的堆积工序中,特别是在使用MOCVD法的情况下,成为在氧的气氛中的处理,在堆积时的基板温度高的情况下,上述基极氧化膜12的膜厚可能由于基极的氧化而增大。另外,在图1C所示的结晶化热处理时,上述基极氧化膜12的膜厚也增大。
另外,在图1C的结晶化工序中,在金属氧化膜13结晶化的同时,在上述金属氧化膜13中,产生微结晶的粒成长。当在膜13中产生这种粒成长时,在其下的与基极氧化膜12的界面变成不规则或不稳定,容易产生栅极泄漏电流增大等问题。
发明内容
本发明的目的是要解决上述问题,提供一种新颖的有用的半导体装置的制造方法。
本发明的更具体的目的是要提供一种在具有high-K电介质栅极绝缘膜的半导体装置的制造中、可以回避在上述high-K电介质栅极绝缘膜结晶化时基极氧化膜的膜厚增加的制造方法。
本发明的其它目的是要提供一种在具有high-K电介质栅极绝缘膜的半导体装置的制造中、在上述high-K电介质栅极绝缘膜结晶化时、可以抑制上述high-K电介质栅极绝缘膜中的金属氧化物微结晶的粒成长的制造方法。
本发明的再一个目的是要提供一种在具有high-K电介质栅极绝缘膜的半导体装置的制造中、可以有效地控制上述high-K电介质栅极绝缘膜的膜厚的制造方法。
本发明的其它目的是要提供一种半导体装置的制造方法,它包含下述工序:
在硅基板上形成含有Si和氧的绝缘膜的工序;
利用使用了有机金属原料的化学气相堆积法、在上述绝缘膜上堆积金属氧化物膜的工序;
其特征在于:进行上述堆积金属氧化膜的工序,使得上述金属氧化膜在堆积后不久的状态下成为结晶质。
采用本发明,可形成为构成high-K电介质栅极绝缘膜的金属氧化膜在堆积后不久已成为结晶质,但在本发明中,可抑制上述金属氧化膜中的粒成长,即使在进行了结晶化工序之后,金属氧化物结晶的粒径也不超过10nm。另外,即使进行这种金属氧化膜的堆积,实质上也不会使基极氧化膜的膜厚增加。特别是,在本发明中,在使用含有氨基的有机金属原料的情况下,在上述金属氧化膜中,氮向晶界偏析,这样向晶界偏析的氮,可抑制原子沿着晶界的移动。
本发明的其它目的和特征,从以下参照附图对本发明的详细说明中可以了解。
附图说明
图1A~1C是表示目前的高介电率栅极绝缘膜的形成工序的图。
图2是表示在本发明第一实施例中使用的MOCVD装置的结构的图。
图3是详细地表示图2的MOCVD装置的一部分的图。
图4是表示本发明第一实施例的HfO2膜的堆积速度和基板温度之关系的图。
图5是表示本发明第一实施例的HfO2膜的堆积速度和气相原料分压之关系的图。
图6是表示由本发明第一实施例得到的HfO2膜的X射线衍射图案的图。
图7A~7C是表示包含由本发明第一实施例得到的HfO2膜的试料的剖面TEM像的图。
图8是表示由本发明第一实施例得到的HfO2膜的C-V特性的图。
图9是表示由本发明第一实施例得到的HfO2膜中的碳浓度的图。
图10是表示由本发明第一实施例得到的HfO2膜中的氮浓度的图。
图11A~11E是说明本发明第二实施例的半导体装置的制造工序的图。
具体实施方式
[第一实施例]
图2表示本发明使用的MOCVD装置20的结构。
从图2中可看出,MOCVD装置20具有由泵21排气的反应容器22,在上述反应容器22中设置保持被处理基板W的保持台22A。
在图2的MOCVD装置20中设置有将氧气供给上述反应容器22的管路22a,另外还设置有将保持在起泡器23A中的Hf[N(C2H5)2]4等的液体有机金属原料、通过气相原料控制器22b和管路22c、供给上述反应容器22的原料供给系统I。另外,在上述MOCVD装置20中。还设置有将保持在瓶子23B中的Hf[N(C2H5)2]4等的液体有机金属原料、通过液体流量控制器22d和气化器22e、供给上述反应容器22的原料供给系统II。上述原料供给系统I和原料供给系统II,通过切换阀V1和V2进行切换。
图3表示上述原料供给系统I的气相原料控制器22b的结构。
从图3可看出,上述气相原料控制器22b包含被供给Ar气的质量流量控制器(以下简称MFC)31、32,上述MFC31将供给的Ar气作为载气供给至保持上述有机金属原料的起泡器23A中。
在上述起泡器23A中形成有机金属原料的蒸气,将所形成的有机金属原料蒸气,与来自上述MFC32的Ar载气一起,供给至浓度传感器33。
利用上述浓度传感器33测量有机金属原料相对于所供给的Ar载气浓度,将表示其结果的输出信号供给至控制部件34。另一方面,上述控制部件34根据规定的程序,形成与上述浓度传感器33的输出信号相应的第一和第二控制信号,分别将这些控制信号供给至上述MFC31和MFC32。由此,可将上述浓度传感器33中的有机金属原料相对于载气的浓度比控制为规定值。这样,将控制了有机金属原料浓度比的气相原料气体,由压力计35和阀36设定为规定压力后,通过上述管路22c供给至反应容器22。
图4表示在图2的MOCVD装置20中,对于使用Hf[N(C2H5)2]4作为原料进行在基板温度为480℃的硅基板上堆积HfO2膜的情况,在使用图2所示的原料供给系统I的情况和使用原料供给系统II的情况下比较堆积速度。
从图4中可看出,在使用原料供给系统II的情况下,随着堆积时基板温度的升高,堆积速度也增大,在480℃的基板温度下进行堆积时,可得到每分钟100nm左右的非常大的堆积速度。在这种非常大的堆积速度下,高精度地形成膜厚为数十nm的金属氧化膜较困难。
与此相对,在使用利用起泡器23A的原料供给系统I的情况下,在堆积时的基板温度为480℃时,堆积速度为每分钟1nm左右,可以高精度地形成非常薄的金属氧化膜。
图5表示在图2的MOCVD装置中使用原料供给系统I时的通过管路22c供给至上述反应容器22的气相原料中的Hf[N(C2H5)2]4的分压和基板上的堆积速度的关系。图5的关系是将基板温度设定为480℃时的关系。
从图5中可以看出,在使用图2的原料供给系统I的情况下,当Hf[N(C2H5)2]4的分压降低时,基板上的HfO2膜的堆积速度同时降低。通过利用图3所示的气相原料控制器22b控制Hf[N(C2H5)2]4的分压,可以控制HfO2膜在被处理基板W上的成膜速度。
图6表示在堆积后不久的状态下求出这样形成的HfO2膜X射线衍射图案的结果。图6中表示对这样得到的HfO2膜,在氮气氛中,在500~700℃范围内的各种温度下进行热处理时的X射线衍射图案。在图6的实验中,如上所述,利用在特开2002-100627号公报中所述的方法,在HF洗净了的硅基极表上形成由SiO2膜或SiON膜构成的膜厚约为0.8nm的基极氧化膜,在这样形成的基极氧化膜上进行HfO2膜的堆积。这时,如上所述,使用Hf[N(C2H5)2]4作为原料,设定堆积时的基板温度为480℃,进行HfO2膜的堆积。
从图6可看出,在堆积后不久的状态下,HfO2膜显示出Hf(111)的衍射峰值,成为结晶化状态。
作为与上述的图1(C)的工序相对应,在对这样形成的HfO2膜进行热处理的情况下,Hf(111)的衍射峰值多少增高一些,进行结晶化,但衍射峰值的强度变化不显著,即使进行热处理,HfO2膜的微结构也不太变化。实际上,测定了膜中的HfO2结晶的粒径分布的结果是,在480℃,在堆积后不久的状态下,平均粒径约为4.7nm,在500℃的热处理后的状态下,约为8.5nm,在600℃的热处理后,约为7.5nm,在700℃的热处理后约为6.3nm,若考虑误差时,可以认为在HfO2膜中几乎不会产生由热处理造成的粒径超过10nm的粒成长。
图7A表示用透过型电子显示微镜观察堆积了HfO2膜后的试料的剖面的结果,图7B表示同样利用透过型电子显微镜观察在氮气氛中、在700℃下热处理HfO2膜时的剖面的结果。图7A、7B用相同的比例表示。可看出,在硅基板中,各个Si原子被解像。
从图7A可看出,在形成HfO2膜后不久,SiO2基极氧化膜的膜厚约为1.3nm,相对于初期膜厚(0.8nm),膜厚增加0.5nm。
与此相对,在图7B中,SiO2基极氧化膜的膜厚约为0.9nm,相对于图7A的状态,膜厚增加约0.1nm。
图7C表示在480℃下、在膜厚为0.8nm的SiON基极膜上形成HfO2膜、再在氮气氛中、在500℃下热处理该膜时的试料剖面。在这种情况下,SiON基极模的膜厚几乎不增加,这已被确认了。
这样,根据本发明,通过使用Hf[N(C2H5)2]4作为原料的MOCVD法,在480℃的基板温度下堆积HfO2膜的情况下,在堆积后不久,可得到结晶化的HfO2膜,并且在热处理这样得到的HfO2膜时,实质上没有HfO2结晶的粒成长,并且其下面的基极氧化膜的膜厚实质上不增加。
目前,得到这种效果的理由还不十分了解,但可以认为可能是原料中所含的氮原子,在HfO2膜中,向晶界偏析,敲击沿结晶晶界的氧原子或Hf原子的移动。该氮原子的量为0.5~5原子%。
图8表示使用这样在480℃下的堆积得到的HfO2膜形成电容器、测定C-V特性的结果。在图8中,为了比较,还表示了对350℃下堆积的HfO2膜同样求出的C-V特性。在480℃下,堆积上述HfO2膜时,设定氧浓度为87%,而在350℃下堆积上述HfO2膜时,设定氧浓度为56%。
从图8中可看出,在基板温度480℃、氧浓度87%的条件下形成的HfO2膜中,得到泄漏电流少的优异的C-V特性,而在基板温度350℃、氧浓度56%条件下形成的HfO2膜,得到泄漏电流多的特性不好的特性。这是由于膜中所含有的杂质元素的浓度两者不同。
图9表示对于在350~480℃范围内的各种基板温度下堆积的HfO2膜、求出了膜中的碳浓度的结果。
从图9中可看出,在氧浓度为56%的条件下堆积的HfO2膜中,在任意一个基板温度下,膜中的碳浓度都超过1×103/cm3,而在氧浓度为84%的条件下堆积的HfO2膜中,特别是在480℃的基板温度下堆积的情况下,膜中的碳浓度在1×102/cm3以下,可以认为这对图8的C-V特性有贡献。这可以认为是,图8的C-V特性反映了在由Hf[N(C2H5)2]4原料堆积HfO2膜时,通过在高温、高氧浓度条件下进行堆积,减小膜中的残留碳量的效果。
图10表示对于在350~480℃范围内的各种基板温度下堆积的HfO2膜、求出了膜中的氮浓度的结果。
从图10中可看出,在氧浓度为56%的条件下堆积的HfO2膜中,在任意一个基板温度下,膜中的氮浓度都超过1×103/cm3,而在氧浓度为84%的条件下堆积的HfO2膜中,特别是在480℃的基板温度下堆积的情况下,膜中的氮浓度在1×102/cm3以下。认为这反映出了具有如下结构式的Hf[N(C2H5)2]4原料中的Hf-N键容易被热切断的情形以及在上述Hf[N(C2H5)2]4原料中不含氧的情形。
这样,在本发明中,特别是通过使用包含Hf[N(C2H5)2]4这样氨基的有机金属化合物作为原料,在结晶化了状态下产生堆积的条件下进行金属氧化膜的堆积时,不论是在金属氧化膜堆积时和在热处理所堆积的金属氧化物时,都可有效地抑制金属氧化膜下的基极氧化膜的膜厚增加。另外,即使在金属氧化膜热处理时,也可抑制膜中的结晶粒成长,使与薄的基极氧化物的界面形态稳定。另外,通过在高温、高氧浓度条件下进行堆积,可使膜中所含的杂质的浓度最小化。
[第二实施例]
图11A~11E表示本发明的第二实施例的半导体装置的制造工序。
从图11A中可看出,通过进行例如使用紫外光激发氧自由基的自由基氧化处理、或者通过继续上述自由基氧化处理进行等离子体自由基氧化处理,可在硅基板41上形成由膜厚为1nm以下的SiO2膜或SiON膜构成的基极氧化膜42,在图1B的工序中,通过使用包含Hf[N(C2H5)2]4、Hf[N(CH3)2]4、Zr[N(C2H5)2]4及Zr[N(CH3)2]4的优选氨基的有机金属原料的有机金属化学气相堆积(MOCVD)法,在为了使上述金属氧化膜43以结晶质状态堆积的400~600℃的基板温度下,并且在80%以上的氧浓度条件下,将HfO2或ZrO2等金属氧化膜13堆积在上述基极氧化膜42上。
其次,在图11C的工序中,在氮气氛中,在500~700℃的温度下,热处理所得到的结构,使上述金属氧化膜43充分结晶化。这时,由于上述金属氧化膜43在堆积后不久已结晶化,所以原料中的氮原子向晶界偏析,可抑制金属氧化膜43中的结晶粒成长,还可抑制上述基极氧化膜42的残留氧造成的膜厚增加。特别是,如果利用SiON膜形成上述基极氧化膜42,则实质上可避免在图11B、11C的工序中的基极氧化膜42的膜厚增加。
接着,在图11D的工序中,在上述金属氧化膜43上堆积聚硅膜44,再在图11E的工序中,通过将该膜图案化,从而形成栅极电极44A。再通过在掩模中对上述栅极电极44A进行离子注入,从而在上述硅基板41中、上述栅极电极44A的两侧形成扩散区域41A、41B。
采用本实施例,可使由基极氧化膜42和金属氧化膜43构成的栅极绝缘膜的膜厚,与栅极长度的缩短而相应地减小,可以实现非常高速地进行动作的半导体装置。
以上说明了本发明的优选实施例,但本发明不是仅限于此,在本发明的要旨内,可作各种变形和变更。
产业上的可利用性
采用本发明,可以使构成high-K电介质栅极绝缘膜的金属氧化膜在堆积后不久已经成为结晶质,但利用本发明,还可抑制上述金属氧化膜中的粒成长,即使进行结晶化工序后,金属氧化物结晶的粒径不超过10nm。另外,即使进行这种金属氧化膜的堆积,基极氧化膜实质上不增厚。特别是,利用本发明,在使用含有氨基的有机金属原料的情况下,在上述金属氧化膜中,氮向晶界偏析,这样,向晶界偏析了的氮,可抑制原子沿着晶界的移动。

Claims (11)

1.一种半导体装置的制造方法,其包括:在硅基板上形成含有Si和氧的绝缘膜的工序;利用使用了有机金属原料的化学气相堆积法、在所述绝缘膜上堆积金属氧化物膜的工序;其特征在于:
进行所述堆积金属氧化膜的工序,使得所述金属氧化膜在堆积后不久的状态下成为结晶质。
2.如权利要求1所述的半导体装置的制造方法,其特征在于:所述金属氧化膜含有Hf或Zr中的任一种。
3.如权利要求1或2所述的半导体装置的制造方法,其特征在于:所述堆积金属氧化膜的工序在400~600℃的基板温度下进行。
4.如权利要求1~3中任一项所述的半导体装置的制造方法,其特征在于:所述有机金属原料包含氨基。
5.如权利要求1~4中任一项所述的半导体装置的制造方法,其特征在于:所述有机金属原料选自Hf[N(C2H5)2]4、Hf[N(CH3)2]4、Zr[N(C2H5)2]4和Zr[N(CH3)2]4
6.如权利要求1~5中任一项所述的半导体装置的制造方法,其特征在于:所述有机金属原料通过液体原料的起泡供给。
7.如权利要求1~6中任一项所述的半导体装置的制造方法,其特征在于:所述堆积金属氧化膜的工序,在含有氧的气氛中进行。
8.如权利要求1~7中任一项所述的半导体装置的制造方法,其特征在于:所述堆积金属膜的工序,在超过80%的氧浓度气氛中进行。
9.如权利要求1~8中任一项所述的半导体装置的制造方法,其特征在于:所述金属氧化膜在堆积后不久的状态下,由粒径为10nm以下的微结晶构成。
10.如权利要求1~9中任一项所述的半导体装置的制造方法,其特征在于:还包括对所堆积的所述金属氧化膜进行热处理的工序,所述金属氧化膜在热处理后的状态下,由粒径为10nm以下的微结晶构成。
11.如权利要求1~10中任一项所述的半导体装置的制造方法,其特征在于:所述金属氧化膜以5原子%以下的范围含有氮。
CNB03814509XA 2002-06-19 2003-06-03 半导体装置的制造方法 Expired - Fee Related CN100388438C (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP178930/2002 2002-06-19
JP2002178930A JP4171250B2 (ja) 2002-06-19 2002-06-19 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
CN1663031A true CN1663031A (zh) 2005-08-31
CN100388438C CN100388438C (zh) 2008-05-14

Family

ID=29728212

Family Applications (1)

Application Number Title Priority Date Filing Date
CNB03814509XA Expired - Fee Related CN100388438C (zh) 2002-06-19 2003-06-03 半导体装置的制造方法

Country Status (6)

Country Link
US (1) US6953731B2 (zh)
JP (1) JP4171250B2 (zh)
KR (1) KR100636486B1 (zh)
CN (1) CN100388438C (zh)
TW (1) TWI233648B (zh)
WO (1) WO2004001833A1 (zh)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3973605B2 (ja) * 2002-07-10 2007-09-12 東京エレクトロン株式会社 成膜装置及びこれに使用する原料供給装置、成膜方法
WO2004088415A2 (en) 2003-03-28 2004-10-14 Advanced Technology Materials Inc. Photometrically modulated delivery of reagents
US7063097B2 (en) * 2003-03-28 2006-06-20 Advanced Technology Materials, Inc. In-situ gas blending and dilution system for delivery of dilute gas at a predetermined concentration
JP5264039B2 (ja) 2004-08-10 2013-08-14 東京エレクトロン株式会社 薄膜形成装置及び薄膜形成方法
JP4522900B2 (ja) 2005-03-30 2010-08-11 東京エレクトロン株式会社 成膜方法および記録媒体
JP2007056336A (ja) * 2005-08-25 2007-03-08 Tokyo Electron Ltd 基板処理装置,基板処理装置の基板搬送方法,プログラム,プログラムを記録した記録媒体
KR100716654B1 (ko) * 2006-04-04 2007-05-09 주식회사 하이닉스반도체 정방정계 구조의 지르코늄산화막 형성 방법 및 그를 구비한캐패시터의 제조 방법
JP5245287B2 (ja) 2007-05-18 2013-07-24 ソニー株式会社 半導体装置の製造方法、薄膜トランジスタ基板の製造方法および表示装置の製造方法
DE102008006326A1 (de) * 2008-01-28 2009-07-30 Robert Bosch Gmbh Sensorelement eines Gassensors
JP5374980B2 (ja) * 2008-09-10 2013-12-25 ソニー株式会社 固体撮像装置
US11889986B2 (en) 2010-12-09 2024-02-06 Endochoice, Inc. Flexible electronic circuit board for a multi-camera endoscope
US9397153B2 (en) 2013-09-23 2016-07-19 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device
US9613870B2 (en) * 2015-06-30 2017-04-04 International Business Machines Corporation Gate stack formed with interrupted deposition processes and laser annealing
US11984506B2 (en) * 2020-06-25 2024-05-14 Intel Corporation Field effect transistor having a gate dielectric with a dipole layer and having a gate stressor layer
JP2023026115A (ja) * 2021-08-12 2023-02-24 キオクシア株式会社 半導体装置の製造方法

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1084919C (zh) * 1992-03-05 2002-05-15 纳幕尔杜邦公司 具有精细晶粒尺寸的高介电常数介电组合物
US6159855A (en) * 1998-04-28 2000-12-12 Micron Technology, Inc. Organometallic compound mixtures in chemical vapor deposition
EP1143501A4 (en) * 1998-12-16 2005-02-02 Tokyo Electron Ltd METHOD FOR PRODUCING A THIN LAYER
JP2001015739A (ja) * 1999-06-30 2001-01-19 Nec Corp ゲート絶縁膜とその製造方法
JP4731694B2 (ja) * 2000-07-21 2011-07-27 東京エレクトロン株式会社 半導体装置の製造方法および基板処理装置
JP4644359B2 (ja) * 2000-11-30 2011-03-02 ルネサスエレクトロニクス株式会社 成膜方法
US20020167005A1 (en) * 2001-05-11 2002-11-14 Motorola, Inc Semiconductor structure including low-leakage, high crystalline dielectric materials and methods of forming same
US6674138B1 (en) * 2001-12-31 2004-01-06 Advanced Micro Devices, Inc. Use of high-k dielectric materials in modified ONO structure for semiconductor devices
US6767795B2 (en) * 2002-01-17 2004-07-27 Micron Technology, Inc. Highly reliable amorphous high-k gate dielectric ZrOXNY

Also Published As

Publication number Publication date
WO2004001833A1 (ja) 2003-12-31
TW200408005A (en) 2004-05-16
JP4171250B2 (ja) 2008-10-22
US6953731B2 (en) 2005-10-11
KR100636486B1 (ko) 2006-10-18
KR20050007610A (ko) 2005-01-19
US20030236001A1 (en) 2003-12-25
TWI233648B (en) 2005-06-01
CN100388438C (zh) 2008-05-14
JP2004022991A (ja) 2004-01-22

Similar Documents

Publication Publication Date Title
JP4512098B2 (ja) 半導体装置の製造方法及び基板処理装置
US8563444B2 (en) ALD of metal silicate films
JP4281082B2 (ja) 堆積前の表面調整方法
US7871883B2 (en) Method of manufacturing semiconductor device includes the step of depositing the capacitor insulating film in a form of a hafnium silicate
KR100819318B1 (ko) 반도체 장치의 제조방법
US8765616B2 (en) Zirconium-doped tantalum oxide films
US8399365B2 (en) Methods of forming titanium silicon oxide
CN1663031A (zh) 半导体装置的制造方法
JP2007516599A (ja) ゲルマニウム上の堆積前の表面調製
JP2004529489A (ja) 高誘電率ゲート絶縁層の形成方法
KR20140144222A (ko) 원자층 퇴적
JPWO2005071723A1 (ja) 半導体装置の製造方法および基板処理装置
US6866890B2 (en) Method of forming a dielectric film
JP2007528602A (ja) 高誘電率集積用のシリコンゲルマニウム表面層
JP2020133002A (ja) 反応チャンバーにおいて循環堆積プロセスにより基材上に酸化ハフニウムランタン膜を堆積させるための方法
KR100562731B1 (ko) 고유전율 게이트 산화막상의 강유전체 박막의mocvd용 시드층 프로세스
JP5264163B2 (ja) 絶縁膜の形成方法
JP4224044B2 (ja) 半導体装置の製造方法
JP2008258614A (ja) 基板上への酸窒化物薄膜の成長方法
KR100382370B1 (ko) 어닐링장치의 서셉터 전처리방법
KR102305940B1 (ko) 가열 방법, 성막 방법, 반도체 장치의 제조 방법, 및 성막 장치
JP4416354B2 (ja) 半導体装置の製造方法とその製造装置
JP2005129819A (ja) 半導体装置の製造方法
TW202437476A (zh) 具有封蓋層的半導體元件
JP2519586B2 (ja) 半導体装置の製造方法およびその製造装置

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20080514

Termination date: 20150603

EXPY Termination of patent right or utility model