CN1618122A - Gaas基半导体结构上的氧化层及其形成方法 - Google Patents

Gaas基半导体结构上的氧化层及其形成方法 Download PDF

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CN1618122A
CN1618122A CNA028276825A CN02827682A CN1618122A CN 1618122 A CN1618122 A CN 1618122A CN A028276825 A CNA028276825 A CN A028276825A CN 02827682 A CN02827682 A CN 02827682A CN 1618122 A CN1618122 A CN 1618122A
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layer
semiconductor structure
oxide
gaas
gaas base
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CN1333445C (zh
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马提亚斯·帕斯莱克
小尼古拉斯·威廉·梅登多普
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NXP USA Inc
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Abstract

一种化合物半导体结构，包括位于支撑半导体结构(7)上的镓氧化物的第一层(8)，从而与之形成界面。在第一层上设置Ga－Gd氧化物的第二层(9)。GaAs基支撑半导体结构可以是GaAs基异质结构，如至少部分完成的半导体器件(例如金属氧化物场效应晶体管(430)、异质结双极晶体管(310)或半导体激光器)。按照这样的方式，由于介电结构由紧接着Ga－Gd氧化物层的Ga2O3层形成，提供了同时在氧化物－GaAs界面具有低缺陷密度和具有低氧化物漏电流密度的介电层结构。Ga2O3层用于形成与GaAs基支撑半导体结构的高质量界面，同时Ga－Gd氧化物提供低氧化物漏电流密度。

Description

GAAS基半导体结构上 的氧化层及其形成方法
技术领域
本发明一般涉及包括在GaAs基半导体结构上形成的介电氧化层的制品。
背景技术
在半导体技术中，经常需要在各种支撑结构上形成介电层或薄膜，如场效应晶体管中的栅绝缘体，覆盖其它类型的晶体管如HBT等的各种区域(例如非本征基极区)的绝缘层或钝化层，围绕垂直空腔表面发射激光器或边缘发射激光器的台面或壁的绝缘层或钝化层，等等。不管如何使用，通常都要求介电层或薄膜是低缺陷密度的良好绝缘体，以使器件能够工作并增强/维持器件性能。同样，该层的厚度必须足以提供所需的半导体器件特性，例如漏电流、可靠性等等。
由于在砷化镓(GaAs)基半导体上缺乏具有低界面态密度和稳定的器件工作的绝缘层，数字以及模拟GaAs基器件和电路的性能、集成度和适销性受到很大的限制。正如本领域已知的那样，通过氧化GaAs基材料生长的氧化膜导致高界面态密度和在GaAs氧化物界面处被钉扎的费米能级。
例如，在M.Passlack等人的Journal of Vacuum Science& Technology，vol.17，49(1999)和美国专利6,030,453 and 6,094,295中公开了形成Ga2O3薄膜的方法。正如在这些参考文献中所讨论的那样，采用在GaAs基外延层上原位沉积镓氧化物分子同时保持超高真空(UHV)，制造高质量的Ga2O3/GaAs界面。这样制造的Ga2O3/GaAs界面具有5,000-30,000cm/s的界面复合速率S和低至3.5×1010cm-2eV-1的界面态密度Dit。然而，由于高氧化物体俘获密度和太大的漏电流，采用这种技术制造的镓氧化物的性能对于许多应用是不够的。结果，单极和双极器件的性能受到影响，制造稳定和可靠的、基于化合物半导体的金属氧化物半导体场效应晶体管(MOSFET)存在着问题。
正如在美国专利6,159,834中讨论的那样，已经确定前述的技术不能制造高质量的Ga2O3层，因为该层中的氧空位产生导致不可接受的氧化物俘获密度的缺陷。专利’834通过向晶片结构的表面上引入镓氧化物的分子束以启动氧化物沉积、并且在完成第一1-2单层的Ga2O3时提供第二束原子氧而克服该问题。通过从晶体Ga2O3或镓酸盐源热蒸发而提供镓氧化物的分子束，通过RF或微波等离子体放电、热分解或中性电子受激解吸原子源(neutral electron stimulated desorptionatom source)中的任一种而提供氧原子束。这种制造技术通过降低与氧缺陷相关的氧密度同时维持优良质量的Ga2O3-GaAs界面而提高了Ga2O3层的质量。然而，氧化物体俘获密度仍然过高，并观察到很大的漏电流。
作为Ga2O3的代替，钆镓氧化物(Ga2O3(Gd2O3))已经被用作GaAs基器件上的介电层。尽管这种氧化层具有可接受的低漏电流密度，Ga2O3(Gd2O3)-GaAs界面态密度较高，导致不能接受的器件性能。
因此，需要提供一种GaAs基器件上的介电层结构，该器件同时具有低缺陷密度的氧化物-GaAs界面和低氧化物漏电流密度。
发明内容
结合其它方面，本发明提供一种新的、改进的制造栅质量Ga2O3化合物半导体结构的方法。本发明也提供了一种制造其中与氧空位相关的缺陷密度对于MOSFET应用适当的栅质量Ga2O3化合物半导体结构的新的、改进的方法。
按照本发明的一个实施方式，提供一种化合物半导体结构，该半导体结构包括GaAs基支撑半导体结构。第一层镓氧化物位于该支撑半导体结构的表面上，从而与之形成界面。第二层Ga-Gd氧化物被设置在第一层上。
在本发明的一个特定实施方式中，该Ga-Gd氧化物是Gd3Ga5O12。
在本发明的另一个实施方式中，GaAs基支撑半导体结构是GaAs基异质结构，如至少部分完成的半导体器件。在本发明的一些实施方式中，部分完成的半导体器件例如可以是金属氧化物场效应晶体管、异质结双极晶体管或半导体激光器。
按照本发明的另一个实施方式，提供一种在支撑半导体结构上形成介电层结构的方法。该方法开始是提供具有介电层结构将位于其上的表面的GaAs基支撑半导体结构。在该支撑结构的表面上沉积第一层Ga2O3。在该第一层上沉积第二层Ga-Gd氧化物。按这样的方式，提供同时在氧化物-GaAs界面处具有低缺陷密度和低氧化物漏电流密度的介电层结构，因为该介电结构由紧接着Ga-Gd氧化物层的Ga2O3层形成。该Ga2O3层用于形成与GaAs基支撑半导体结构之间的高质量界面，同时Ga-Gd氧化物提供低氧化物漏电流密度。
附图说明
图1是按照本发明的其上沉积有复合介电层结构的部分半导体结构的简化截面图；
图2说明在按照本发明的一种实施方式制造图1的结构中使用的超高真空(UHV)分子束外延系统；
图3是结合本发明的HBT的简化横截面图；
图4是结合本发明的金属氧化物半导体FET的简化横截面图。
具体实施方式
本发明人已经令人吃惊地确定可以由紧接着Ga-Gd氧化层的镓氧化物/GaAs界面形成高质量的、低缺陷的介电层结构。相反，现有技术的介电层或者由镓氧化物/GaAs界面、或者由Ga-Gd氧化物/GaAs界面组成。
具体参照图1，说明按照本发明其上沉积有介电层结构的部分半导体结构的简化截面图。部分半导体结构包括GaAs基支撑半导体结构7，为了简化而以单层说明。基本上，结构7包括任何半导体衬底、外延层、异质结构或其组合，具有将由介电层结构涂敷的表面。通常，该衬底是GaAs或GaAs基材料(III-V材料)，而外延层是接任何公知的工艺在衬底上外延生长的GaAs基材料。
复合介电结构5包括形成在支撑半导体结构7的表面上的第一层8和形成在层8上的第二层9。正如将解释的那样，层8通过在支撑半导体结构7的表面上沉积一层Ga2O3而形成。层8提供了GaAs基支撑半导体结构7上的低界面态密度。然后第二层材料(层9)被沉积在层8上，从而形成复合介电结构5，该层具有比Ga2O3低的体俘获密度。
复合介电结构5可以在制造工艺过程中任何方便的时间形成，例如在结构7中所包括的任一或所有层的外延生长之后在生长室中原位形成。Ga2O3层8可以采用本领域的普通技术人员可获得的任何技术来形成。例如，Ga2O3层8可以通过例如在美国专利6,030,453、6,094,295和6,159,834中讨论的在UHV条件下热蒸发晶体Ga2O3或镓酸盐来形成。或者，Ga2O3层8可以通过本领域已知的其它合适的技术来形成，如通过提供特定选择材料的高纯单晶源并采用热蒸发、电子束蒸发和激光烧蚀中的一种蒸发该源。正如前面提到的，当在GaAs基材料上形成仅包括Ga2O3的介电层时，氧化物体俘获密度高到不可接受。为了克服这一问题，在本发明中Ga2O3层8只是厚度足以基本上覆盖GaAs表面，并防止来自随后形成的层9的Gd扩散到GaAs-Ga2O3界面。通常，层8的最小厚度由整个结构的热动力学稳定性需要来决定。所允许的层8的最大厚度由体俘获分布和密度以及半导体器件性能需求来决定。例如，在本发明的一些实施方式中，形成的Ga2O3层8的厚度通常在0.5nm到10nm的范围内，并且更优选为在2-5nm的范围内。
正如前面提到的，一旦Ga2O3层8已经形成，在Ga2O3层8上沉积层9以完成复合介电结构5。层9由体俘获密度比Ga2O3低的材料形成。特别地，按照本发明，层9是Ga-Gd氧化物，该氧化物是包含Ga、Gd和氧的混合氧化物。在本发明的一些特定实施方式中，Ga-Gd氧化物是Gd3Ga5O12。尽管不限于本发明，目前相信Gd是用于将Ga稳定在3+氧化态的稳定剂元素。应当理解，在混合氧化物薄膜中Ga基本上完全氧化的要求并不表示所有的Ga离子100％地必须处于3+离子态。例如，如果所有Ga离子中80％或更多处于3+态，就可以得到可接受的结果。层9的最小厚度由半导体器件性能要求来决定。通常，层9的厚度在大约2nm到1000nm的范围内，并且更优选地在5-20nm的范围内。
本发明有利地实现了同时在氧化物-GaAs界面具有低缺陷密度并且由于Ga-Gd氧化物被沉积在Ga2O3层8上而具有低氧化物漏电流密度的介电层结构，这第一次用于形成与GaAs基支撑半导体结构之间的高质量界面。也即，本发明采用由紧接着Ga-Gd氧化物层的Ga2O3层形成的复合介电结构。
图2说明在按照本发明的一个实施方式制造图1中的复合介电结构5中使用的超高真空(UHV)分子束外延(MBE)系统。系统20包括UHV室21、高温射流单元22和29、原子氧源23、单元挡板24、31和28、衬底固定器25如台板。当然，应当理解系统20可以允许同时制造多个晶片和/或包括常规地用在MBE中但没有在图2中示出的其它标准源，例如Ga、As、Al、In、Ge等射流单元。
在采用Ga-Gd氧化物如Gd3Ga5O12作为复合介电结构第二层9的特定实施方式中，具有原子有序且化学清洁的上表面15的GaAs基支撑半导体结构7被安装到衬底固定器25上并加载到UHV室21中。随后，半导体结构7按照本领域的技术人员公知的原则被加热到合适的升高的温度。采用高温射流单元22使晶体Ga2O3或镓酸盐源热蒸发。通过打开单元挡板24并提供导向上表面15的镓氧化物26的分子束，启动Ga2O3分子在半导体结构7的原子有序且化学清洁的上表面15上的沉积，从而在衬底上形成初始的镓氧化物层。
初始的镓氧化物层的质量可以通过随镓氧化物一起沉积原子氧而提高，以降低产生缺陷的氧空位。特别地，在打开单元挡板24之后，通过打开原子氧源23的挡板28，将一束原子氧27导向半导体结构7的上表面15。该挡板可以在初始Ga2O3沉积过程中的任何时间打开，优选地在已经沉积1-2单层的Ga2O3之后，因为对于Ga2O3-GaAs界面的低界面态密度，GaAs的表面氧化要完全消除。
然后，通过沉积Gd同时继续沉积Ga2O3而形成Ga-Gd氧化层。如Gd3Ga5O12的Gd源材料，优选地按高纯度、单晶的形式，采用高温射流单元29热蒸发。通过在Ga2O3沉积开始之后的某一时间打开单元挡板31而启动Gd的沉积。然而，Gd沉积可以在将半导体结构7暴露于原子氧束之前或随后开始。本领域的技术人员将认识到在半导体结构7上形成的复合介电结构5的性能如化学计量比可以通过调节Ga2O3射流单元22、Gd射流单元29和原子氧单元23的通量来控制，
结合前术介电层结构的半导体器件的特定例子如图3-4所示。具体地，参照图3，说明按照本发明形成的异质结双极晶体管(HBT)310的简化横截面图。按照这种简化的形式，HBT310包括衬底311、形成在衬底311上表面上的集电极层312(生长或不同的沉积)、形成在集电极层312上表面上的基极层313和形成在基极层313上表面上的发射极层314。在集电极层312上表面上形成集电极接触或接触315。在基极层313上表面上形成基极接触或接触316。在发射极层314上表面上形成发射极接触317。所有的这些不同的层和接触按照公知的方式形成，并且可以按照对于特定器件或采用的制造技术方便的任何顺序形成。通常，衬底311是GaAs基材料，并且层312、313和314中使用的所有材料是类似的材料系统，使得它们在结晶学上耦合。正如本领域所公知的那样，这可以通过按顺序在标准的生长室中外延生长各层来实现。
在发射极层314和基极层313的露出部分上形成复合介电层结构320，以钝化并增强器件性能和稳定性。如以上解释的那样，可以在超高真空条件下去除自然氧化物之后的制造步骤过程中的任何方便的时间形成介电层结构320。复合介电层结构320包括第一层321和第二层322。第一层321是Ga2O3薄层并对应于图1中的层8。第二层322是Ga-Gd氧化物层并对应于图1中的层9。第一和第二层321和322按照前述的步骤形成，典型地在形成接触315和316之后。形成的复合介电层结构320的厚度大于大约50埃，并且优选地在大约70埃到250埃的范围内。
图4说明按照本发明构造的半导体场效应晶体管FET 430简化横截面图。FET 430包括分别具有重掺杂的源和漏区域432和433的衬底431，以及在其中形成的二者之间的沟道区434。衬底431是GaAs基材料。按照本发明，在沟道区434上形成复合介电层结构435(通常指栅氧化物)。介电层结构435包括Ga2O3第一层440和Ga-Gd氧化物第二层442。栅金属接触436按通常的工序形成在介电层结构435上，源和漏接触437和438分别形成在源和漏区432和433上。
应当理解，图3-4所描述的半导体器件只是以示例说明的形式给出，本发明更一般地可应用到在各种不同的半导体器件上形成的复合介电结构，例如半导体激光器和光敏器件。
尽管本文具体地说明和描述了各种实施方式，但应当理解，本发明的修改和变动也在上述教授的范围内，并且在权利要求的范围内，而没有背离本发明的精神和想要包括的范围。

Claims (13)

1.一种化合物半导体结构，包括：
GaAs基支撑半导体结构；
镓氧化物第一层，位于支撑半导体结构的表面上从而与之形成界面；以及
Ga-Gd氧化物第二层，设置在第一层上。
2.根据权利要求1的化合物半导体结构，其中所述Ga-Gd氧化物是Gd3Ga5O12。
3.根据权利要求1的化合物半导体结构，其中所述GaAs基支撑半导体结构是GaAs基异质结构。
4.根据权利要求3的化合物半导体结构，其中所述GaAs基支撑半导体结构是至少部分完成的金属氧化物场效应晶体管。
5.根据权利要求3的化合物半导体结构，其中所述GaAs基支撑半导体结构是至少部分完成的异质结双极晶体管。
6.一种在支撑半导体结构上形成介电层结构的方法，包括以下步骤：
提供GaAs基支撑半导体结构；
在支撑结构的表面上沉积镓氧化物第一层；以及
在第一层上沉积Ga-Gd氧化物第二层。
7.根据权利要求6的方法，其中所述沉积镓氧化物层的步骤包括通过蒸发沉积镓氧化物层。
8.根据权利要求7的方法，其中通过蒸发在支撑半导体结构的表面上沉积镓氧化物层的步骤包括热蒸发、电子束蒸发和激光烧蚀中的一种。
9.根据权利要求8的方法，还包括在至少部分所述沉积镓氧化物层的步骤期间蒸发原子氧的步骤。
10.根据权利要求9的方法，其中所述蒸发原子氧的步骤在已经在支撑半导体结构的表面沉积至少一个单层的镓氧化物之后开始。
11.根据权利要求6的方法，其中所述GaAs基支撑半导体结构是GaAs基异质结构。
12.根据权利要求11的方法，其中所述GaAs基支撑半导体结构是至少部分完成的金属氧化物场效应晶体管。
13.根据权利要求11的方法，其中所述GaAs基支撑半导体结构是至少部分完成的异质结双极晶体管。
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US20050221623A1 (en) 2005-10-06
US20040248427A1 (en) 2004-12-09
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