CN1568541A - 具有改进的散热能力的半导体器件封装 - Google Patents
具有改进的散热能力的半导体器件封装 Download PDFInfo
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- CN1568541A CN1568541A CNA028201590A CN02820159A CN1568541A CN 1568541 A CN1568541 A CN 1568541A CN A028201590 A CNA028201590 A CN A028201590A CN 02820159 A CN02820159 A CN 02820159A CN 1568541 A CN1568541 A CN 1568541A
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Abstract
一种芯片级封装包括半导体MOSFET芯片模,该芯片模带有覆盖以光敏液体环氧树脂的上部电极表面,所述光敏液体环氧树脂被光刻构图以露出电极表面部分,并且起到了钝化层和焊接掩膜的作用。随后在钝化层上形成可焊接触点层。单个芯片模被以漏极一侧向下的方式安装在金属夹具内,或者可以按照使漏极与从密封封装底部伸出的凸缘共面的方式安装。所述金属夹具或漏极夹具带有多个平行间隔的、从其朝外的表面延伸的散热片。
Description
相关申请
本发明要求2001年10月10日提交的题为“SEMICONDUCTOR DEVICEPACKAGE WITH IMPROVED COOLING”的美国第60/3328,362号临时申请的优先权权益,该文被结合到本文中用作参考。
发明领域
本发明涉及半导体器件封装,尤其涉及带有用于提高散热能力的翼片式散热器的半导体器件封装。
发明背景
本发明涉及半导体器件,尤其涉及对一种新颖半导体器件的低成本制造方法。
在现有技术的半导体器件中,罩壳面积通常是其内包含的半导体芯片模(semiconductor die)面积的许多倍。进一步,在许多公知的半导体器件中,热量仅仅从芯片模的一侧(通常是底面)排出。另外,用于制造现有技术半导体器件的方法是昂贵的,在使用单器件处理技术时,尤其如此。
在目前公知的半导体芯片模中,特别是在金属氧化物半导体门控芯片模(MOSgated die)中,顶部电极(源极)通常是含有约1.0%的硅的铝触点(下文称铝触点)。使用铝触点是因为其很适于晶片制造过程。然而,形成与这种铝触点的电相连是困难的。因而,经常使用丝焊(wire bond)处理以将导线超声粘合在下面的铝触点上。这些丝焊连接的面积有限,并因此成为工作中电阻(RDSON)和产热的来源。但是,传统的MOS门控芯片模的底部漏极触点通常是三层金属的,它很容易被焊接或者电连接到大面积接触表面,而且不需要如第5,451,544号美国专利所示出的丝焊操作。因而,即使大部分的热量是在顶部表面的结和丝焊处产生,热量也主要从硅芯片模的后接触面排出。因而希望以改进的方式将底部漏极的热排出。
众所周知,如美国专利第5,047,833号专利所示,可在芯片模的顶面做出可焊接的顶触点。然而,用于这类可焊接顶触点结构的封装相对于芯片模面积来说,其“覆盖区”非常大。
希望提供这样一种半导体器件及其制造方法,以使半导体器件在电路上占据较小的面积,并具有比现有的半导体器件更低的电阻(RDSON)。
进而希望提供一种批量制造这种器件的方法,该方法需要的其生产线上的设备较少,并且成本较低。
在公知器件中,MOS门控器件晶片的源极端覆盖有钝化层(其优选地为光敏液体环氧树脂层或硅氮化物层等)。为形成该钝化层,需通过旋转涂布(spinning)、掩模(screening)或其它方法将液体环氧树脂淀积覆盖在晶片表面上。该材料随即被干燥,并利用标准光刻和掩膜技术使被涂覆的晶片暴露,从而在钝化层形成多个开口以制成多个隔开的下层源极金属的暴露表面区域,并形成类似的开口用来暴露晶片上每个芯片模的下方栅极。因而,该钝化层不仅起到了常规钝化层的作用,而且还进一步起到了用于指定焊接区域并确定其形状的电镀保护层(如果需要的话)和焊接掩膜的作用。新的钝化层上的开口可到达下面的常规可焊接顶部金属(例如钛/钨/镍/银金属)。可选地,如果下面的金属是更常规的铝金属,则暴露的铝可利用钝化层作为电镀保护层而被镀上镍和金焊瘤(gold flash)或其他系列金属,结果形成了可焊接表面。和常用的丝焊与铝电极的高阻抗连接相比较,被镀金属段的上部很容易被焊接或者低阻抗接触。
源极触点区域可具有各种几何形状,并且甚至能够构成单块的大面积区域。
晶片随后被据开或以别的方式被分开形成单个的芯片模。随后布置单个的芯片模,使其源极端向下,并利用导电环氧树脂或焊料等将一个U形、L形或杯形的部分电镀的漏极夹具与芯片模的可焊接的漏极端连接,以将该漏极夹具与芯片模的底部漏极粘合在一起。漏极夹具接头(post)的底部可与芯片模的源极端表面(也就是触点凸起的顶部)相共面,或者可使源极端表面相对于接头的底部向内偏斜,以提高可靠性。芯片模的外表面随后在模子承载盘(mold tray)内包覆成型(overmold)。带有这种漏极夹具的大量芯片模可同时在模子承载盘内模制。
可通过对该组件全部或部分包覆成型或利用钝化材料填料带(filet)保护粘结材料。可使用引线框、连续带,或通过将多个器件模制在一个模块内并将这些器件从该模块内单独分出,以将这些部件制成产品。
模制之后,器件受到测试、打上激光标记并被再次锯成单个器件。
这种器件在2001年3月28日提交的名为“CHIP SCALE SURFACEMOUNTED DEVICE AND PROCESS OF MANUFACTURE”、序列号为09/819,774的共同未决申请中示出。该说明被引入到本文中以用作参考。
发明的简要说明
根据本发明,芯片模的底部(也就是半导体芯片模的面朝上的漏极或其他功率触点)至少与带有翼片结构的导热散热器热连接。这种结构在诸如服务器(其中散热器的厚度可达几个毫米)的采用强迫空气冷却的应用中,或者是在笔记本或其它的应用(其中散热器的厚度可能只有1/2毫米厚)中,尤其有用。散热器可通过导电焊料或诸如填充了银的环氧树脂的导电粘结剂连接到芯片模。散热器本身可由任何适当的传导材料,例如铝或金属母体聚合物(metal-matrix polymer)/环氧树脂(epoxy),通过挤压、成型或模制而制成。
附图的简要说明
图1是可根据本发明来封装的单个功率MOSFET芯片模的俯视图;
图2沿图1的剖面线2-2获取的图1的剖面图;
图3是图1的芯片模在经过处理之后以形成多个分开的“可焊接的”源极触点区和一个“可焊接的”栅极区的俯视图;
图4是沿图3的剖面线4-4获取的图3的剖面图;
图5是带有改进的源极接触图案的芯片模的与图3相类似的视图;
图6是进一步带有大面积“可焊接的”源极接触图案的类似于图3和图5视图;
图7是更进一步具有的触点拓扑结构(带有角部栅极)的俯视图;
图8是沿图7的剖面线8-8获取的图7的剖面图;
图9是可根据本发明改进的漏极夹具的立体图;
图10是图9所示漏极夹具的俯视图,在该夹具中形成有模锁开口;
图11是图3和图4所示芯片模和图9所示夹具的分组件的仰视图;
图12是沿图11的剖面线12-12获取的图11的剖面图;
图13示出了在模子承载盘中包覆成形之后的图11和12的分组件;
图14是沿图1 3的剖面线14-14获取的图13的剖面图;
图15是沿图13的剖面线15-15获取的图13的剖面图;
图16是可根据本发明改进的漏极夹具的另一实施例的立体图;
图17是图16所示夹具的俯视图。
图18是图16和17的夹具与图3和图4所示的通用芯片模的组件集在包覆成形之后的仰视图;
图19是沿图18的剖面线19-19获取的图18的剖面图;
图20是具有图7和图8所示拓扑结构的芯片模的杯状漏极夹具的仰视图;
图21是沿图20的剖面线21-21获取的图20的剖面图;
图22示出了单独分离之前的MOSFET芯片模的晶片;
图23示出了用于在图22所示的晶片的源极表面上对钝化层进行成形和构图的过程步骤;
图24示出了在图23的钝化层上的金属化处理;
图25是根据本发明的新颖的漏极夹具的等距视图;
图26是图25所示夹具的俯视平面图;
图27是图26的侧视平面图;
图28是本发明的应用于芯片模和支撑板的改进的漏极夹具的分解立体图;
图29示出了组合后的图25的夹具的结构;
图30是图29的主视平面图;
图31是图30所示器件的局部放大图;
图32a和32b示出了根据可选实施例的夹具的侧视图和俯视图。
附图的详细说明
本发明提供了一种新颖的半导体芯片模封装,其在芯片模的相对表面上带有功率或其他电极,并且可利用低成本制造技术制成两个电极以便表面安装在一公共支撑面上(例如,在改善了散热能力的印刷电路板上的金属化图案)的表面上成为可能。虽然本发明是参照一个表面带有栅极和源极电极、相对表面带有漏极电极的垂直传导功率MOSFET(金属氧化物半导体场效应晶体管)来描述的,但本发明同样可适用于具有不同的拓扑的绝缘栅双极性晶体管(IGBT)、半导体闸流管、二极管等等。
因而,正如将看到的,新颖的芯片模夹具包围并至少与后端电极(MOSFET中的漏极)的一部分相连,并且该夹具的至少一个接头在芯片模的边缘上延伸并终止于与前表面触点(MOSFET中的源极和栅极)共面但绝缘的平面,而且该芯片模夹具可起到良好的散热器的作用。器件随后在芯片模和夹具的后面和侧面的周围包覆成型,以使用于所有芯片模电极的平的、共面的、可焊接的触点表面位于安装表面上。
在芯片模处于晶片阶段时,通过利用新颖的焊接掩膜以在芯片模顶表面形成很容易焊接的触点表面,就可形成全部的顶部触点表面。在芯片模分离之后,漏极夹具被连接到芯片模,并且在批量模制过程中被并被包覆成型。
图1示出了可应用本发明的一种典型的功率MOSFET 30。芯片模30可以是美国专利5,795,793所示的类型,也可以是任何一种包括含有结的硅衬底31、顶部铝制(也就是带有1.0%硅的铝)源极32、铝制栅极33和可以是常规的易于焊接的三层金属的底部漏极34(图2)的芯片模。顶部铝层可以是任何其他合适的金属材料。与铝电极32和33的连接一般通过丝焊实现。
如随后将描述的,多个易于焊接的触点接头(post)36被固定在源极32上(或形成于其上),并且触点接头37被固定于栅极33,如图3和图4所示。在芯片模的顶面金属为银的情况下,触点36和37与钝化厚度基本平齐(subflush),而在芯片模的顶部金属为镀铝的情况下,大约与钝化厚度的一半平齐。平面触点顶面是共面的。与这些触点表面的接触是通过焊膏实现的,焊膏的最小可镀焊料厚度大约为层38的厚度的4到5倍。层38是驻留在芯片模上表面上的钝化层。
触点36的图案可以采取不同的形式,如图5、图11和图18所示。另外,对于图6、图7和图8中所示的芯片模而言,也可使用大面积可焊接触点(如源极触点40)。用于形成触点36、37和40的金属化过程将随后描述。
在形成带有如图3到图8所示的制备好的芯片模的封装时,采用图9所示的镀有(或部分镀有)金属的导电夹具45。夹具45可以是带有至少部分待与其他表面进行接触的镀银表面的铜合金。如随后将描述的,夹具45被改进成带有用于促进散热的翼片。
夹具45具有普通的“U”形形状,它带有浅的接头46。接头46的长度稍大于由表面47到柱36,37的自由表面所测得的芯片模31的厚度与用于连接漏极和夹具的平面薄连接板(web)48的被镀内表面47的粘合剂的厚度之和。例如,沿接头45的全长,夹具可具有0.7毫米的总厚,而从表面47到接头46的自由端的长度大约为0.39毫米。接头46之间的距离取决于芯片模的大小,并且国际整流器公司(International Rectifier Corporation)的4.6大小的芯片模采用的是5.6毫米的距离,每个接头46的整体宽度大约为1.5毫米。
如图10所示,也可在夹具45中形成模锁(mold lock)开口48和49。
芯片模30的可焊接的底部漏极34通过如图12、29、30和31所示的导电粘结剂60电连接并固定到漏极夹具45的被镀的内部。举例来说,粘结剂可以是装有银的可适当固化的环氧树脂材料。在芯片模30的侧边和夹具45的接头46的相对侧之间留有缺口61和62。
在所示的实施例中,结构的尺寸被做成可以使接头46的自由表面(漏极连接器)和接头36和37共面。在优选实施例中,芯片模的源极可相对于接头46的自由表面向内偏移,以提高器件的可靠性。
随后如图13、14和15所示,图11和12所示的器件用模子承载盘内的模子化合物(mold compound)70包覆成型。除了接头46的外部自由表面外,模子化合物70覆盖了夹具45的全部暴露的外表面。如图13和图15所示,模子化合物填充入缺口61和62。器件现在准备好了用于表面安装到印刷电路板的与触点36、37和46对齐的导电轨迹上。
图16到19示出了可根据本发明修改的采用不同的夹具几何形状的器件的另一个实施例。因而,图16和图17所示的夹具80带有连接板(web)81和三段凸出的接头82、83和84。如图18和19所示,带有凸出触点36和37的芯片模30的漏极触点(未示出)首先被粘附至连接板81,从而使触点36、37和漏极夹具凸起82、83和84的自由表面位于同一平面。器件随后在适当的模子承载盘中被模子化合物70包覆成型。
图20和21示出了可根据本发明修改的封装的另外一个实施例,其中图7和图8所示的芯片模被安装在镀银铜合金的杯状夹具100内。夹具100内部区域的长度和宽度比芯片模30的要大,而且芯片模30的底部漏极通过固化的含银(导电的)环氧树脂102连接到内部的连接板表面101(图21)。最佳地,可在芯片模边缘周围涂布一圈低应力、高粘性的环氧树脂103,用以密封封装并增加封装的结构强度。
可焊接触点40的顶部表面与漏极夹具凸起表面105是共面的。因而,所有触点105、40和37将与印刷电路板上的触点轨迹对齐。漏极触点可采用任何适当的形式,如果需要,它也可能包含单一的触点或端。
图22到图24示出了用于在传统芯片模的铝电极上形成导电接头的过程。如图所示,在芯片模分离(singulation)之前,晶片110内带有多个相同的芯片模,每个芯片模带有栅极37和单独的源极(未标号)。在仍处于晶片形式的情况下,晶片110的顶部表面被涂上可感光成像的焊接掩膜111。焊接掩膜111是光敏液体环氧树脂,其可以起到钝化层、电镀抗蚀剂(如果需要的话)以及用于指定和定形焊接区的焊接掩膜的左右。然而,也可使用其他的阻焊材料,例如硅氮化物。利用常规的标线(reticule),可以形成多个穿过焊接掩膜到达下面的芯片模顶部金属上的源极和栅极触点的开口111a到111d。也可使用激光蚀刻方法来形成这些开口。
如图24所示,一系列的金属112随后被镀在晶片的表面上,金属镀层粘结到通过开口111a到111d暴露的源极32(以及其他电极) 的金属上,从而形成源极触点112a到112d以及类似的栅极触点。金属112a到112d可由与铝良好接触的第一个镍层以及随后的金焊瘤(gold flash)组成。可选地,镍层之后可跟着铜层或锡层等等,最后是易于焊接的金属顶部表面,如银。
晶片随后被锯开以从例如线112和113处分开芯片模,由此使芯片模分开(singulated)。典型的芯片模30具有如图3到图8所示的外观,并带有多个从绝缘表面38向上凸起的可焊接的源极触点和栅极触点。
分开的芯片模随后以漏极源极端向下的方式被放入导电夹具,夹具的内部镀有银或其他导电涂层。用常规的粘合材料,例如前述的导电环氧树脂,将芯片模粘结到夹具上。夹具/密封外壳(can)可以采用引线框(lead frame)的形式,而器件可以随后被从引线框上分开。
根据本发明,可以改进夹具45(或80或100)以改善芯片模30产生的热的消散。例如,参照图25到27,经过改进的夹具45包括连接板部分201,其带有自由表面,多个散热片200从该自由表面上向外延伸。依照本发明的一个方面,连接板部分201可以具有增加的厚度以更好地采热和散热。在如图25-27所示的实施例中,夹具45包括两个接头46,它们布置于连接板部分201相对的两边,并从连接板部分201的与芯片模30的电极电连接的表面向外延展,这将随后解释。多个散热片200、两个接头46和连接板部分201彼此整体连接并形成了一个单体(unitary body),该单体可由铝、金属母体聚合物、铜、铜合金或其他适当的导热材料通过挤压、模制或其他适当的方法制成。当然,应该意识到,根据本发明的夹具不必局限于图25-27所示的结构,它也可以例如包括放置在其他位置的更少或更多的接头。
现在参照图28到图29,芯片模30的后部漏极34通过焊料或填充有银的导电环氧树脂可导电地连接到夹具45。因而,该结构可连接到PCB或其他安装板210上,这些板上带有用以接纳源极和栅极32、33的适当的轨迹(未示出),同时接头46也可连接到板210上的漏极触点图案。特别参照图30和图31,接头46利用绝缘填充物103与芯片模30的边缘绝缘。
在芯片模/板210粘合线内,栅极和源极32、33以及漏极46利用钝化处理被分开,这与前述制造方法中所使用的处理相似。
依照本发明的器件不仅限于带有用于散去所产热量的散热片的夹具;也可使用其他的散热结构。
例如,如图32a和32b所示,依照本发明的另一个实施例所述,可以利用带有一排散热片的夹具来改善空气流动。这种夹具上的每个翼片都是能够散热但不限制流过散热表面的气流的台面(mesa)式结构。
为了改善夹具与电路板上的触点的可焊接性,夹具可涂以容易焊接的材料,如镍、镍-金、镍-钯或银。另外,依照本发明的夹具可以涂有高辐射性的涂层以通过辐射提高散热。
虽然本发明是结合其具体实施例描述的,但众多的变化和调整以及其他的应用对本领域的技术人员是显而易见的。因此声明,本发明不限于本文的特定说明,而只受所附权利要求的限制。
Claims (14)
1.一种半导体器件,包括:
半导体芯片模,它具有置于其第一主要表面上的第一电极以及置于其第二主要表面上的第二电极;
导电的连接板部分,它具有与所述第一电极电连接的第一主要表面;
多个导热结构,它们从所述连接板部分的第二主要表面向外延伸,所述连接板部分的所述第二主要表面与所述连接板部分的所述第一主要表面相对设置;以及
至少一个导电接头,其从所述连接板部分的一边按照远离所述连接板部分的所述第一主要表面的方向延伸。
2.根据权利要求1所述的半导体器件,其特征在于,所述导电的连接板部分通过导电粘合剂层与所述第一电极电连接。
3.根据权利要求2所述的半导体器件,其特征在于,所述导电粘合剂包含焊料。
4.根据权利要求2所述的半导体器件,其特征在于,所述导电粘合剂包含导电环氧树脂。
5.根据权利要求1所述的半导体器件,其特征在于,所述多个导热结构和所述至少一个导电接头被与所述导电的连接板部分集成在一起,由此形成一个单体。
6.根据权利要求5所述的半导体器件,其特征在于,所述单体包含导热材料。
7.根据权利要求6所述的半导体器件,其特征在于,所述单体包含铝和金属母体聚合物中的一种。
8.根据权利要求1所述的半导体器件,进一步包括置于所述芯片模与所述至少一个导电接头之间的绝缘填充物。
9.根据权利要求1所述的半导体器件,进一步包括至少另一个导电接头,其从所述连接板部分的另一边按照远离所述连接板部分的所述第一主要表面的方向延伸。
10.一种夹具包括:
导电的连接板部分,它用于与半导体芯片模的电极相粘结和电连接的第一主要表面以及和所述第一主要表面相对设置的第二主要表面;
多个翼片,其与所述导电的连接板部分的第二主要表面相连并从所述导电的连接板部分的第二主要表面向外延伸;以及
至少一个导电接头,其与所述导电的连接板部分的一边相连并从所述第一主要表面向外延伸。
11.根据权利要求10所述的夹具,其特征在于,所述多个翼片和所述至少一个导电接头与所述导电的连接板部分整体地连接在一起,由此形成一个单体。
12.根据权利要求11所述的夹具,其特征在于,所述单体包含铝。
13.根据权利要求11所述的夹具,其特征在于,所述单体包含金属母体聚合物。
14.根据权利要求10到13所述的夹具,进一步包括至少另一个导电接头,其与所述导电的连接板部分的另一边连接,并从所述连接板部分的所述第一主要表面向外延伸。
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-
2002
- 2002-10-08 US US10/267,142 patent/US6784540B2/en not_active Ceased
- 2002-10-09 WO PCT/US2002/032678 patent/WO2003032388A1/en active Application Filing
- 2002-10-09 TW TW91123353A patent/TW574749B/zh not_active IP Right Cessation
- 2002-10-09 JP JP2003535253A patent/JP4195380B2/ja not_active Expired - Fee Related
- 2002-10-09 CN CNB028201590A patent/CN1311548C/zh not_active Expired - Fee Related
-
2006
- 2006-08-31 US US11/514,327 patent/USRE41559E1/en not_active Expired - Lifetime
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102446875A (zh) * | 2010-10-13 | 2012-05-09 | 三菱电机株式会社 | 半导体装置 |
CN102446875B (zh) * | 2010-10-13 | 2016-05-25 | 三菱电机株式会社 | 半导体装置 |
CN107346348A (zh) * | 2016-05-06 | 2017-11-14 | 上海海拉电子有限公司 | 一种电子助力转向系统的散热效率计算方法 |
Also Published As
Publication number | Publication date |
---|---|
JP4195380B2 (ja) | 2008-12-10 |
JP2005506691A (ja) | 2005-03-03 |
US6784540B2 (en) | 2004-08-31 |
CN1311548C (zh) | 2007-04-18 |
WO2003032388A1 (en) | 2003-04-17 |
USRE41559E1 (en) | 2010-08-24 |
US20030067071A1 (en) | 2003-04-10 |
TW574749B (en) | 2004-02-01 |
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