CN1489197A - 生产半导体器件的方法及相应的半导体器件 - Google Patents

生产半导体器件的方法及相应的半导体器件 Download PDF

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CN1489197A
CN1489197A CNA031553052A CN03155305A CN1489197A CN 1489197 A CN1489197 A CN 1489197A CN A031553052 A CNA031553052 A CN A031553052A CN 03155305 A CN03155305 A CN 03155305A CN 1489197 A CN1489197 A CN 1489197A
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interconnection level
semiconductor device
structurized
solder
layer
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CN1245751C (zh
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����ڵ���
哈里·黑德勒
托尔斯滕·迈尔
芭芭拉·瓦斯克斯
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Infineon Technologies AG
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Infineon Technologies AG
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Abstract

本发明提供了一种生产半导体器件的方法，所述方法包括以下步骤：在半导体衬底(10)上涂覆互连级(11，12)；形成所述互连级(11，12)的结构；以及以焊料层(13)呈现出互连级(11，12)的结构的方式，在结构化的互连级(11，12)上涂覆所述焊料层(13)。本发明同样提供了这样一种半导体器件。

Description

生产半导体器件的方法及相应的半导体器件
技术领域
本发明涉及一种生产半导体器件的方法及一种相应的半导体器件。
背景技术
半导体器件通常通过BGA(球栅阵列)中的插入衬底(interposersubstrate)连接在印刷电路板上，或者直接连接在印刷电路板上，作为WLP/CSP(晶片级封装/芯片尺寸封装)。
在图4所示的传统BGA安装的情况下，半导体器件10通过焊球30和机械连接器件31与插入衬底32或基座相连。为了保护半导体器件10，以覆层33环绕半导体器件10。焊球30又用于将插入衬底32电焊接到印刷电路板34上。如图4所示，通过大椭圆中的放大投影图，通过互连35在插入衬底32中或上进行焊接或接线，例如，在所述印刷电路板技术中，互连35由铜制成，通常具有超过100μm的宽度和超过20μm的高度或厚度。从而，确保了具有较低互连电阻的良好电连接，尽管这导致了装置较大的整体体积或较大的外形尺寸。
另一方面，在图5中示出了传统的WLP/CSP安装。在这种情况下，半导体器件10或半导体芯片通过焊球30直接与印刷电路板34相连。与图4中一样，在图5中利用大椭圆来描述放大的细节，其中以位于下面的电接线端接触器件12来表示半导体器件10或芯片。利用薄膜技术，这些接触或接线器件12通常具有超过20μm的宽度和大约2到4μm的高度。
尽管按照图5的安装不需要额外的插入衬底，能够形成更紧凑的结构，利用这种安装的缺点在于WLP/CSP接线器件的电导率是图4所示具有插入机构的传统BGA的电导率的1/5到1/10。在WLP安装的情况下，与可互换的BGA相比，接线器件的电阻较高，由此制约了装置或封装的性能，尤其是高频应用的情况下。
图6所示的是传统上生产的具有接触或接线器件的半导体器件的横截面。在芯片或晶片的半导体衬底10上首先涂上载体层11，最好是钛或钛化合物，与如包含铜等的导电层12或互连级相邻。紧接着导电层12是阻挡层40，阻挡层40特别地包含镍，防止如金等涂在其上面的保护层41的金属原子扩散到如铜等的导电层12中。
通过包括溅射和/或电化学沉积步骤等多个步骤涂覆这种从上面加以保护的互连器件，例如，作为半导体器件10的接触或接线器件，并通过使用光化学结构化的光掩模的刻蚀步骤形成其结构。这样一系列层的高度通常为大约4到6μm。这种安装的缺点不仅是花费时间和成本的多层生产处理，而且并未保护半导体衬底10的层排列的侧壁，从而暴露于特别是电化学腐蚀。特别地，侧面暴露的导电层12，尤其是铜质导电层12暴露于腐蚀，个别层形成了化学电流(galvanochemical)元件，存在发生不需要的化学反应的趋势。
生产这种接线端或接线器件所需的层及其方法通常为：溅射粘性或载体层11；溅射铜载体层(未示出)；进行光刻处理，以形成溅射金属化层11的结构；沉积铜互连层12；沉积镍层，作为阻挡或缓冲层40；沉积金层41作为保护；以及最后，去除结构化的光掩模，并刻蚀先前设有结构化的光掩模的区域中的载体层。
在这样一系列层中，导电率由沉积的或电镀的铜层12所确定。对导电方式的改进增加了直接与处理或生产成本相关的沉积或电镀时间。为了实现与具有插入机构32或基座的图4所示的BGA连接的情况同样高的电导率，图6或图5所示的CSP/WLP接线端或接线器件的沉积或电镀成本是不经济的。
发明内容
因此，本发明的目的是提供一种生产半导体器件的方法及一种相应的半导体器件，所述半导体器件提供了具有非常好或高的电导率的接线端或接线器件，能够以较低成本进行生产，并提供了装置较小的整体尺寸。
按照本发明，通过权利要求1所述的用于生产半导体器件的方法以及通过按照权利要求15所述的半导体器件来实现此目的。
本发明所基于的思想实质上在于通过在接线端或接线器件或线路上涂覆焊料层，增加导电横截面来提供较高的电导率，而不是通过成本较高的电镀或沉积步骤来增加铜的厚度或导电横截面。
在本发明中，通过在其上具有结构化的互连级的半导体衬底上，在结构化的互连级上涂覆结构化的焊料层来增加导电横截面特别地解决了在一开始提到的问题。
在从属权利要求中可以找到对本发明的每个主题的有利发展和改进。
按照一个优选的发展，以溅射过程涂覆互连级。
按照另一优选的发展，所涂覆的互连层包含金属，最好是铜和/或铝。
按照另一优选的发展，以光刻过程形成互连级的结构。
按照另一优选的发展，结构化的互连级在半导体衬底上设置载体或阻挡层，所述载体或阻挡层最好包含钛，并形成与互连级同样的结构。
按照另一优选的发展，以印刷过程涂覆结构化的焊料层，并通过焊料的再次液化或重熔以预定的方式分布结构化的焊料层。
按照另一优选的发展，以浸焊过程涂覆焊料层，在浸焊过程中，将设置有结构化的互连级的半导体衬底的上面浸入焊料槽。
按照另一优选的发展，在涂覆焊料层之前，在预定的部分上，选择性地涂覆阻焊器件。
按照另一优选的发展，以焊料浸润结构化的互连级和/或载体或阻挡层的侧壁。
按照另一优选的发展，在涂覆焊料层期间，最好在相同的处理步骤中，形成用于沿垂直方向焊接另外的半导体器件和/或印刷电路板的焊迹和焊球。
按照另一优选的发展，在涂覆结构化的焊料层之后，以用于垂直焊接的焊球的顶端从塑料中突出，而其他焊料结构都被覆盖的方式，涂覆不导电的塑料，最好是聚合物。
按照另一优选的发展，只有在沿垂直方向与另外的半导体器件和/或印刷电路板进行电焊接期间或之后，所涂覆的聚合物硬化。
按照另一优选的发展，以印刷过程涂覆所述聚合物。
按照另一优选的发展，在半导体衬底和/或如焊盘等接触器件上，利用至少包括一种如铂或钯等贵金属的高电抗物质(highlyreactive substance)，以印刷或冲压处理形成导电互连级。
附图说明
在下面的描述和附图中更详细地解释了本发明的示例性实施例，其中：
图1示出了按照本发明的实施例生产的半导体器件的横截面；
图2示出了用于解释本发明的实施例的细节的平面图；
图3示出了图2所示的器件的剖面图；
图4以放大的投影图示出了通常的半导体器件的横截面；
图5以放大的投影图示出了已知的半导体器件的横截面；以及
图6示出了通常的方法所生产的半导体器件的横截面。
在图中，相同的参考数字表示相同或功能上相同的部件。
具体实施方式
图1示出了按照本发明的实施例生产的半导体器件的横截面。
图1所示的是半导体衬底10，已经通过溅射过程在其上涂覆了最好是如钛等金属的载体层11。另一金属化层12与载体层11相连，最好同样以溅射如铜或铝等导电金属来形成金属化层12。以光刻方法在金属化层12上形成结构化的光掩模，步骤如下：涂覆并曝光光刻胶，在随后的刻蚀步骤中，形成已涂覆了金属化层11和12的结构(原文如此)。然后，去除光刻胶图样或光刻胶掩模，并刻蚀载体层。
例如，在随后涂覆焊料层13以增加结构化的导电层12或互连级11、12的导电横截面之前，可以有选择地涂覆阻焊器件或阻焊料层(未示出)，以便保持结构化的互连级11、12上的预定区域不被占据。
为了在结构化的互连级12上涂覆焊料层13，例如，通过印刷过程，将焊料涂覆在结构化的互连级11、12或接线器件11、12上，并在重熔过程中，通过重新液化来分布焊料。以这种方式，能够以较低成本涂覆导电焊料，并截面增加结构化的互连级12的导电横截面。
液体状态或重熔过程中的焊料最好具有如下选择的表面张力，选择此表面张力，使得浸润了焊料的互连结构11、12的高度大致对应于互连结构的结构宽度15、25的一半。焊料13覆盖或浸润结构化的互连级11、12的侧壁16，最好也覆盖或浸润载体层11的侧壁。从而，由焊料保护侧壁16免受电化学腐蚀。
互连级12的互连结构17上的焊料的垂直延伸14可以根据所需的电导率进行修改，例如在互连级12的互连部分17的可变结构宽度大约为20到50μm的情况下，最好在10到25μm的范围内。在互连级11、12的接线端或连接器件18上的焊料结构的高度24或焊料的垂直延伸同样可以根据所需的电导率进行修改，最好为大约150到300μm，而在互连级12的接线端或连接器件18上的焊料结构的宽度25或焊料的水平延伸大约为300到600μm。
代替以印刷过程涂覆焊料13，随后重新液化焊料13，并从而将焊料分布到互连级12的预定部分，同样可以想到将结构化的互连级12浸润在焊料或焊接槽中。为此目的，最好将具有结构化的互连级12和/或与结构化的互连级12同样结构的载体层11的半导体衬底10已经金属化的一侧朝下地浸入焊接槽中。于是，未设置阻焊器件(未示出)的结构化的互连级12或阻焊料层这些部分与焊料13浸润，浸润的焊料13的体积依赖于所选的液态下焊料的表面张力和互连结构的尺寸。最好，只是结构化的互连级12和/或相似结构的载体层11被浸入热的液体焊料中，而半导体衬底10并不直接浸入焊接槽。
图2示出了用于解释本发明的实施例的细节的平面图。
图2所示的是半导体衬底上，以焊料13浸润的互连部分17和同样以焊料13浸润的接线端或连接器件18。
在图3中，以横截面描述了按照图2的排列。在半导体衬底10上，在互连部分17和接线端或连接器件部分18中都以焊料13浸润。如图2所示，由于接线端器件18较大的水平延伸，根据图3，用于连接另外的半导体器件和/或印刷电路板的垂直焊接器件18的区域中，得到了焊料较高的垂直延伸。
按照本发明的半导体器件，例如按照图1的半导体器件，可以额外地具有涂覆在晶片级上的填充聚合物，在焊料重熔之后，以印刷或分布过程涂覆填充聚合物，从而最好封装其垂直延伸较短的焊料结构如，接线器件12上、以焊料浸润的互连部分17等，并且嵌入特别为垂直焊接提供的焊球，而不完全覆盖，使得焊球的顶端突出在填充材料之上。于是，在垂直焊接另外的半导体器件和/或印刷电路板期间，活化此填充器件，从而粘附到额外的半导体器件和/或印刷电路板上，借此，例如，在印刷电路板和芯片之间确保了可靠的机械连接。
通过以包括如Pt和Pb等贵金属的高电抗成分的化学品印刷或压印，可以同时代替在如铝等的连接器件或部分18(焊盘)上溅射载体层11和/或互连级12，并对半导体芯片进行钝化。以焊料浸润在焊盘的铝上和半导体衬底的钝化上以这种方式产生的结构。在这种方法的情况下，所涂覆的载体金属化非常细，避免了形成载体金属化互连所需的成本密集型光刻步骤。
尽管上面基于优选示例性实施例描述了本发明，但本发明并不局限于此，代替地，能够以多种方式进行修改。
尽管在示例性实施例中给出了对互连结构和焊接器件的实际尺寸的建议，但较大或较小的结构都是可以想象的。此外，例如，互连级的材料或可能在载体层出现的材料等所提出的材料，均是为了理解，而作为示例给出。
符号说明：
10 半导体衬底/半导体晶片/半导体芯片
11 载体层/阻挡层，例如包含钛
12 导电层，特别是互连级
13 焊料层，特别是互连级
14 在互连级的互连部分上的焊料结构的高度或焊料的垂直延伸
15 在互连级的互连部分上的焊料结构的宽度或焊料的水平延伸
16 互连级的侧壁
17 互连级的互连部分
18 互连级的接线端或连接器件
24 在互连级的接线端或连接器件上的焊料结构的高度或焊料的垂直延伸
25 在互连级的接线端或连接器件上的焊料结构的宽度或焊料的水平延伸
30 焊球(焊料隆起焊盘)
31 机械芯片连接
32 插入衬底
33 芯片覆层
34 印刷电路板
35 插入衬底上具有通孔的互连
40 载体层，最好具有镍
41 保护层，例如，由金制成

Claims (20)

1、一种生产半导体器件的方法，所述方法包括以下步骤：
在半导体衬底(10)上涂覆互连级(11，12)；
形成所述互连级(11，12)的结构；以及
以焊料层(13)呈现出互连级(11，12)的结构的方式，在结构化的互连级(11，12)上涂覆所述焊料层(13)。
2、按照权利要求1所述的方法，其特征在于以没有外部电流的溅射过程或沉积过程涂覆所述互连级(11，12)。
3、按照权利要求1或2所述的方法，其特征在于涂覆的所述互连层(12)包含金属，最好是铜和/或镍和/或铝。
4、按照前述权利要求之一所述的方法，其特征在于借助于光刻过程形成所述互连级(11，12)的结构。
5、按照前述权利要求之一所述的方法，其特征在于在所述半导体衬底(10)上涂覆最好包括钛而且形成与所述互连级(12)同样结构的载体层(11)。
6、按照前述权利要求之一所述的方法，其特征在于以印刷过程涂覆所述焊料层(13)，并通过焊料的再次液化或重熔，以预定的方式分布所述焊料层(13)。
7、按照前述权利要求之一所述的方法，其特征在于以浸焊过程涂覆所述焊料层(13)，在浸焊过程中，将设置有所述结构化的互连级(11，12)的半导体衬底(10)的上面浸入焊料槽。
8、按照前述权利要求之一所述的方法，其特征在于在形成所述互连级(11，12)的结构之后，涂覆所述焊料层(13)之前，在排列的预定部分上，有选择地涂覆阻焊层。
9、按照前述权利要求之一所述的方法，其特征在于以焊料浸润所述结构化的互连级(11，12)和/或所述载体层(11)的侧壁(16)。
10、按照前述权利要求之一所述的方法，其特征在于在涂覆焊料层(13)期间，最好在相同的处理步骤中，形成用于沿垂直方向焊接另外的半导体器件和/或印刷电路板的焊迹和焊球(30)。
11、按照前述权利要求之一所述的方法，其特征在于在涂覆所述结构化的焊料层(13)之后，以用于垂直焊接的焊球(30)的顶端从塑料中突出，而其他焊料结构都被覆盖的方式，涂覆不导电的塑料，最好是聚合物。
12、按照权利要求11所述的方法，其特征在于只有在沿垂直方向与另外的半导体器件和/或印刷电路板进行电焊接期间或之后，所涂覆的聚合物硬化。
13、按照权利要求11或12所述的方法，其特征在于以印刷过程涂覆所述聚合物。
14、按照前述权利要求之一所述的方法，其特征在于在所述半导体衬底(10)和/或如焊盘等接触器件上，利用至少包括一种如优选的铂或钯等贵金属的高电抗物质，以印刷或冲压处理形成所述导电互连级(12)。
15、一种半导体器件，包括：
半导体衬底(10)；
在所述半导体衬底(10)上的结构化的互连级(11，12)；以及
在所述结构化的互连级(11，12)上的焊料层(13)，用于增大导电横截面，所述焊料层(13)呈现出所述互连级(11，12)的结构。
16、按照权利要求15所述的半导体器件，其特征在于所述结构化的互连级(12)包括金属，特别是铝和/或铜。
17、按照权利要求15或16所述的半导体器件，其特征在于所述结构化的互连级(11，12)在所述半导体衬底(10)上设有载体层(11)，所述载体层形成与所述互连级(12)同样的结构，并且最好包括钛和/或铜。
18、按照权利要求15到17之一所述的半导体器件，其特征在于以焊料浸润所述结构化的互连级(11，12)和/或所述载体层(11)的侧壁(16)。
19、按照权利要求15到18之一所述的半导体器件，其特征在于所述半导体器件通过塑料或聚合物至少与一个另外的半导体器件和/或印刷电路板机械相连，通过焊球(30)沿垂直方向提供电连接。
20、按照权利要求15到19之一所述的半导体器件，其特征在于所述结构化的焊料层(13)具有大致与所述结构化的互连级(12)的结构宽度(15，25)的一半相对应的焊料层高度(14，24)。
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