CN1469461A - 半导体器件和制造半导体器件的方法 - Google Patents
半导体器件和制造半导体器件的方法 Download PDFInfo
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- CN1469461A CN1469461A CNA03141303XA CN03141303A CN1469461A CN 1469461 A CN1469461 A CN 1469461A CN A03141303X A CNA03141303X A CN A03141303XA CN 03141303 A CN03141303 A CN 03141303A CN 1469461 A CN1469461 A CN 1469461A
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- lead
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- semiconductor device
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Abstract
一种半导体器件,包括一个半导体芯片,具有多个在其主表面上安排的电极;多个引线,分别与半导体芯片上的多个电极电连接;和一个树脂密封体,密封半导体芯片和多个引线,其中多个引线包括第一引线和邻近第一引线的第二引线,第一引线具有从树脂密封体的安装表面露出,并且接近树脂密封体的侧面设置的第一外部连接件,第二引线具有从树脂密封体的安装表面露出,并且相对于第一外部连接件较接近于半导体芯片设置的第二外部连接件。第一和第二引线固定在半导体芯片上。该半导体器件适合于一种多管脚结构,并且其制造产量得到改善。
Description
技术领域
本发明涉及一种半导体器件和一种制造半导体器件的技术。特别地,本发明涉及一种有效地适用于半导体器件的技术,这种半导体器件在树脂密封部件的背表面(安装表面)上具有多个用于外部连接件的端子。
背景技术
关于其中用树脂密封体来密封半导体芯片的类型的半导体器件,已经提出并且实际使用各种各样封装结构的半导体器件。例如,在Japanese Unexamined Patent Publication No.Hei11(1999)-330343中,公开一种称为QFN(四周扁平无引线封装)型的半导体器件。QFN型半导体器件具有一种封装结构,其中在与半导体芯片的电极电连接的引线上形成外部连接件(外部端子),使这些外部连接件从树脂密封体的背表面(安装表面)露出。应用这种封装结构,与一种封装结构例如称为QFP(四周扁平封装)型的半导体器件比较,其中从树脂密封体的侧面伸出与半导体芯片的电极电连接的引线,并且使引线按预定形状弯曲,则有可能实现平面尺寸的减小。
QFN型半导体器件通过组装过程使用一个引线框架来制造。例如,在一种封装结构的情况下,其中在一个模片垫上安装半导体芯片,则在一个由引线框架的框架体通过悬置引线所支持的模片垫(也称为接头片)上安装半导体芯片,然后用接合线将半导体芯片上的电极与引线电连接,使引线由引线框架的框架体通过系杆(也称为挡杆)所支持,此后用树脂密封体来密封半导体芯片、引线、模片垫、悬置引线及接合线,并且随后从引线框架体切去引线、系杆和悬置引线,来制造这种封装结构。接合线的一端与半导体芯片上的电极连接,而其相对端与具有主表面和与主表面相对的背表面的引线的主表面连接。引线的主表面用树脂密封体覆盖,而其背表面从具有主表面和与主表面相对的背表面(安装表面)的树脂密封体的背表面露出。
QFN型半导体器件所用的树脂密封体用适合大量生产的灌封法形成。根据灌封法,通过在模具的上模与下模之间设置一个引线框架,以便将半导体芯片、引线、模片垫、悬置引线及接合线设置在一个腔(树脂密封体形成部分)之内,此后在压力作用下将树脂注入模具的腔中,来形成树脂密封体。
在一种封装结构的情况下,其中使引线上形成的外部连接件从树脂密封体的背表面露出,则通过以这样方式设置一个引线框架,以便引线的外部连接件与模具的下模形成接触,此后在压力作用下将树脂注入模具的腔中,来制造树脂密封体。在这种情况下,在腔的内部,下模与引线的外部连接件不那么相互紧密接触,这样允许树脂容易进入下模与外部连接件之间,因此易于出现如外部连接件覆有不必要的薄膜状树脂(树脂毛边)这样的不便。
为了避免出现这样的不便,在制造QFN型半导体器件时,一般采用一种技术(此后称为“薄片模制技术”),其中在模具的下模与引线框架之间置于一个树脂片(树脂膜),然后使引线框架相对于模具设置,以便引线的外部连接件与树脂片形成接触,此后在压力作用下将树脂注入模具的腔内。根据这种薄片模制技术,树脂片与引线的外部连接件在腔内相互紧密接触,从而能抑制出现如外部连接件覆有树脂毛边这样的不便。薄片模制技术例如在JapaneseUnexamined Patent Pub1ication No.Hei11(1999)-274195中公开。
发明内容
然而,在QFN型半导体器件中,如果试图增加端子数(多管脚结构),以应对在半导体芯片上形成的LSI的较高功能和较高性能,则出现下列问题。
为增加端子数,必须微型化制造引线,然而这样带来外部连接件的微型化制造。为保证高安装可靠性,必须使外部连接件具有预定面积,因此其面积不能制成太小。为此,如果不改变封装尺寸而想获得多管脚结构,不能过多增加端子数,因此不可能获得高度的多管脚结构。
为了获得一种多管脚结构,同时在不改变封装尺寸下保证引线的外部连接件的预定面积,有效地选择性增宽外部连接件,并且以之字形安排外部连接件。然而,在这种情况下,在模制步骤,设置在半导体芯片侧的外部连接件与模具的夹紧部分隔开,该夹紧部分沿垂直方向使引线的相对端夹紧,结果使树脂片与引线的外部连接件之间的粘附变差,并且容易出现如外部连接件覆有树脂毛边这样的不便。这样的不便促使降低半导体器件的制造产量。
本发明的一个目的是提供一种技术,它允许改善一种适合多管脚结构的半导体器件的制造产量。
由以下描述及附图,本发明的以上和其他目的及新特点将变得显而易见。
以下将略述如这里公开的本发明的典型方式。
<方式(1)>
一种半导体器件,包括:
一个半导体芯片,具有多个在其主表面上安排的电极;
多个引线,分别与半导体芯片上的多个电极电连接;和
一个树脂密封体,密封半导体芯片和多个引线,
其中多个引线包括第一引线和与第一引线邻近的第二引线,第一引线具有从树脂密封体的安装表面露出,并且接近树脂密封体的侧面设置的第一外部连接件,第二引线具有从树脂密封体的安装表面露出,并且相对于第一外部连接件较接近于半导体芯片设置的第二外部连接件,第一和第二引线固定在半导体芯片上。
<方式(2)>
一种制造半导体器件的方法,包括步骤:
提供一个引线框架,该引线框架具有相互邻近的第一和第二引线,还具有在第一引线上形成的第一外部连接件,和在第二引线上形成并且相对于第一外部连接件在引线的一端侧设置的第二外部连接件,以及
提供一个具有第一模和第二模的模具,第一模在第一配合表面上具有一个第一夹紧部分,和一个与第一夹紧部分邻接的腔,第二模在与第一配合表面相对的第二配合表面上,具有一个与第一夹紧部分相对的第二夹紧部分;
将第一和第二引线的一端部分固定在半导体芯片上;
将半导体芯片的主表面上安排的多个电极分别与第一和第二引线电连接;以及
用第一和第二夹紧部分将与第一和第二引线的第一端部分相对的相对端部分夹在中间,并且将树脂注入腔中,同时允许第一和第二连接件与一个置于第一和第二引线与第二配合表面之间的树脂片接触,以用树脂密封半导体芯片及第一和第二引线。
附图说明
图1是表示根据本发明的第一实施例的半导体器件的外观(主表面侧)的平面图;
图2是表示第一实施例的半导体器件的外观(背面)的平面图(底视图);
图3是表示第一实施例的半导体器件的内部结构(背面)的平面图;
图4是图3的局部放大截面图;
图5(a)和图5(b)是表示第一实施例的半导体器件的内部结构的截面图,其中图5(a)是沿图3直线A-A所取的截面图,以及图5(b)是沿图3直线B-B所取的截面图;
图6是图5(a)的局部放大图;
图7是表示制造第一实施例的半导体器件所用的引线框架的一部分的平面图;
图8是图7的局部放大平面图;
图9(a)和图9(b)是表示制造第一实施例的半导体器件所用的引线框架的一部分的截面图,其中图9(a)是沿第一引线所取的截面图,以及图9(b)是沿第二引线所取的截面图;
图10(a)和图10(b)是表示在第一实施例的半导体器件的制造过程中制造步骤的截面图,其中图10(a)是表示模片接合步骤的截面图,以及图10(b)是表示金属线接合步骤的截面图;
图11是在第一实施例的半导体器件的制造过程中所包括的模制步骤中沿第一引线所取的截面图;
图12是图11的局部放大截面图;
图13是在第一实施例的半导体器件的制造过程中所包括的模制步骤中沿第二引线所取的截面图;
图14是图13的局部放大截面图;
图15(a)和图15(b)是根据本发明的第二实施例的半导体器件的截面图,其中图15(a)是沿第一引线所取的截面图,以及图15(b)是沿第二引线所取的截面图;
图16是在第二实施例的半导体器件的制造过程中所包括的模制步骤中沿第一引线所取的截面图;
图17是在第二实施例的半导体器件的制造过程中所包括的模制步骤中沿第二引线所取的截面图;
图18(a)和图18(b)是根据本发明的第三实施例的半导体器件的截面图,其中图18(a)是沿第一引线所取的截面图,以及图18(b)是沿第二引线所取的截面图;
图19(a)、图19(b)和图19(c)是表示在根据本发明的第四实施例的半导体器件的制造过程中所包括的制造步骤的截面图;
图20(a)、图20(b)和图20(c)是表示在第四实施例的半导体器件的制造过程中所包括的制造步骤的截面图;
图21(a)和图21(b)是表示在根据本发明的第五实施例的半导体器件的制造过程中所包括的制造步骤的截面图;
图22(a)和图22(b)是表示在第五实施例的半导体器件的制造过程中所包括的制造步骤的截面图;
图23(a)和图23(b)是表示在第五实施例的半导体器件的制造过程中所包括的制造步骤的截面图;
图24(a)和图24(b)是表示在根据本发明的第六实施例的半导体器件的制造过程中所包括的制造步骤的截面图;
图25(a)、图25(b)和图25(c)是表示在第六实施例的半导体器件的制造过程中所包括的制造步骤的截面图;
图26是表示第六实施例的半导体器件的内部结构的截面图;
图27是表示根据本发明的第七实施例的半导体器件的内部结构的截面图;
图28是表示根据本发明的第八实施例的半导体器件的内部结构的截面图;
图29是表示根据本发明的第九实施例的半导体器件的内部结构的截面图;
图30是表示根据本发明的第十实施例的半导体器件的内部结构的截面图;
图31是表示根据本发明的第十一实施例的半导体器件的内部结构的截面图;
图32是表示根据本发明的第十二实施例的组件的示意结构的截面图;
图33是表示在制造第十二实施例的组件中的第一半导体器件安装方法的截面图;
图34是表示在制造第十二实施例的组件中的第二半导体器件安装方法的截面图;以及
图35是表示在制造第十二实施例的组件中的第二半导体器件安装方法的截面图。
具体实施方式
以下将参考附图详细描述本发明的实施例。在用于说明实施例的所有图中,具有相同功能的部件用同样标号识别,并且将省略其重复说明。
(第一实施例)
在本第一实施例中,将参考本发明应用于SON(小型面装式双列管脚无引线封装)型半导体器件的一例。
图1是表示根据本发明的第一实施例的半导体器件的外观(主表面侧)的平面图;
图2是表示第一实施例的半导体器件的外观(背面)的平面图(仰视图);
图3是表示第一实施例的半导体器件的内部结构(背面)的平面图;
图4是图3的局部放大截面图;
图5(a)和图5(b)是表示第一实施例的半导体器件的内部结构的截面图,其中图5(a)是沿图3直线A-A所取的截面图,以及图5(b)是沿图3直线B-B所取的截面图;以及
图6是图5(a)的局部放大截面图。
如图1至图5(b)所示,用1a指示的本实施例的半导体器件为一种封装结构,它具有一个单半导体芯片2,各包括多个引线4的第一和第二引线组,多个接合线7,以及一个树脂密封体8。半导体芯片2,第一和第二引线组的引线4,以及多个接合线7由树脂密封体8密封。
如图3和图5所示,半导体芯片2就其与它的厚度方向相交的平面形状为四边形。在本实施例中,它为平面矩形。半导体芯片2主要包括一个半导体衬底,多个在半导体衬底的主表面上形成的晶体管,一个在半导体衬底的主表面上由多级层叠的绝缘层和布线层所构成的多层互连,以及一个形成为覆盖该多层互连的表面保护膜(最后保护膜),然而不限于这种结构。例如,绝缘层由氧化硅膜形成,布线层由铝(Al)、铝合金、铜(Cu)或铜合金膜这样的金属模形成,以及表面保护膜由一种多层膜形成,它由无机绝缘膜例如氧化硅膜或氮化硅膜和有机绝缘膜的层叠所构成。
半导体芯片2具有一个主表面(电路形成表面)2x和一个背表面2y,它们相互相对设置。在半导体芯片2的主表面2x侧,形成一个存储电路,它作为集成电路例如由DRAM(动态随机存取存储器)构成。存储电路主要由半导体衬底的主表面上形成的晶体管和以多层互连形成的布线所构成。
在半导体芯片2的主表面2x上安排多个电极2a。多个电极2a沿半导体芯片2的主表面2x上的两条中心线中的一条中心线(在本实施例中沿半导体芯片2的长边相同方向延伸的中心线)中心安排。在半导体芯片2的多层互连的顶布线层中形成多个电极盘2a,并且使它们通过在半导体芯片2的表面保护膜中与电极2a对应形成的接合孔露出。
如图1、图2和图5所示,树脂密封体8就其与它的厚度方向相交的平面形状为四边形。它在本实施例中为矩形。树脂密封体8具有一个主表面8x和一个背表面(安装表面)8y,它们相互相对设置。树脂密封体8的平面尺寸比半导体芯片2的平面尺寸大。
为了实现应力的减小,树脂密封体8例如由基于联苯的树脂所形成,其中结合了酚类固化剂、硅橡胶和填充料。树脂密封体8通过适合大量生产的灌封法形成。根据灌封法,使用一个具有罐、浇道、注入口和腔的模具,并且在压力作用下将树脂通过浇道和注入口从罐中注入腔中。在本实施例中采用一种使用树脂片的薄片模制技术,以形成树脂密封体8。
如图3至图5所示,沿半导体芯片2的两个相对长边中的一个安排第一引线组的引线4,而沿半导体芯片2的另一长边安排第二引线组的引线。半导体芯片2的一个长边设置在和树脂密封体8的两个相对侧面(8a,8b)中的一个侧面8b相同侧,而半导体芯片2的另一长边设置在和树脂密封体8的另一侧面8a相同侧。
第一引线组的引线4伸过半导体芯片2的主表面2x的外围边缘,并且其一端固定在半导体芯片2上,而它们的相对端设置在树脂密封体8的一侧面8a侧。第二引线组的引线4伸过半导体芯片2的主表面2x的外围边缘,并且其一端固定在半导体芯片2上,而它们的相对端设置在树脂密封体8的另一侧面8b侧。在本实施例中,第一和第二引线组的引线4的一端沿多个电极2a的布局方向安排,并且通过一个绝缘树脂带3固定在半导体芯片2的主表面2x上。第一和第二引线组的引线4的相对端沿树脂密封体8的侧面(8a、8b)的纵向(与半导体芯片的长边相同方向)安排。
半导体芯片2的多个电极2a分别与第一和第二引线组的引线4电连接。在本实施例中,用接合线7实现半导体芯片2的电极2a与引线4之间的电连接。接合线7的一端与半导体芯片2的电极2a连接,而其相对端与引线4的一端连接。至于接合线7,例如使用金(Au)线。为了线7的连接,例如采用钉头接合(球接合)法,它与热压接合相结合利用超声波振动。
在第一和第二引线组中,多个引线4包括相互交替邻近的第一引线4a和第二引线4b。第一引线4a从树脂密封体8的背表面8y露出,并且具有在邻近树脂密封体8的侧面设置的第一外部连接件5a。第二引线4b从树脂密封体8的背表面8y露出,并且具有在半导体芯片2侧上,换句话说,在引线4的一端侧相对于第一外部连接件5a设置的第二外部连接件5b。第一引线4a和第二引线4b沿树脂密封体8的纵向(沿半导体芯片的纵向)交替地安排。也就是,在第一和第二引线组中,具有第一外部连接件5a的第一引线4a和具有第二外部连接件5b的第二引线4b沿一个方向交替地安排。
如图2所示,在树脂密封体8的背表面8y,安排包括多个外部连接件5的第一和第二端子组。第一端子组的外部连接件5沿树脂密封体8的纵向接近树脂密封体的第一侧面8a安排,而第二端子组的外部连接件5沿树脂密封体8的纵向接近树脂密封体的第二侧面8b安排。在第一和第二端子组中,多个外部连接件5包括接近树脂密封体8的侧面(8a、8b)设置的第一外部连接件5a,和相对于第一外部连接件8a远离树脂密封体8的侧面设置的第二外部连接件5b。第一和第二外部连接件(5a、5b)沿树脂密封体8的纵向(沿半导体芯片的纵向)交替地安排。因此,在第一和第二端子组中,第一外部连接件5a和第二外部连接件5b沿一个方向之字形安排。
如图6所示,多个引线4(4a、4b)各包括一个在半导体芯片2的主表面2x上延伸的第一部分4m1,一个从第一部分4m1向树脂密封体8的背表面8y弯曲的第二部分4m2,和一个从第二部分4m2向树脂密封体8的侧面延伸的第三部分4m3。
如图3至图5所示,在第一和第二引线(4a、4b)位于半导体芯片2外侧位置处的第三部分4m3上,形成第一和第二外部连接件(5a、5b)。
如图5和图6所示,外部连接件(5a、5b)和引线(4a、4b)为整体,并且比引线4的第三部分4m3厚。在本实施例中,例如,各外部连接件5的厚度约为125μm至150μm,而各引线4在除关联外部连接件5之外的其他引线部分处的厚度约为65μm至75μm。
虽然没有详细表示,但是外部连接件5从树脂密封体8的背表面8y向外伸出,并且它们的伸出端覆有一个用电镀法或印刷法形成的焊料层(电镀层)9。通过在布线衬底上形成的电极(轨迹、焊区和焊盘)上焊接外部连接件5,安装本实施例的半导体器件1a。
如图4所示,各外部连接件(5a、5b)5的宽度5W比各引线(4a、4b)4的第三部分4m3的宽度4W大。各第一连接件5a与各第二外部连接件5b之间的间隔5S比各第一引线4a的第三部分4m3与各第二引线4b的第三部分4m3之间的间隔4S小。从树脂密封体8的侧面(8a、8b)到各第二外部连接件5b的距离L2,比从树脂密封体的侧面(8a、8b)到各第一外部连接件5a的距离L1长。在本实施例中,例如,宽度5W约为300μm,宽度4W约为200μm,间隔5S约为100μm,间隔4S约为300μm,距离L2约为0.8mm,以及距离L1约为0.1mm。
本实施例的半导体器件1a为一种封装结构,其中从树脂密封体8的背表面8y露出的多个外部连接件5沿树脂密封体的纵向之字形安排。根据这样的封装结构,有可能微型化制造引线4,同时保证如获得高安装可靠性所必需的外部连接件5的面积,并且因此有可能在不改变封装尺寸下获得一种多管脚结构。
其次,参考图7至图9(b),现在将就制造半导体器件1a所用的引线框架提供以下描述。
图7是表示引线框架的一部分的平面图;
图8是图7的局部放大平面图;以及
图9(a)和9(b)是表示引线框架的一部分的截面图,其中图9(a)是沿第一引线所取的截面图,以及图9(b)是沿第二引线所取的截面图。
如图7所示,引线框架LF1为一种多框架结构,其中沿引线框架LF1纵向安排由框架体10所隔开的多个产品形成区11。如图8、图9(a)和图9(b)所示,在各产品形成区11中,安排各包括多个引线4的第一和第二引线组,它们包括第一和第二引线(4a、4b)。在本实施例中,产品形成区11在平面中各为矩形。第一和第二引线组沿各产品形成区11的短边方向相互相对并隔开。第一和第二引线组的引线4沿各产品形成区11的长边方向安排。在第一和第二引线组中,相邻引线4通过一个系杆12互连。在位于多个引线4各自的一端侧上的一个接合面上形成一个电镀层6,同时将一个绝缘带3固定在与接合面相对的侧面,使绝缘带3沿各产品形成区11的长边方向延伸。将多个引线4的相对端连接在引线框架10上。
为了制造引线框架LF1,首先例如提供具有125μm至150μm厚度的Cu、Cu合金或Fe-Ni合金的金属板,并且使其一侧在待形成引线4的区域处覆有光刻胶膜。在待形成外部连接件5的区域处,将金属板的两侧涂有光刻胶膜。在这种状态下,在一例涂有光刻胶膜的区域处,使用医学液体将金属板蚀刻成例如约一半(65μm至75μm)的薄金属板。通过根据这样方法执行蚀刻,使得金属板在没有涂以光刻胶膜的两侧的区域完全消失,而在涂有光刻胶膜的一侧的区域处形成具有约65μm至75μm厚度的引线4。至于涂有光刻胶膜的两侧的区域处的金属板,不用医学液体蚀刻,因此形成和蚀刻之前具有相同厚度(125μm至150μm)的伸出外部连接件5。
其次,移去光刻胶膜,然后在位于各引线4的一端侧的接合面上形成一个电镀层6,此后使引线4经受弯曲,从而完成图7至图9(b)所示的引线框架LF1。
其次,参考图11至图14,以下将给出关于制造半导体器件1a所用的模具的描述。
图11是在半导体器件1a的制造过程中所包括的模制步骤中沿第一引线所取的截面图;
图12是图11的局部放大图;
图13是在模制步骤中沿第二引线所取的截面图;以及
图14是图13的局部放大截面图。
如图11至图14所示,如按垂直划分模,模具20包括一个上模21和一个下模22,进一步包括罐、剔料器、浇道、树脂注入口、腔23和气孔,然而不限于这种结构。上模21在第一配合表面设有一个第一夹紧部分21a,一个与夹紧部分21a邻接的腔23,一个通过树脂注入口在一端与腔23邻接的浇道,一个与浇道的相对端邻接的剔料器,一个与剔料器邻接的罐,以及与腔邻接的气孔。下模22在与第一配合表面相对的第二配合表面设有一个与第一夹紧部分相对的第二夹紧部分22a。腔23沿上模21的深度方向从上模的第一夹紧部分21a凹进。腔23的平面形状为四边形。它在本实施例中为矩形。
根据薄片模制技术,由这些步骤形成树脂密封体,即将引线框架LF1设置在模具20的上模21与下模22之间,以便树脂片(树脂膜)24设置在下模22与引线框架LF1之间,此后在压力作用下通过剔料器、浇道和树脂注入口将树脂从罐注入腔23。在薄片模制技术下,一般使用热固树脂,并且因此将一种耐热树脂片用作树脂片24,这种耐热树脂片能够耐受在形成树脂密封体时所采用的温度。此外,为了获得一种支座封装结构,必须允许引线4的外部连接件5利用模具20的夹紧力咬入树脂片24。因此,使用一个能够用模具20的夹紧力容易地挤进的柔性树脂片24。
其次,参考图10(a)至图14,以下将给出关于制造半导体器件1a的描述。
图10(a)和图10(b)是表示在半导体器件1a的制造过程中的制造步骤的截面图,其中图10(a)是在模片接合步骤中的截面图,以及图10(b)是在金属线接合步骤中的截面图。
首先,提供图7至图9(b)所示的引线框架LF1,此后如图10(a)所示,将半导体芯片2固定在引线框架LF1上。通过一个绝缘带3将引线的一端部分(第一部分4ml)固定在半导体芯片2的主表面2x上,完成引线框架LF1与半导体芯片2之间的固定。
其次,如图10(b)所示,通过多个接合线7将半导体芯片2的主表面2x上安排的多个电极2a和多个引线4相互电连接。接合线7在一端侧与半导体芯片2的电极2a连接,而在相对端例与引线4的一端侧接合面上所形成的电镀层6连接。
然后,提供图11至图14所示的模具20。随后,如同样这些图所示,在模具20的上模21与下模22之间设置引线框架LF1。
用插在引线框架与下模22的配合表面之间的树脂片24进行引线框架LF1的定位。
此外,用设置在腔23内部的半导体芯片2和接合线7进行引线框架LF1的定位。
此外,在引线(4a、4b)4的相对端部分由上模21的第一夹紧部分21a和下模22的第二夹紧部分22a垂直夹在中间,并且将外部连接件(5a、5b)置为与引线(4a、4b)4和下模22的第二配合表面之间安置的树脂片接触的状态下,进行引线框架LF1的定位。
然后,如上所述,利用设置的引线框架LF1,在压力作用下例如将热固树脂通过剔料器、浇道和树脂注入口从罐注入腔23,以形成树脂密封体8。用树脂密封体8密封半导体芯片2、多个引线4和多个接合线7。
在本步骤中,几乎完成一种支座封装,其中外部连接件5从树脂密封体8的背表面8y露出并向外伸出。
其次,将固定在引线框架LF1上的树脂片24剥离,从模具20中取出引线框架LF1,然后经受固化步骤以加速树脂密封体8的固化,随后经过一个切割步骤以分离系条12,以及一个切割步骤以从框架体10分离引线4,从而几乎完成本实施例的半导体器件1a。
在本实施例的半导体器件的制造过程中所包括的模制步骤中,采用一种薄片模制技术,其中将树脂片24安置在引线框架LF1与模具20的下模22之间,并且在使引线4的外部连接件5置为与树脂片24接触下,用上模21的夹紧部分21a和下模22的夹紧部分22a将引线4的相对端部分垂直夹在中间。在这样的结构下,引线4的外部连接件5用模具20(上模21和下模22)的压力向下压在树脂片24上,以便外部连接件5的尖端咬入树脂片24。因此,在将树脂注入腔23以形成树脂密封体8之后,当从模具20中取出引线框架LF1时,已经咬入树脂片24的外部连接件5的尖端从树脂密封体8的背表面8y向外伸出。
此外,利用构成引线框架LF1的金属板的弹力,当用模具20的夹紧力向下压引线框架LF1时,在一端如引线4的尖端上作用一个向上力。因此,在如本实施例那样之字形安排多个外部连接件5的情况下,外部连接件5对树脂片24的压力在引线4(4a)与引线4(4b)之间出现一个差,引线4(4a)具有接近引线4的相对端部分设置的外部连接件5(5a),而引线4(4b)具有远离引线4的相对端部分设置的外部连接件5(5b)。更具体地说,在引线4b上形成的外部连接件5b对树脂片24的压力变得比引线4a上形成的外部连接件5a对树脂片24的压力较弱。结果,比外部连接件5a远离模具20的夹紧部分安排的外部连接件5b就其与树脂片24的粘附性来说变坏,并且容易出现如外部连接件5b覆有树脂毛边这样的不便。
另一方面,在本实施例中,用固定在半导体芯片2的主表面2x上的引线4的一端部分来执行树脂密封。在这样条件下,有可能防止由模具20的夹紧力向下压引线框架LF1所引起的引线4的翘曲,并且因此有可能抑制向下压在树脂片24上的外部连接件5b的压力的降低。因此,能使远离模具20的夹紧部分的外部连接件5b和树脂片24保持相互紧密接触,以便有可能抑制如外部连接件5b覆有树脂毛边这样的不便。结果,有可能改善半导体器件1a的制造产量。
(第二实施例)
图15(a)和图15(b)是根据本发明的第二实施例的半导体器件的截面图,其中图15(a)是沿第一引线所取的截面图,以及图15(b)是沿第二引线所取的截面图;
图16是在第二实施例的半导体器件的制造过程中所包括的模制步骤中沿第一引线所取的截面图;以及
图17是在模制步骤中沿第二引线所取的截面图。
如图15(a)和图15(b)所示,除以下点外,用1b指示的本第二实施例的半导体器件和上述第一实施例为基本相同结构。
虽然第一实施例的半导体器件1a为一种封装结构,其中半导体芯片2的背表面2y覆有树脂密封体8的树脂,但是本第二实施例的半导体器件1b为一种封装结构,其中半导体芯片2的背表面2y从树脂密封体8的主表面8x露出,换句话说,为一种封装结构,其中半导体芯片2的背表面2y不覆有树脂密封体8的树脂。
如图16和图17所示,在模制步骤中,在半导体芯片2的背表面2y与面对背表面2y的腔23的内壁表面的接触状态下,通过用树脂执行密封,获得这样的封装结构。
同样在这样封装结构中,能获得如第一实施例相同效果。
在本实施例中,引线4的一端部分固定在半导体芯片2的主表面2x上,并且半导体芯片2的背表面2y置为与腔23的内壁表面接触,然后在这种状态下用树脂进行密封。因此,有可能进一步抑制用模具20的夹紧力通过向下压引线框架LF1所引起的引线的翘曲,并且因此进一步抑制如外部连接件5b覆有树脂毛边这样的不便的出现。
(第三实施例)
图18(a)和图18(b)是根据本发明的第三实施例的半导体器件的截面图,其中图18(a)是沿第一引线所取的截面图,以及图18(b)是沿第二引线所取的截面图。
如图18(a)和图18(b)所示,除以下点外,用1c指示的本第三实施例的半导体器件和第一实施例为基本相同结构。
虽然第一实施例的半导体器件1a为一种封装结构,其中半导体芯片2的主表面2x设置在树脂密封体8的背表面8y侧,换句话说,为一种封装结构,其中半导体芯片2的主表面2x和树脂密封体8的背表面8y设置在相同侧,但是用1c指示的本第三实施例的半导体器件为一种封装结构,其中半导体芯片2的背表面2y设置在树脂密封体8的背表面8y侧,换句话说,为一种封装结构,其中半导体芯片2的背表面2y和树脂密封体8的背表面8y设置在相同侧。同样在本半导体器件1c中,能获得如第一实施例相同效果。
(第四实施例)
本第四实施例表示本发明应用于半导体器件的一例,其中用单树脂密封体来密封两个半导体芯片。
图19(a)、图19(b)、图19(c)、图20(a)、图20(b)和图20(c)是表示制造本实施例的半导体器件所用的制造步骤的截面图。
如图20(c)所示,用1d指示的本实施例的半导体器件为一种封装结构,其中层叠两个相同结构的半导体芯片2,以便各自背表面相互面对,并且用密封体8密封。通过一个在另一个上面来重叠两个具有相同引线图形的引线框架,制造本实施例的半导体器件1d,并且因此关于作为分界面的两个半导体芯片的配合表面,上结构和下结构近似对称。
沿一个半导体芯片2(图中上面一个)的两个长边中的一个安排多个引线4,该半导体芯片2的长边相互相对设置,并且沿另一个长边也安排多个引线4。通过一个绝缘带3将沿一个长边安排的多个引线4的一端部分固定在一个半导体芯片2的主表面上,而将其相对端部分安排为接近树脂密封体8的侧面8a。通过一个绝缘带3将沿另一个长边安排的多个引线4的一端部分固定在一个半导体芯片2的主表面上,而将其相对端部分安排为接近树脂密封体8的侧面8b。
同样地,沿另一个半导体芯片2(图中下面一个)的两个长边中的一个安排多个引线4,该半导体芯片2的长边相互相对设置,并且沿另一个长边也安排多个引线4。通过一个绝缘带3将沿一个长边安排的多个引线4的一端部分固定在另一个半导体芯片2的主表面上,而将其相对端部分安排为接近树脂密封体8的侧面8a。通过一个绝缘带3将沿另一个长边安排的多个引线4的一端部分固定在另一个半导体芯片2的主表面上,而将其相对端部分安排为接近树脂密封体8的侧面8b。
在树脂密封体8的主表面上安排多个外部连接件5。同样在树脂密封体8的背表面上安排多个外部连接件5。这些外部连接件5如第一实施例那样之字形安排。因此,在树脂密封体8的主表面或背表面作为安装表面下,能将本实施例的半导体器件1d安装在一个布线衬底上。还可能以垂直层叠状态安装两个相同的半导体器件1d。
本实施例所用引线4和第一实施例所用引线形状不同。更具体地说,第一实施例所用引线4各有两个弯曲部分,而本第四实施例所用引线4各有四个弯曲部分。本实施例所用引线4各有一个沿各半导体芯片2的主表面延伸的第一部分,一个从第一部分向树脂密封体8的安装表面(主表面或背表面)侧弯曲的第二部分,一个从第二部分向树脂密封体8的侧面延伸的第三部分,一个从第三部分向半导体芯片2弯曲的第四部分,以及一个从第四部分向树脂密封体8的侧面弯曲的第五部分。如第一实施例那样,外部连接件5各在第三部分中形成。
各上引线4的第五部分与对应下引线4的第五部分电和机械连接。
其次,参考图19(a)、图19(b)、图19(c)、图20(a)、图20(b)和图20(c),以下将给出关于制造半导体器件1d的描述。
首先,提供两个具有相同引线图形的引线框架,并且如图19(a)所示,以这样方式将半导体芯片2分别固定在一个和另一个引线框架上,以便引线4的一端部分通过一个绝缘带3固定在各半导体芯片的主表面上。
然后,如图19(b)所示,在一个和另一个引线框架处通过接合线7将半导体芯片2上的电极和引线4相互电连接。以这样方式通过倒置接合来执行一个引线框架的引线4与关联半导体芯片2上的电极之间的连接,即相对于另一个引线框架的引线4与关联半导体芯片2上的电极之间的连接,使线7的布局成为左右倒置。
其次,如图19(c)和图20(a)所示,将一个引线框架上的半导体芯片2的背表面和另一个引线框架上的半导体芯片2的背表面置为相互面对面,然后在这种状态下,按一个在另一个上重叠这两个引线框架,此后将一个引线框架的引线4的第五部分和另一个引线框架的引线4的第五部分电和机械连接一起。为了引线4的这个连接,例如使用激光焊接。
随后,如图20(b)所示,用树脂密封两个半导体芯片2,两个引线框架的引线4,以及接合线7,以形成一个树脂密封体8。为了形成树脂密封体8,使用和第一实施例所用相同的薄片模制技术。然而,在本实施例中,当将树脂片置于模具的下模与引线框架之间,以及模具的上模与引线框架之间的时候,执行模制。这样形成一种封装结构,其中在树脂密封体8的主表面和背表面两者上之字形安排多个外部连接件5。
其次,将固定在引线框架上的树脂片1d剥离,并且从模具中取出引线框架,此后,如图20(c)所示,在从树脂密封体8露出的各外部连接件5的伸出端上形成一个焊料层9,随后经过一个固化步骤以加速树脂密封体8的固化,接着经过一个切割步骤以从两个引线框架分离系杆,以及一个切割步骤以从框架体分离引线4,从而几乎完成本实施例的半导体器件1d。
因此,由于本实施例的半导体器件具有这样封装结构,以用单树脂密封体8来密封两个半导体芯片2,所以有可能实行高密度封装。
此外,在本实施例的半导体器件1d的封装结构中,由于在树脂密封体8的主表面和背表面两者上之字形安排外部连接件5,所以能在一个布线衬底上将树脂密封体8的主表面或背表面用作安装表面来安装半导体器件。另外,由于能以垂直层叠状态安装两个相同半导体器件1d,所以有可能实行更高密度的封装。
(第五实施例)
本第五实施例表示一例,其中用直通模制(through molding)法来制造一种具有两个层叠半导体芯片的半导体器件。
图21(a)至图23(b)是表示在制造本第五实施例的半导体器件中所用的制造步骤的截面图。
首先,提供两个具有相同引线图形的多框架结构的引线框架,然后使它们经受如第四实施例相同方式的模片接合和金属线接合。此后,如图21(a)所示,将一个引线框架上的半导体芯片2和另一个引线框架上的半导体芯片2置为相互面对面,并且在这个状态下按一个在另一个上重叠两个引线框架。
然后,如图21(b)所示,将一个树脂片24置于两个叠置的引线框架与模具30的上模31之间,以及两个叠置的引线框架与模具30的下模32之间,并且将两个重叠引线框架设置在模具30的上模31与下模32之间。在本实施例中,两个引线框架各用矩阵形状的多个产品形成区形成。因此,同样在模具30中,以矩阵形状与产品形成区对应形成多个腔33。在模具30中,对各行的多个腔设有一个树脂注入口34,并且使它与各行中的第一级腔33连接。各行中相邻腔33通过一个通口35互连(见图22(a))。
其次,通过浇道和树脂注入口34将树脂从模具30的罐中注入腔33,以用树脂密封两个半导体芯片2,一个和另一个引线框架4,以及接合线7,从而形成树脂密封体8。
然后,如图22(b)所示,从模具30中取出两个引线框架,此后例如通过激光焊接将一个引线框架的引线4的第五部分和另一个引线框架的引线4的第五部分电和机械连接一起。
然后,如图23(a)所示,在从树脂密封体8露出的各外部连接件5的伸出端上形成一个焊料层9,随后经过一个固化步骤以加速树脂密封体8的固化,接着经过一个切割步骤以从两个引线框架分离系杆,以及一个切割步骤以从框架体分离引线4,从而几乎完成图23(b)所示本实施例的半导体器件1e。
因此,同样在本实施例中,能获得如上述第四实施例相同效果。
(第六实施例)
本第六实施例表示一例,其中用板块模制(block molding)法来制造一种具有处于层叠状态的两个半导体芯片的半导体器件。
图24(a)至图25(c)是表示在制造本实施例的半导体器件中所用的制造步骤的截面图;以及
图26是表示本实施例的半导体器件的内部结构的截面图。
在用1g指示的本第六实施例的半导体器件中,树脂密封体8的主表面的平面尺寸和背表面的平面尺寸近似相同,并且树脂密封体8的侧面大致与树脂密封体的主表面和背表面两者垂直。为了制造本实施例的半导体器件1g,采用一种板块模制法。也就是,通过用一个单树脂密封体来一起密封在引线框架的多个产品形成区上分别形成的半导体芯片,此后将引线框架和树脂密封体分成各产品形成区,来制造半导体器件1g,后面将描述细节。
参考图24(a)至图25(c),现在关于制造本实施例的半导体器件1g提供以下描述。
首先,提供两个具有相同引线图形的多框架结构的引线框架,随后执行如第四实施例相同方式的模片接合和金属线接合。此后,如图24(a)所示,安排引线框架,以便一个引线框架上的半导体芯片2的背表面和另一个引线框架上的半导体芯片2的背表面相互面对,并且在这种状态下按一个在另一个上重叠两个引线框架。此时,使用焊料或导电接合材料,将一个引线框架的引线4的第五部分和另一个引线框架的引线4的第五部分电和机械连接一起。
其次,如图24(b)所示,将一个树脂片24置于两个重叠引线框架与模具40的上模41之间,以及两个重叠引线框架与模具40的下模42之间,并且将两个重叠引线框架设置在模具40的上模41与下模42之间。用矩阵形状的多个产品形成区各自形成本实施例所用的两个引线框架。本实施例所用的模具40设有一个腔43,其中能一起安排引线框架的多个产品形成区。
然后,通过一个浇道和一个树脂注入口44,在压力作用下将树脂从模具40的罐中注入腔43,以用树脂密封两个半导体芯片2,两个引线框架的引线4,以及接合线7,从而形成一个树脂密封体8,如图25(a)所示。
其次,从模具40中取出两个引线框架,此后在从树脂密封体露出的各外部连接件5的伸出端上形成一个焊料层9。随后,如图25(c)所示,将两个引线框架和树脂密封体8分成各产品形成区,从而大致完成本实施例的半导体器件1g。
因此,同样在本实施例中,能获得如第四实施例相同的效果。
(第七实施例)
图27是表示根据本发明的第七实施例的半导体器件的内部结构的截面图。
如图27所示,除以下点外,用1h指示的本实施例的半导体器件和上述第六实施例为基本相同的结构。
虽然上述第六实施例的半导体器件1g具有一种封装结构,其中在树脂密封体8的主表面和背表面两者上之字形安排多个外部连接件5,但是本第七实施例的半导体器件1h为一种封装结构,其中仅在树脂密封体8的背面上之字形安排多个外部连接件。通过板块模制法,将一个在引线4上没有外部连接件5的引线框架用作两个引线框架中的一个,制造这样封装结构的半导体器件1h。同样应用本第七实施例的半导体器件1h,能获得如第一实施例相同效果。
(第八实施例)
图28是表示根据本发明的第八实施例的半导体器件的内部结构的截面图。
本实施例的半导体器件1j为一种封装结构,其中用一个树脂密封体8密封一个半导体芯片2。通过板块模制法使用一个引线框架来制造它。同样应用本第八实施例的半导体器件1j,能获得如第一实施例相同的效果。
(第九实施例)
图29是表示根据本发明的第九实施例的半导体器件的内部结构的截面图。
用1k指示的本第九实施例的半导体器件具有一种封装结构,其中以各自背表面相互面对这样方式层叠两个不同结构的半导体芯片(2,50),并且用一个树脂密封体8来密封它们。根据这种封装结构,仅在树脂密封体8的背表面上之字形安排多个外部连接件5。将半导体芯片50上的电极通过接合线与形状和引线4不同的引线电连接,引线51与引线4的第五部分电和机械连接。同样在本实施例中,能获得一种高密度封装。
(第十实施例)
图30是表示根据本发明的第十实施例的半导体器件的内部结构的截面图。
如图30所示,除以下点外,用1m指示的本第十实施例的半导体器件和上述第九实施例为基本相同结构。
半导体芯片50通过一种绝缘粘合剂接合在引线51上,引线51在半导体芯片50与半导体芯片2之间延伸。同样在本实施例中有可能获得一种高密度封装。
(第十一实施例)
图31是表示根据本发明的第十一实施例的半导体器件的内部结构的截面图。
如图31所示,除以下结构外,用1n指示的本第十一实施例的半导体器件和第九实施例为基本相同的结构。
将半导体芯片50的主表面上形成的电极和引线51通过置于它们之间的导电凸块52电和机械连接一起。同样在本实施例中有可能获得一种高密度封装。
(第十二实施例)
图32是表示根据本发明的第十二实施例的组件的示意结构的截面图;
图33是表示在制造本实施例的组件中可采用的第一半导体器件安装方法的截面图;以及
图34和图35是表示在制造本实施例的组件中可采用的第二半导体器件安装方法的截面图。
在本实施例的组件(电子器件)中,在一个布线衬底53上按垂直层叠两个半导体器件1g的状态来安装两个半导体器件1g。在下面半导体器件1g中,各自通过一个焊料层9,将树脂密封体8的背表面上形成的外部连接件5与布线衬底53上的电极54电和机械连接,以及各自通过一个焊料层9,将树脂密封体8的主表面上形成的外部连接件5与上面半导体器件1g中树脂密封体8的背表面上形成的外部连接件5电和机械连接。
在制造组件时安装两个半导体器件1g。至于两个半导体器件1g的安装方法,可用以下两种方法。
<第一安装方法>
如图33所示,将两个半导体器件1g垂直层叠在布线衬底53上,此后熔化焊料层9以安装半导体器件。在这种情况下,关于下面半导体器件1g的背表面和主表面上形成的焊料层9,和上面半导体器件1g的背表面上形成的焊料层9,使用具有相同熔点的材料。
<第二安装方法>
首先如图34所示安装下面半导体器件1g,然后如图35所示在下面半导体器件1g上安装上面半导体器件1g。在这种情况下,关于在下面半导体器件1g的主表面和上面半导体器件1g的背表面上形成的焊料层9的材料,使用比下面半导体器件1g的背表面上形成的焊料层9的材料较高熔点材料。
因此,各半导体器件1g为一种封装结构,其中在树脂密封体8的主表面和背表面上之字形安排多个外部连接件5,并且因此能以垂直层叠状态安装两个相同半导体器件1g,因而使得有可能获得一种高密度封装的组件。
因而在本实施例中,已经参考了层叠两个相同半导体器件1g的一例。在这种情况下,可以将图27所示半导体器件1h或图28所示半导体器件1j用作上面半导体器件。
虽然以上已经作为其实施例具体地描述了本发明,但是不用说本发明不限于上述实施例,并且在不违反本发明要点的范围之内可以实现各种改变。
以下是如这里公开的本发明的典型方式所获得效果的简短描述。
根据本发明,有可能改善一种适合多管脚结构的半导体器件的制造产量。
Claims (32)
1.一种半导体器件,包括:
一个半导体芯片,具有多个在其主表面上安排的电极;
多个引线,分别与半导体芯片上的多个电极电连接;和
一个树脂密封体,密封半导体芯片和多个引线,
其中多个引线包括第一引线和邻近第一引线的第二引线,第一引线具有从树脂密封体的安装表面露出,并且接近树脂密封体的侧面设置的第一外部连接件,第二引线具有从树脂密封体的安装表面露出,并且相对于第一外部连接件较接近于半导体芯片设置的第二外部连接件,并且
其中第一和第二引线固定在半导体芯片上。
2.根据权利要求1的半导体器件,
其中第一和第二引线的一端部分固定在半导体芯片的主表面上,以及其与该一端部分相对的相对端部分安排为接近树脂密封体的侧面。
3.根据权利要求1的半导体器件,
其中第一和第二引线伸过半导体芯片的外围边缘,并且
其中在第一和第二引线上位于半导体芯片外侧位置处,形成第一和第二外部连接件。
4.根据权利要求1的半导体器件,
其中第一和第二引线各包括一个在半导体芯片的主表面上延伸的第一部分,一个从第一部分向树脂密封体的安装表面侧弯曲的第二部分,以及一个从第二部分向树脂密封体的侧面延伸的第三部分,并且
其中分别在第一和第二引线的第三部分上形成第一和第二外部连接件。
5.根据权利要求4的半导体器件,其中第一和第二引线的第一部分固定在半导体芯片的主表面上。
6.根据权利要求1的半导体器件,其中半导体芯片的主表面设置在树脂密封体的安装表面侧。
7.根据权利要求1的半导体器件,其中与半导体芯片的主表面相对的背表面从树脂密封体露出。
8.根据权利要求1的半导体器件,
其中与半导体芯片的主表面相对的背表面设置在树脂密封体的安装表面侧。
9.根据权利要求4的半导体器件,
其中每个第一和第二外部连接件的宽度比每个第一和第二引线的第三部分的宽度大。
10.根据权利要求4的半导体器件,
其中相邻的所述第一和第二外部连接件之间的间隔比第一和第二引线的相邻的所述第三部分之间的间隔窄。
11.根据权利要求1的半导体器件,
其中每个第一和第二外部连接件的厚度比每个第一和第二引线的厚度大。
12.根据权利要求1的半导体器件,其中第一和第二外部连接件从树脂密封体的安装表面伸出。
13.根据权利要求1的半导体器件,其中多个引线通过接合线与半导体芯片的多个电极电连接。
14.根据权利要求1的半导体器件,
其中与其厚度方向相交的半导体芯片的平面形状为四边形,并且其中在半导体芯片的主表面上沿两条中心线中的一条中心线中心安排多个电极。
15.根据权利要求1的半导体器件,
其中与其厚度方向相交的半导体芯片的平面形状为矩形,并且沿和半导体芯片的主表面的长边相同方向延伸的一条中心线中心安排多个电极。
16.根据权利要求1的半导体器件,
其中第一和第二引线各自通过一个绝缘带固定在半导体芯片上。
17.一种半导体器件,包括
一个半导体芯片,具有多个在其主表面上安排的电极;
一个第一引线组,包括多个引线,沿半导体芯片的第一边安排,并且分别与半导体芯片上的多个电极电连接;
一个第二引线组,包括多个引线,沿与半导体芯片的第一边相对的第二边安排,并且分别与半导体芯片上的多个电极电连接;和
一个树脂密封体,密封半导体芯片及第一和第二引线组,
其中,第一和第二引线组各包括彼此相邻的第一引线和第二引线,第一引线具有从树脂密封体的安装表面露出,并且接近树脂密封体的侧面设置的第一外部连接件,第二引线具有从树脂密封体的安装表面露出,并且相对于第一外部连接件较接近于半导体芯片设置的第二外部连接件,
第一和第二引线固定在半导体芯片上。
18.根据权利要求17的半导体器件,
其中第一引线组中的第一和第二引线的一端部分固定在半导体芯片的主表面上,以及其与该一端部分相对的相对端部分设置为接近树脂密封体的第一侧面,并且
其中第二引线组中的第一和第二引线的一端部分固定在半导体芯片的主表面上,以及其与该一端部分相对的相对端部分设置为接近与树脂密封体的第一侧面相对的第二侧面。
19.根据权利要求17的半导体器件,
其中第一和第二引线各包括一个在半导体芯片的主表面上延伸的第一部分,一个从第一部分向树脂密封体的安装表面侧弯曲的第二部分,以及一个从第二部分向树脂密封体的侧面延伸的第三部分,并且
其中分别在第一和第二引线的第三部分设置第一和第二外部连接件。
20.一种制造半导体器件的方法,包括如下步骤:
提供一个引线框架,该引线框架具有相互邻近的第一和第二引线,还具有在第一引线上形成的第一外部连接件,和在第二引线上形成并且相对于第一外部连接件在引线的一端侧设置的第二外部连接件,以及提供一个具有第一模和第二模的模具,第一模在第一配合表面上具有一个第一夹紧部分,和一个邻接第一夹紧部分的腔,第二模在与第一配合表面相对的第二配合表面上具有一个与第一夹紧部分相对的第二夹紧部分;
将第一和第二引线的一端部分固定在半导体芯片上;
将半导体芯片的主表面上安排的多个电极分别与第一和第二引线电连接;以及
通过第一和第二夹紧部分将与第一和第二引线的第一端部分相对的相对端部分夹在中间,并且在允许第一和第二连接件与一个设置在第一和第二引线与第二配合表面之间的树脂片接触的时候,将树脂注入腔,以用树脂密封半导体芯片及第一和第二引线。
21.根据权利要求20的方法,其中第一和第二引线的一端部分固定在半导体芯片的主表面上。
22.根据权利要求20的方法,
其中第一和第二引线伸过半导体芯片的外围边缘,并且
其中分别在第一和第二引线上位于半导体芯片外侧位置处形成第一和第二外部连接件。
23.根据权利要求20的方法,
其中第一和第二引线各包括一个在半导体芯片的主表面上延伸的第一部分,一个从第一部分向第二配合表面侧弯曲的第二部分,以及一个从第二部分向第一和第二夹紧部分延伸的第三部分,并且分别在第一和第二引线的第三部分上形成第一和第二外部连接件。
24.根据权利要求23的方法,其中第一和第二引线的第一部分固定在半导体芯片的主表面上。
25.根据权利要求20的方法,其中半导体芯片的主表面面对树脂片。
26.根据权利要求20的方法,其中与半导体芯片的主表面相对的背表面和腔的内壁表面接触。
27.根据权利要求20的方法,其中与半导体芯片的主表面相对的背表面面对树脂片。
28.根据权利要求23的方法,
其中每个第一和第二外部连接件的宽度比每个第一和第二引线的第三部分的宽度大。
29.根据权利要求20的方法,
其中每个第一和第二外部连接件的厚度比每个第一和第二引线的厚度大。
30.根据权利要求20的方法,
其中使用接合线来实现半导体芯片上的电极与第一和第二引线之间的电连接。
31.根据权利要求20的方法,
其中与其厚度方向相交的半导体芯片的平面形状为四边形,并且
其中在半导体芯片的主表面上沿两条中心线中的一条中心线来中心安排多个电极。
32.根据权利要求20的方法,其中通过一个绝缘带将第一和第二引线固定在半导体芯片上。
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JP166549/2002 | 2002-06-07 | ||
JP2002166549A JP2004014823A (ja) | 2002-06-07 | 2002-06-07 | 半導体装置及びその製造方法 |
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JP (1) | JP2004014823A (zh) |
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CN104979335A (zh) * | 2014-04-10 | 2015-10-14 | 南茂科技股份有限公司 | 芯片封装结构及电子装置 |
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US7067905B2 (en) * | 2002-08-08 | 2006-06-27 | Micron Technology, Inc. | Packaged microelectronic devices including first and second casings |
US20040137664A1 (en) * | 2003-01-09 | 2004-07-15 | Gidon Elazar | Advanced packaging shell for pocketable consumer electronic devices |
JP4407489B2 (ja) * | 2004-11-19 | 2010-02-03 | 株式会社デンソー | 半導体装置の製造方法ならびに半導体装置の製造装置 |
JP2007095804A (ja) * | 2005-09-27 | 2007-04-12 | Towa Corp | 電子部品の樹脂封止成形方法及び装置 |
KR100815013B1 (ko) * | 2005-09-27 | 2008-03-18 | 토와 가부시기가이샤 | 전자부품의 수지밀봉 성형 방법 및 장치 |
US7863737B2 (en) * | 2006-04-01 | 2011-01-04 | Stats Chippac Ltd. | Integrated circuit package system with wire bond pattern |
US7926173B2 (en) | 2007-07-05 | 2011-04-19 | Occam Portfolio Llc | Method of making a circuit assembly |
CN101682990A (zh) * | 2007-05-08 | 2010-03-24 | 奥卡姆业务有限责任公司 | 无焊料电子组件及其制造方法 |
US8300425B2 (en) * | 2007-07-31 | 2012-10-30 | Occam Portfolio Llc | Electronic assemblies without solder having overlapping components |
JP5334239B2 (ja) | 2008-06-24 | 2013-11-06 | ルネサスエレクトロニクス株式会社 | 半導体装置の製造方法 |
US8212342B2 (en) * | 2009-12-10 | 2012-07-03 | Stats Chippac Ltd. | Integrated circuit package system with removable backing element having plated terminal leads and method of manufacture thereof |
TWI416637B (zh) * | 2010-10-15 | 2013-11-21 | Chipmos Technologies Inc | 晶片封裝結構及晶片封裝方法 |
US8946875B2 (en) * | 2012-01-20 | 2015-02-03 | Intersil Americas LLC | Packaged semiconductor devices including pre-molded lead-frame structures, and related methods and systems |
US11621181B2 (en) * | 2020-05-05 | 2023-04-04 | Asmpt Singapore Pte. Ltd. | Dual-sided molding for encapsulating electronic devices |
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US5798570A (en) * | 1996-06-28 | 1998-08-25 | Kabushiki Kaisha Gotoh Seisakusho | Plastic molded semiconductor package with thermal dissipation means |
JP2954148B1 (ja) | 1998-03-25 | 1999-09-27 | 松下電子工業株式会社 | 樹脂封止型半導体装置の製造方法およびその製造装置 |
JP3424184B2 (ja) | 1998-05-13 | 2003-07-07 | 株式会社三井ハイテック | 樹脂封止型半導体装置 |
TW434756B (en) * | 1998-06-01 | 2001-05-16 | Hitachi Ltd | Semiconductor device and its manufacturing method |
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