CN1299517A - 形成薄膜的方法 - Google Patents

形成薄膜的方法 Download PDF

Info

Publication number
CN1299517A
CN1299517A CN99805632A CN99805632A CN1299517A CN 1299517 A CN1299517 A CN 1299517A CN 99805632 A CN99805632 A CN 99805632A CN 99805632 A CN99805632 A CN 99805632A CN 1299517 A CN1299517 A CN 1299517A
Authority
CN
China
Prior art keywords
substrate
film
silicon
molecular
molecule
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN99805632A
Other languages
English (en)
Other versions
CN1146025C (zh
Inventor
上野智雄
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
TOKYO AGRICULTURAL AND INDUSTRIAL UNIV
Original Assignee
TOKYO AGRICULTURAL AND INDUSTRIAL UNIV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by TOKYO AGRICULTURAL AND INDUSTRIAL UNIV filed Critical TOKYO AGRICULTURAL AND INDUSTRIAL UNIV
Publication of CN1299517A publication Critical patent/CN1299517A/zh
Application granted granted Critical
Publication of CN1146025C publication Critical patent/CN1146025C/zh
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Classifications

    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/22Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
    • C23C16/30Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
    • C23C16/40Oxides
    • C23C16/401Oxides containing silicon
    • C23C16/402Silicon dioxide
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/22Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
    • C23C16/30Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
    • C23C16/40Oxides
    • C23C16/401Oxides containing silicon
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/22Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
    • C23C16/30Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
    • C23C16/40Oxides
    • C23C16/409Oxides of the type ABO3 with A representing alkali, alkaline earth metal or lead and B representing a refractory metal, nickel, scandium or a lanthanide
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/44Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
    • C23C16/448Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for generating reactive gas streams, e.g. by evaporation or sublimation of precursor materials
    • C23C16/452Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for generating reactive gas streams, e.g. by evaporation or sublimation of precursor materials by activating reactive gas streams before their introduction into the reaction chamber, e.g. by ionisation or addition of reactive species
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02126Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
    • H01L21/02131Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC the material being halogen doped silicon oxides, e.g. FSG
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02126Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
    • H01L21/0214Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC the material being a silicon oxynitride, e.g. SiON or SiON:H
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02164Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/0217Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02172Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
    • H01L21/02197Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides the material having a perovskite structure, e.g. BaTiO3
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/0223Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate
    • H01L21/02233Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer
    • H01L21/02236Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor
    • H01L21/02238Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor silicon in uncombined form, i.e. pure silicon
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/02247Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by nitridation, e.g. nitridation of the substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/02249Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by combined oxidation and nitridation performed simultaneously
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/02252Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by plasma treatment, e.g. plasma oxidation of the substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H01L21/02274Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/314Inorganic layers
    • H01L21/3143Inorganic layers composed of alternated layers or of mixtures of nitrides and oxides or of oxinitrides, e.g. formation of oxinitride by oxidation of nitride layers
    • H01L21/3145Inorganic layers composed of alternated layers or of mixtures of nitrides and oxides or of oxinitrides, e.g. formation of oxinitride by oxidation of nitride layers formed by deposition from a gas or vapour
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/314Inorganic layers
    • H01L21/316Inorganic layers composed of oxides or glassy oxides or oxide based glass
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/314Inorganic layers
    • H01L21/316Inorganic layers composed of oxides or glassy oxides or oxide based glass
    • H01L21/31604Deposition from a gas or vapour
    • H01L21/31608Deposition of SiO2
    • H01L21/31612Deposition of SiO2 on a silicon body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/314Inorganic layers
    • H01L21/318Inorganic layers composed of nitrides
    • H01L21/3185Inorganic layers composed of nitrides of siliconnitrides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H01L21/0228Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition deposition by cyclic CVD, e.g. ALD, ALE, pulsed CVD

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Materials Engineering (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Metallurgy (AREA)
  • General Chemical & Material Sciences (AREA)
  • Mechanical Engineering (AREA)
  • Organic Chemistry (AREA)
  • Inorganic Chemistry (AREA)
  • Plasma & Fusion (AREA)
  • Formation Of Insulating Films (AREA)
  • Chemical Vapour Deposition (AREA)
  • Physical Or Chemical Processes And Apparatus (AREA)
  • Other Surface Treatments For Metallic Materials (AREA)

Abstract

在向衬底上沉积气态分子(每种气体分子由多个原子组成)的薄膜形成方法中,或者使所述气态分子与所述衬底的组成元素反应在所述衬底上形成化合物薄膜的薄膜形成方法中,产生含有其能量高于把所述气态分子离解成其原子态分子所需能量的准稳能级的激发的惰性气态分子和所述气态分子,然后,所述气态分子在沉积到所述衬底上之前离解成其原子态的元素。因此,不要求所述气态分子在所述衬底上的离解,导致了所述薄膜形成方法的温度降低。

Description

形成薄膜的方法
本发明涉及形成薄膜的方法。
薄膜形成技术在材料和器件的开发中起重要作用。在近来利用微制备技术的非常大集成技术中,希望建立一种特别用于ULSI等电子器件的新型薄膜形成技术。到目前为止,主要采用CVD法或热氧化法,在CVD法中,从外部气体中提供在衬底上形成薄膜的所有组成元素,在热氧化法中,来自外部气体中的元素与衬底的组成元素反应形成薄膜。在上述两种方法中,以分子形式把来自外部气体的元素引入到真空容器中。
近来,元器件的小型化限制了其薄膜形成方法,特别要求降低其工艺温度。使所述工艺温度较高的因素之一是来自外部气体的组成元素以分子形式提供。也就是说,在所述薄膜形成过程中要求构成所述分子态元素的一部分原子必须是由所述分子所提供或离解的原子态元素。传统的薄膜形成技术在靠近加热的衬底处离解所提供的分子态元素,所以需要所加热的衬底提供所述离解的能量。因此,它本身限制了薄膜形成过程的低温化。
在从外部气氛提供所述组成元素并把所述元素沉积在衬底上的上述薄膜形成技术中,为了降低工艺温度,在一部分薄膜形成过程中提出并实际使用了溅射法或其中使用给定等离子体的等离子CVD法。前一种方法用等离子体能量腐蚀固体靶材并把所腐蚀的颗粒沉积在给定的衬底上,后一种方法离解所提供的原料气体并把离解的元素沉积在给定的衬底上。在向所给定的衬底上提供来自原料气体预先离解的元素方面,这些方法普遍地用于解决上述问题。
另一方面,在使外部气体提供的元素与所述衬底的组成元素反应的上述方法中典型的硅衬底热氧化法,已经被广泛用于MOSFETs的栅氧化物薄膜的形成过程中。在热氧化法中,通过把硅衬底在800℃和更高加热和保温并置于氧化气氛(氧分子气氛)中可以容易地形成具有良好质量的栅绝缘薄膜。所得的氧化硅薄膜一般称为“热氧化膜”。在B.E.Deal和A.s.Grove在“应用物理学报第3770页,No.36(1965)中以及W.R.Beadle,J.C.C.Tsai和R.D.Plummer在“John Wiley&SonsCo.”(1985)出版的“硅集成电路工艺简明参考手册”介绍了上述方法。使用高温和大激发能量法的主要原因是氧化硅薄膜/硅衬底界面表现出良好的电性能。
虽然已经试图用许多方法在低温下在硅衬底上形成氧化硅薄膜,例如作为直接沉积法的溅射法或等离子CVD法,但是一般来说,他们表现出极低的界面-能级密度(Dit),这是界面特性的典型参考特征。其原因是在形成所述氧化硅薄膜/硅衬底界面之后仍然保持靠近所述硅衬底表面的悬挂键,这种悬挂键直接影响所述Dit。在CVD法中,可以由氢原子结束一部分悬挂键,但是,所述硅原子/氢原子键在要求约400℃温度的过程中通常很容易被切断。因此,所述氧化硅薄膜的低温形成法缺少长期可靠性,并且在用于形成LSIs的栅氧化物薄膜时存在问题。
此外,试图采用直接从外部气体中引入在等离子气体中解离的元素并使解离的元素与衬底的组成元素反应的方法来降低工艺温度。然而,众所周知,在等离子体中引入每个分子由多个原子组成的许多分子时,所述等离子体具有非常宽的能量分布,所述分子转变成许多活性物质,包括离子。这样获得的薄膜质量不好,所以,在形成要求苛刻条件的MOSFETs的栅氧化物薄膜中几乎从来不用上述方法。
除了氧化硅材料之外,氮化硅材料也可以用作所述栅氧化物薄膜或者钝化膜,这种钝化膜是一种绝缘薄膜。通过与氧化硅薄膜类似的许多方法形成所述氮化硅薄膜。在形成氮化硅栅氧化物薄膜的情况下,由于所述薄膜在其硅/氮化硅界面不希望地具有许多界面能级,所以,一般形成具有硅/氧化硅/氮化硅界面的薄膜。
近来,形成元器件的后续方法强烈要求低温法。为了满足这一要求,希望在整个薄膜形成方法中采用降低工艺温度的技术。
这些年来,MOSFETs的小型化和驱动能源电压的降低达到了它们的极限,所以,传统的热氧化薄膜不能获得足够质量的MOSFETs。原因之一是在800℃高温热处理几十次。也就是说,当所述小型化要求控制MOSFET半导体的杂质分布精确地在其浅分布范围内时,所述高温热处理破坏了这种精确的浅杂质分布。如上所述,由于有许多悬挂键,不要求高温热处理的CVD法或溅射法降低绝缘性能和界面质量。因此,MOSFETs的小型化不能容忍高温热处理,所以不能获得具有良好质量的绝缘薄膜。
此外,还存在由于MOSFETs周围环境变化产生的问题。使用大尺寸晶片提高生产率必须满足完全在晶片表面上的所有MOSFETs中性能的均匀性。在对应于大尺寸晶片的大尺寸设备内使用传统热氧化法形成氧化物薄膜的情况下,由于加热过程中温度的波动,氧化所述晶片表面的约1.1eV的较大激活能改变了反应速度。这意味着在晶片上难以获得具有均匀厚度的氧化物薄膜。在通过增加每个芯片上的MOSFET数量进行复杂计算时,MOSFETs内性能的波动变得不能容忍并且是剧烈的。所以,对于许多在晶片上的MOSFETs来说,必须形成具有均匀特性的绝缘薄膜。
对于栅氧化物薄膜,采用低温形成的绝缘膜要求降低其Dit值,但是目前为了保持栅氧化物薄膜的电性能,要求高温法。虽然在使用小尺寸晶片并且不进行微制备的条件下,高温、大激活能的方法已经优选以用于维持电性能,但是,对于更小型化并增大晶片尺寸而不损失电性能的情况,要求低温、小激活能的方法。
为了在所述薄膜形成方法中实现低温,可以以原子状态离解构成所述薄膜的元素的分子并提供所离解的元素。另一方面,如果所述分子的元素以不同于其基态的激发态作为其分子状态,它们具有保持其分子状态的激发态(分子激发态),它们的离子化状态保持其分子状态(分子离子化状态)及其完全是原子态的离解状态(原子状态)。在从等离子体向所述分子的元素提供能量时,用较低的能量它们就具有上述状态。因此,当所述分子的元素激发到原子状态时,例如,它们必须具有另一种低能量状态。而且,当它们需要高能量才能激发到所述原子状态时,它们几乎从来不被激发到原子状态。
根据分子态元素到原子态元素的离解方法,惰性气体分子预先吸收等离子体能量并且具有其准稳定的大的能级能量,然后向分子态元素放出能量,使得所述的分子态元素直接激发到高能状态并且容易地离解成原子态元素。
在提供能量通过离解氧分子产生原子态氧元素的情况下,氧分子通过低能量转变具有O3P、O1D、O3S等状态。由于每种状态的氧分子分别具有不同激发程度,如果用于各种氧化反应,预计这些氧分子表现出不同的氧化速度和机理。如果具有各种准稳定状态能量的惰性气体分子与氧分子撞击产生等离子体,可以控制在所述等离子体中产生的原子态氧元素的种类。
对于把分子态元素离解成原子态元素,惰性气体分子,而不是分子态的元素,吸收等离子体能量,从而抑制了所述分子态元素无用的激发。因此,引入其量等于或大于所述分子态元素的量的惰性气体,从而从所述分子态元素有效地产生原子态元素。
在形成本发明的绝缘薄膜的方法中,构成所述绝缘薄膜的分子态硅化合物元素以原子态引入到衬底表面上。通过吸收高于原子化所需要的等离子体能量的惰性气体分子发射能量进行所述原子化。因此,所述分子态元素直接激发到在所述分子激发态和所述分子离子化态之外的原子化状态。当所述分子态元素是氧分子时,所述硅衬底被氧化,所述分子态元素是氮气时,所述硅衬底被氮化。所述反应具有低激发能,因此,它们容易在硅衬底表面上进行,而不取决于它们在所述衬底上反应温度的差异。而且,由于这些反应反复地切断硅-硅键,产生硅-氧键或硅-氮键,所获得的绝缘薄膜/硅衬底界面几乎没有悬挂键,并具有低界面能级密度,因此,可以在所述硅衬底上形成具有优异绝缘特性的绝缘薄膜。因此,可以在低温在所述硅衬底上形成具有优异均匀特性的绝缘薄膜。
为了更好地理解本发明,参考附图,其中:
图1是把一种分子态元素离解成其原子态元素的薄膜形成设备的结构图,
图2是解释由于氦分子(He)和氢分子元素(H2)的能态跃迁产生的能态和光发射的图,
图3是表示在引入氦气态分子时氢分子元素的发射光谱的图,
图4是把三种分子态元素离解成其原子态元素的薄膜形成设备的结构图,
图5是使用三种原料气体和一种原子态离解的分子态元素的薄膜形成设备的结构图,
图6是使用一种原料气体和一种原子态离解的分子态元素的薄膜形成设备的结构图,
图7是使用两种原子态离解的分子态元素的薄膜形成设备的结构图,
图8是表示在引入其量等于或大于氢分子元素量的氦气态分子时,所述氢分子态元素的发生光谱的图,
图9是硅衬底的示意截面图,其中,所述绝缘薄膜在源极区中和漏极区域中有开口。
图10是分隔的硅衬底的示意图。
[本发明优选的第一实施方案]
下面将参考附图详细描述本发明。
图1是在这个优选实施方案中的薄膜形成设备的结构图。在该实施方案中,通过使用从氦气和氢气的混合气体组成的等离气体产生的原子态氢元素,在铂衬底上形成含有高浓度氢元素的铂(Pt)薄膜。在图中,数字“1”表示真空容器。通过柔性管2向真空容器1中引入氢气和氦气组成的混合气体。把所述混合气体在带有微波腔的石英管4中激发到等离子态。带有微波腔3的石英管4可以连接到在真空容器1的右侧的法兰5上。连接到真空管1的法兰5的另一侧的光谱仪6可以分析所述等离子体中的光发射。作为衬底7的铂板固定在真空容器1中的加热夹具8上。
首先,通过泵100把真空容器1的内部抽真空到1×10-5乇和更低。然后,通过加热所述加热夹具1,把衬底7加热到300℃。通过石英管4向真空容器1中引入氦气和氢气的混合气体到1乇的压力。氦气和氢气的混合比为1∶1。随后,通过微波腔3向石英管4中引入2.45GHz、100W的微波。所产生的原子态氢元素供应到铂衬底上,在所述铂衬底上形成含有高浓度氢元素的铂薄膜。
下面将详细解释上述薄膜形成过程。图2图解解释其中使用等离子体能量进行所述氢分子元素的原子化的方法。在图2中,氦气体分子的激发能级比其基态能级高19.82eV。另一方面,氢分子元素获得约19eV的能量使其自身离解成为原子态的元素。处于激发态的离解的原子态氢元素发射出121.6nm的真空紫外线成为处于基态的原子态氢元素。在所述等离子体中的氦气体分子的含量等于或大于所述氢分子元素的量的情况下,如本实施方案中所述,所述氢分子元素从激发的氦气体分子获得能量使其本身离解成为原子化的氢元素。但是,在所述等离子体中只有氢分子元素的情况下,所述元素直接激发,几乎不会产生原子态的氢元素。
图3表示从氦气和氢气混合气体的等离子体中有效产生原子态氢元素的状态。在图3中,用光谱仪6测定发射光谱。与只有氢分子元素的等离子体的发射光谱相比,所述发射光谱在121.6nm的波长有一个大峰,在160nm的波长有一个小峰,这表示所述氢分子元素的分子态激发。
[本发明优选的第二实施方案]
下面将参考图4解释根据本发明的绝缘薄膜的形成方法。这里,图4中与图1类似的部件用相同的数字表示。在该实施方案中,形成用SiOF低介电常数材料制成的薄膜,用于钝化在绝缘薄膜上铝(Al)线。图4中,数字“9”表示真空容器。等离子体发生设备10、11和12连接到真空容器9上,每个设备有结合在一起的柔性管2、微波腔3、和石英管4。然后,与图1类似,提供光谱仪13、衬底14和加热夹具15。
首先,用泵100把真空容器9抽真空到1×10-4乇或更低。然后,通过加热所述加热夹具15到200℃,加热衬底14。所述衬底通过在布线上的绝缘薄膜进行图形化暴露铝线。分别向等离子体发生设备10、11和12中引入硅烷(SiH4)气体和氩(Ar)气的混合气体、氧(O2)气和氙(Xe)气的混合气体以及氟(F2)气和氪(Kr)气的混合气体。然后,向所述等离子发生设备中引入2.45GHz、100W的微波,产生其中由上述混合气体组成的等离子体。所获得的原子态硅元素、原子态氧元素和原子态氟元素供给到所述衬底上,形成低介电常数的SiOF薄膜。通过调整上述原子态元素的比例可以控制所述SiOF薄膜的组成。
[本发明优选的第三个实施方案]
在该实施方案中,下面将描述根据本发明的铁电体薄膜的形成方法。图5是本实施方案用于铁电体薄膜的薄膜形成设备。在该实施方案中,在由铂/氧化镁(MgO)叠层结构组成的底层上形成由Pb(Zr,Ti)O3铁电体氧化物组成的薄膜。在图5中,数字“16”表示真空容器,数字“17”表示等离子体发生设备。这里,图5中与图1中类似的部件用相同的数字表示。把具有铂/氧化镁叠层结构的衬底18固定在真空容器16中的加热夹具19上。在真空容器16的侧面提供3个进气口20。
用泵100把真空容器16的内部抽真空到1×10-5乇和更低。在真空条件下,通过加热加热夹具19,把衬底18加热到450℃。从进气口20向真空容器1中引入四乙基铅(TEL:Pb(C2H5)4)气体、四叔丁醇钛(BOZ:Zr(t-OC4H9)4)气体和四异丙醇钛(POT:Ti(i-OC3H7)4)气体,作为原料气。此外,作为氧化气体,通过等离子发生设备17向真空容器16中引入氖(Ne)气和氧气的混合气体。由所述混合气体组成的等离子体产生的原子态氧元素在真空容器16中与上述原料气反应,在衬底18上形成Pb(Zr,Ti)O3薄膜。与仅由氧气组成的等离子体相比,由所述混合气体组成的等离子体改进了所述薄膜的氧化反应。
[本发明优选的第四个实施方案]
在该实施方案中,将解释半导体化合物薄膜的形成方法。图6表示本实施方案的薄膜形成设备。在本实施方案中,在蓝宝石(Al2O3)制成的衬底上形成氮化镓(GaN)制成的薄膜。在图6中,数字“21”表示真空容器,数字“22”表示等离子体发生设备。这里,在图6中与图中类似的部件用相同的数字表示。把Al2O3衬底23固定在真空容器21内的加热夹具24上。此外,在真空容器21上提供进气口25。
用泵100把真空容器21内部抽真空到1×10-5乇和更低。在真空条件下,通过加热加热夹具24加热Al2O3衬底23。然后,从进气口25引入作为原料气的镓气体。作为另一种原料气的氮气与氦气混合并且用2.45MHz、100W的微波在等离子发生设备22中把所述氮分子元素激发成为原子态的氮元素。使用从所述氮分子元素(几乎从不离解)产生的原子态氮元素,可以在比过去更低的温度下形成GaN薄膜和该薄膜的缓冲层。
[本发明优选的第五个实施方案]
在本实施方案中,将解释根据本发明的无定形半导体薄膜的形成方法。在该实施方案中,使用与第一个实施方案相同的薄膜形成设备。在该实施方案中,在玻璃衬底上形成的透明电极上形成用于太阳能电池的无定形硅薄膜。因此,在本实施方案中,图1中的衬底7由所述玻璃衬底和所述透明电极薄膜组成。
用泵100把真空容器1内部抽真空到1×10-5乇和更低。在真空条件下,通过加热加热夹具7,把具有透明电极薄膜/玻璃衬底叠层结构的衬底7加热到300℃。作为原料气的硅烷气体用氩气稀释,氩气用量为硅烷用量的5倍,并通过石英管4引入到真空容器1中达到1乇。通过微波腔向石英管4中引入2.45MHz、100W的微波,产生由所述硅烷气体和所述氩气组成的等离子体。所述氩气分子几乎吸收了等离子体的全部能量,从而使硅烷气体分子从激发态的氩气分子获得能量(11.6eV)。因此,所述硅烷气体分子被离解成原子态硅元素,从而形成具有良好质量的无定形硅薄膜。
[本发明优选的第六个实施方案]
在本实施方案中,将解释钝化薄膜的形成方法。图7表示本实施方案的薄膜形成设备。在本实施方案中,形成氧化硅(SiO2)薄膜用于钝化在绝缘薄膜上形成的铝线。在图7中,数字“26”表示真空容器,数字“27”和“28”表示等离子体发生设备。这里,在图7中与图1中类似的部件用相同的数字表示。把由所述绝缘薄膜和在所述绝缘薄膜上形成的图形化的铝布线结构组成的衬底29固定在安装在真空容器26中的加热夹具30上。
首先,用泵100把真空容器26内部抽真空到1×10-5乇和更低。在真空条件下,通过加热加热夹具30,把衬底29加热到300℃。然后,把硅烷气体用氩气稀释,氩气用量为所述硅烷气体量的5倍,并在等离子体发生设备27中产生由所述硅烷气体和氩气组成的等离子体。因此,与第五个实施方案一样,所述硅烷气体分子离解成原子态硅元素,并引入到真空容器26中。用同样的方法,氧气用氪气稀释,氪气用量为氧气量的20倍,并把所获得的混合气体引入到等离子发生设备28中。因此,从所述氧分子态元素产生原子态的氧元素,从而在衬底29上形成SiO2薄膜。这里,所述真空容器中的压力为1乇。用同样的方法,可以用氩气-硅烷混合气体和氦气-氮气混合气体产生的原子态硅元素和原子态氮元素形成氮化硅薄膜。
[本发明优选的第七个实施方案]
在本实施方案中,将描述把分子态元素有效离解成其原子态元素的方法。在本实施方案中,使用与第一个实施方案相同的设备。在本实施方案中,氢分子态元素被有效地离解成其原子态氢元素。图8表示在由氦气∶氢气=25∶1的混合气体组成的等离子体中原子态氢元素的发射光谱。用光谱仪6测定所述发射光谱。与氦气∶氢气=1∶1的混合气体组成的等离子体相比,氦气∶氢气=25∶1的混合气体组成的等离子体(即氦气含量大于氢气含量)在121.6nm的波长表现出极大峰,在160nm左右表现出极小峰。本实施方案中的离解方法可用于第一到第四个实施方案,所以,氧分子态元素、氟分子态元素和氮分子态元素可以有效离解成其原子态元素。
[本发明优选的第八个实施方案]
在本实施方案中,将解释形成P掺杂硅区域的方法。在本实施方案中,使用与第一个实施方案相同的设备。在本实施方案中,与第一个实施方案中的衬底7一样,使用在源极区域和漏极区域有开口的带有图形化绝缘薄膜的硅衬底。
首先,用泵100把真空容器1的内部抽真空到1×10-5乇和更低。在真空条件下,通过加热加热夹具8,把衬底7加热到500℃。把作为含P原料气的P2O5气体与氦气混合,并把所述混合气体通过石英管4引入到真空容器1中。通过微波腔3向石英管4中引入2.45GHz、100W的微波,产生由P2O5气体和氦气组成的混合气体。所述氦气体分子几乎从所述等离子体中吸收了全部能量,并把其激发能给予P2O5分子态元素。因此,所述P2O5分子态元素几乎全部离解成其原子态元素,从而在所述衬底的开口处形成P掺杂的硅区域。而且,可以使用B2O3气体和氖气的混合气体代替上述混合气体形成硼(B)掺杂的硅区域。
[本发明优选的第九个实施方案]
在本实施方案中,将解释硼掺杂的硅薄膜的形成方法。在本实施方案中,使用与第六个实施方案相同的设备。衬底30用硅材料制成。
首先,用泵100把真空容器26的内部抽真空到1×10-5乇和更低。在真空条件下,通过加热加热夹具30,把衬底29加热到500℃。然后把作为含B原料气的B2O3气体与氖气混合,并把所述混合气体引入到等离子体发生设备27中。向等离子体发生设备28中引入氩气和硅烷气体的混合气体。然后,分别从所述混合气体产生原子态硼元素和原子态硅元素,因此,在所述硅衬底上形成了硼掺杂的硅薄膜。
[本发明优选的第十个实施方案]
在本实施方案中,将解释栅氧化物薄膜的形成方法。在本实施方案中,使用与第一个实施方案相同的薄膜形成设备。而且,在本实施方案中,衬底7由图10所示的分立硅衬底组成。
首先,用泵100把真空容器1的内部抽真空到1×10-5乇和更低。在真空条件下,通过加热加热夹具8,把分立的硅衬底加热到500℃。然后,通过石英管4向真空容器1中引入氩气和氧气到1乇的压力。在这种情况下,所述混合气体的比例为氩气∶氧气=25∶1,流量为100sccm。通过微波腔3向石英管4中引入2.45GHz、100W的微波,产生由所述氩气和氧气组成的混合气体的等离子体。大多数氩分子从所述等离子体中吸收了几乎所有的能量,并把所述氩激发能量给予所述氧分子态元素。因此,从所述氧分子态元素产生所述原子态氧元素,并与构成所述硅衬底的硅元素反应,在硅衬底7的开口处形成氧化硅薄膜。在本实施方案中,所述硅衬底的氧化速度近似等于使用氧分子元素的常规的800℃热氧化法的氧化速度。
[本发明优选的第十一个实施方案]
在本实施方案中,将解释用氪元素和氧元素氧化硅衬底的薄膜形成方法。在本实施方案中,使用与第一个实施方案相同的薄膜形成设备。而且,在本实施方案中,与第十个实施方案中的衬底7一样,使用图10所示的分隔的硅衬底。
首先,用泵100把真空容器1的内部抽真空到1×10-5乇和更低。在真空条件下,通过加热加热夹具8,把衬底7加热到500℃。然后,以100sccm的流量引入氪气∶氧气=25∶1的混合气体到1乇的压力。通过微波腔3向石英管4中引入2.45GHz、100W的微波,产生由氪气和氧气的混合气体组成的等离子体。所述氪分子从所述等离子体中吸收了几乎所有能量,并把其激发能(9.92eV)给予所述氧分子态元素。因此,所述氧分子态元素几乎全部离解成其原子态氧元素并氧化所述分隔衬底7的开口区域。所获得的SiO2/Si界面的界面能级密度在Dit为3×1011/cm2·eV(中间能隙)。而且,在通过把衬底温度从300℃改变为600℃测量所述氧化反应的活化能时,它是约0.14eV,所述氧化反应的活化能是在所述氧化反应中控制所述扩散速度的指标。这意味着对于所述衬底温度的变化,所述氧化速度的变化是非常小的。在本实施方案中,400℃的衬底温度给出的SiO2/Si界面的界面能级密度在Dit为5×1011/cm2·eV(中间能隙)。
[本发明优选的第十二个实施方案]
在本实施方案中,将解释使用氙元素和氧元素氧化硅衬底的薄膜形成方法。在本实施方案中,使用与第一个实施方案中相同的薄膜形成设备。而且,在本实施方案中,与第十个实施方案中的衬底7一样,使用图10所示的分隔的硅衬底。
首先,用泵100把真空容器1的内部抽真空到1×10-5乇或更低。在真空条件下,通过加热加热夹具8,把衬底7加热到500℃。然后,以100sccm的流量引入氙气∶氧气=25∶1的混合气体到1乇的压力。通过微波腔3向石英管4中引入2.45GHz、100W的微波,产生由氙气和氧气的混合气体组成的等离子体。所产生的原子态氧元素能使分隔的硅衬底7的开口部分被氧化。在使用氙和氧的混合气体组成的等离子体的本实施方案中,氧化速度几乎等于在常规的900℃热氧化法可以获得的氧化速度,并且可以在400℃的低温下实现所述硅衬底的氧化。
[本发明优选的第十三个实施方案]
在本实施方案中,将解释使用氦元素和氮元素氮化硅衬底的薄膜形成方法。在本实施方案中,使用与第一个实施方案相同的薄膜形成设备。而且,在本实施方案中,与第十个实施方案的衬底7相同,使用图10所示的分隔硅衬底。
首先,用泵100把真空容器1的内部抽真空到1×10-5乇和更低。在真空条件下,通过加热加热夹具8,把衬底7加热到600℃。然后,以100sccm的流量通过石英管4向真空容器1中引入氦气∶氮气=10∶1的混合气体。通过微波腔3向石英管4中引入2.45GHz和100W的微波,产生由氦气和氮气的混合气体组成的等离子体。
所获得的原子态氮元素能使分隔的硅衬底7的开口部分直接氮化。
[本发明优选的第十四个实施方案]
在本实施方案中,将描述形成氧氮化物薄膜(SiON)的形成方法。在本实施方案中,使用与第六个实施方案相同的薄膜形成设备。而且,在本实施方案中,与第十个实施方案的衬底7一样,将使用图10所示的分隔的硅衬底。
首先,用泵100把真空容器26的内部抽真空到1×10-5乇和更低。在真空条件下,通过加热加热夹具30,把衬底29加热到600℃。然后,向等离子体发生设备27中引入氪气∶氧气=25∶1的混合气体。并向等离子体发生设备28中引入氦气∶氮气=10∶1的混合气体。在这种情况下,真空容器中的压力为1乇。在所述等离子体发生设备中产生的原子态氧元素和原子态氮元素与构成硅衬底的硅元素反应,形成具有良好界面质量和高介电常数的的SiON薄膜。
(工业应用)
根据本发明,所述分子(每个分子由多个原子组成)可以有效地离解成其原子态的元素,使用所述分子可以实现低温薄膜形成方法。

Claims (11)

1.一种薄膜形成方法,包括向衬底上提供气态分子,每个分子由多个原子组成,其中,产生由惰性气体和含有所述气态分子的气体的混合气体组成的等离子体,来激发所述惰性气态分子,具有高于离解所述气态分子到其原子态元素所需能量的准稳能级的激发的惰性气体分子与所述气态分子碰撞,把所述气态分子离解成其原子态气体元素,向所述衬底上提供所述元素。
2.一种根据权利要求1的薄膜形成方法,其中,所述气态分子是氧分子。
3.一种根据权利要求1的薄膜形成方法,其中,所述气态分子是氮分子。
4.一种根据权利要求1-3的任一项的薄膜形成方法,其中,所述惰性气体的分子密度不小于混合气体中所述气态分子的分子密度。
5.一种根据权利要求1-4的任一项的薄膜形成方法,其中,所述衬底是硅衬底,所述气态分子含有构成在所述衬底上形成薄膜的硅化合物的元素。
6.一种根据权利要求5的薄膜形成方法,其中,至少一部分构成所述硅化合物的硅元素被离解成原子态的硅元素。
7.一种根据权利要求5的薄膜形成方法,其中,所述硅的化合物是氧化硅。
8.一种根据权利要求7的薄膜形成方法,其中,所述惰性气体是氪气,所述气态分子是要离解成氧化所述衬底的原子态氧元素的氧分子。
9.一种根据权利要求7的薄膜形成方法,其中,所述惰性气体是氙气,所述气态分子是要离解成氧化所述衬底的原子态氧元素的氧分子。
10.一种根据权利要求5的薄膜形成方法,其中,所述硅化合物是氮化硅,所述惰性气体是氦气,所述气态分子是要离解成氮化所述衬底的原子态氮元素的氮分子。
11.一种根据权利要求5的薄膜形成方法,其中,所述硅化合物是氧氮化硅。
CNB998056324A 1998-03-27 1999-03-23 形成薄膜的方法 Expired - Fee Related CN1146025C (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP122661/1998 1998-03-27
JP10122661A JPH11279773A (ja) 1998-03-27 1998-03-27 成膜方法

Publications (2)

Publication Number Publication Date
CN1299517A true CN1299517A (zh) 2001-06-13
CN1146025C CN1146025C (zh) 2004-04-14

Family

ID=14841514

Family Applications (1)

Application Number Title Priority Date Filing Date
CNB998056324A Expired - Fee Related CN1146025C (zh) 1998-03-27 1999-03-23 形成薄膜的方法

Country Status (9)

Country Link
US (1) US6746726B2 (zh)
EP (1) EP1071123B1 (zh)
JP (1) JPH11279773A (zh)
KR (1) KR100441836B1 (zh)
CN (1) CN1146025C (zh)
AU (1) AU748409B2 (zh)
CA (1) CA2326052A1 (zh)
DE (1) DE69934680D1 (zh)
WO (1) WO1999050899A1 (zh)

Families Citing this family (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6977808B2 (en) * 1999-05-14 2005-12-20 Apple Computer, Inc. Display housing for computing device
JP4105353B2 (ja) * 1999-07-26 2008-06-25 財団法人国際科学振興財団 半導体装置
KR100760078B1 (ko) * 2000-03-13 2007-09-18 다다히로 오미 산화막의 형성 방법, 질화막의 형성 방법, 산질화막의 형성 방법, 산화막의 스퍼터링 방법, 질화막의 스퍼터링 방법, 산질화막의 스퍼터링 방법, 게이트 절연막의 형성 방법
JP5068402B2 (ja) * 2000-12-28 2012-11-07 公益財団法人国際科学振興財団 誘電体膜およびその形成方法、半導体装置、不揮発性半導体メモリ装置、および半導体装置の製造方法
KR100837707B1 (ko) * 2001-01-22 2008-06-13 도쿄엘렉트론가부시키가이샤 전자 디바이스 재료의 제조 방법, 플라즈마 처리 방법, 및 산질화막 형성 시스템
AU2002354103A1 (en) * 2001-12-07 2003-06-17 Tokyo Electron Limited Nitriding method for insulation film, semiconductor device and production method for semiconductor device, substrate treating device and substrate treating method
TWI243422B (en) 2002-03-26 2005-11-11 Hitachi Int Electric Inc Semiconductor device producing method and semiconductor producing device
JP2003293128A (ja) * 2002-04-05 2003-10-15 Canon Inc 堆積膜形成方法
US7494904B2 (en) * 2002-05-08 2009-02-24 Btu International, Inc. Plasma-assisted doping
US7614111B2 (en) * 2002-08-09 2009-11-10 Colgate-Palmolive Company Oral care implement
JPWO2004025744A1 (ja) * 2002-09-13 2006-01-12 富士通株式会社 感磁素子及びその製造方法、並びにその感磁素子を用いた磁気ヘッド、エンコーダ装置、及び磁気記憶装置
US20040099283A1 (en) * 2002-11-26 2004-05-27 Axcelis Technologies, Inc. Drying process for low-k dielectric films
JP2004343031A (ja) * 2002-12-03 2004-12-02 Advanced Lcd Technologies Development Center Co Ltd 誘電体膜およびその形成方法ならびに誘電体膜を用いた半導体装置およびその製造方法
JP2004265916A (ja) * 2003-02-06 2004-09-24 Tokyo Electron Ltd 基板のプラズマ酸化処理方法
JP2004336019A (ja) 2003-04-18 2004-11-25 Advanced Lcd Technologies Development Center Co Ltd 成膜方法、半導体素子の形成方法、半導体素子、表示装置の形成方法及び表示装置
EP1898456A4 (en) * 2005-06-08 2009-11-18 Univ Tohoku PLASMA NITRURATION METHOD, SEMICONDUCTOR DEVICE MANUFACTURING METHOD, AND PLASMA PROCESSING APPARATUS
JP2007141993A (ja) * 2005-11-16 2007-06-07 Tokyo Gas Co Ltd 被膜形成装置および被膜形成方法
TWI423461B (zh) * 2008-09-18 2014-01-11 Atomic Energy Council 微晶矽薄膜鍍膜之生成方法及其生成裝置
RU2011139139A (ru) 2009-03-03 2013-04-10 Зе Юниверсити Оф Вестерн Онтарио Способ получения гипертепловых молекул водорода и их применение для выборочного разрыва связей с-н и/или si-h молекул около или на поверхностях подложки
US20160233055A1 (en) * 2015-02-06 2016-08-11 Mks Instruments Inc. Apparatus and Method for Metastable Enhanced Plasma Ignition
CN109922590B (zh) * 2019-03-13 2023-11-03 中国科学院微电子研究所 原子态等离子体的形成及维持方法及半导体材料的等离子体处理方法

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56116869A (en) * 1980-02-18 1981-09-12 Shunpei Yamazaki Inductive reduced pressure gaseous phase method
GB2164581A (en) * 1982-04-13 1986-03-26 Michael Paul Neary Chemical method
US4737379A (en) * 1982-09-24 1988-04-12 Energy Conversion Devices, Inc. Plasma deposited coatings, and low temperature plasma method of making same
JPS59159167A (ja) * 1983-03-01 1984-09-08 Zenko Hirose アモルフアスシリコン膜の形成方法
US4883688A (en) * 1984-03-16 1989-11-28 Syntex (U.S.A) Inc. Method for producing chromatographic devices having modified edges
JPH0717997B2 (ja) * 1987-02-21 1995-03-01 日本電信電話株式会社 プラズマ酸化または窒化法及びそれに使用する装置
US5180435A (en) * 1987-09-24 1993-01-19 Research Triangle Institute, Inc. Remote plasma enhanced CVD method and apparatus for growing an epitaxial semiconductor layer
JPH03193880A (ja) * 1989-08-03 1991-08-23 Mikakutou Seimitsu Kogaku Kenkyusho:Kk 高圧力下でのマイクロ波プラズマcvdによる高速成膜方法及びその装置
US5284789A (en) 1990-04-25 1994-02-08 Casio Computer Co., Ltd. Method of forming silicon-based thin film and method of manufacturing thin film transistor using silicon-based thin film
DE4132560C1 (en) 1991-09-30 1993-04-22 Siemens Ag, 8000 Muenchen, De Plasma-aided deposition of film for integrated semiconductor circuit - using neutral particles, activated by microwave in separate chamber, and non-excited reaction gas, etc.
JP3190745B2 (ja) * 1992-10-27 2001-07-23 株式会社東芝 気相成長方法
JPH0729898A (ja) * 1993-07-15 1995-01-31 Tadahiro Omi 半導体製造方法
US5932302A (en) * 1993-07-20 1999-08-03 Semiconductor Energy Laboratory Co., Ltd. Method for fabricating with ultrasonic vibration a carbon coating
US5571576A (en) * 1995-02-10 1996-11-05 Watkins-Johnson Method of forming a fluorinated silicon oxide layer using plasma chemical vapor deposition
JPH0964176A (ja) * 1995-08-21 1997-03-07 Oki Electric Ind Co Ltd 半導体素子の製造方法
JPH10242142A (ja) * 1997-02-21 1998-09-11 Nippon Asm Kk 半導体素子とその製造方法
US6015759A (en) * 1997-12-08 2000-01-18 Quester Technology, Inc. Surface modification of semiconductors using electromagnetic radiation

Also Published As

Publication number Publication date
CN1146025C (zh) 2004-04-14
DE69934680D1 (de) 2007-02-15
EP1071123A8 (en) 2001-05-02
WO1999050899A1 (fr) 1999-10-07
US20030003243A1 (en) 2003-01-02
AU2854699A (en) 1999-10-18
KR20010042227A (ko) 2001-05-25
AU748409B2 (en) 2002-06-06
KR100441836B1 (ko) 2004-07-27
CA2326052A1 (en) 1999-10-07
EP1071123A1 (en) 2001-01-24
JPH11279773A (ja) 1999-10-12
US6746726B2 (en) 2004-06-08
EP1071123A4 (en) 2004-11-24
EP1071123B1 (en) 2007-01-03

Similar Documents

Publication Publication Date Title
CN1146025C (zh) 形成薄膜的方法
TWI295079B (en) Method and device for forming oxide film
CN1312743C (zh) 电介体膜及其形成方法,使用其的半导体装置及制造方法
JP2003332333A (ja) 絶縁膜の低温蒸着法
CN1735710A (zh) 形成高质量的低温氮化硅膜的方法和设备
CN1868041A (zh) 氧化硅和氧氮化硅的低温沉积
JP2004343031A5 (zh)
KR19990072434A (ko) 고밀도플라즈마-화학적증착기법을사용하여낮은유전상수를갖는박막을형성하는방법
US4543271A (en) Silicon oxynitride material and photochemical process for forming same
TW454266B (en) Method for producing silicon a series of nitride film
CN1275295C (zh) 表面氮化方法
CN1295759C (zh) 氧气氛下等离子体氧化制备二氧化硅薄膜的方法
CN1055014A (zh) 低温光化学气相淀积二氧化硅、氮化硅薄膜技术
US6472299B2 (en) Method and apparatus for treating a substrate with hydrogen radicals at a temperature of less than 40 K
CN1270359C (zh) 低温下使硅晶片氧化的方法及其使用的设备
JPH1079384A (ja) 絶縁膜の形成方法
Lucovsky et al. Deposition of dielectric films by remote plasma enhanced CVD
JP2001244259A (ja) 絶縁体薄膜を製造する方法
Bhatnagar et al. The direct photochemical vapour deposition of SiO2 from Si2H6 and N2O3 mixtures
JP2977150B2 (ja) 二酸化シリコン絶縁膜の製造方法
Kanoh et al. Low-temperature chemical-vapor-deposition of silicon nitride
US20060138501A1 (en) Semi-conductor dielectric component with a praseodymium oxide dielectric
Neumayer Plasma-Enhanced Chemical Vapor Deposition (PECVD): Silicon Nitride Films
JP2966909B2 (ja) 非晶質半導体薄膜
JP3228143B2 (ja) SiOF膜の成膜方法及び半導体装置

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant
C19 Lapse of patent right due to non-payment of the annual fee
CF01 Termination of patent right due to non-payment of annual fee