CN1269223C - 半导体器件及其制造方法 - Google Patents

半导体器件及其制造方法 Download PDF

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Publication number
CN1269223C
CN1269223C CNB2003101003418A CN200310100341A CN1269223C CN 1269223 C CN1269223 C CN 1269223C CN B2003101003418 A CNB2003101003418 A CN B2003101003418A CN 200310100341 A CN200310100341 A CN 200310100341A CN 1269223 C CN1269223 C CN 1269223C
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CN
China
Prior art keywords
semiconductor device
silicon nitride
nitride film
carbon
source
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CNB2003101003418A
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English (en)
Chinese (zh)
Other versions
CN1497737A (zh
Inventor
田中正幸
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
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Toshiba Corp
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Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Publication of CN1497737A publication Critical patent/CN1497737A/zh
Application granted granted Critical
Publication of CN1269223C publication Critical patent/CN1269223C/zh
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/01Manufacture or treatment
    • H10W20/071Manufacture or treatment of dielectric parts thereof
    • H10W20/074Manufacture or treatment of dielectric parts thereof of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
    • H10W20/077Manufacture or treatment of dielectric parts thereof of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers on sidewalls or on top surfaces of conductors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/01Manufacture or treatment
    • H10D64/021Manufacture or treatment using multiple gate spacer layers, e.g. bilayered sidewall spacers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/69Inorganic materials
    • H10P14/694Inorganic materials composed of nitrides
    • H10P14/6943Inorganic materials composed of nitrides containing silicon
    • H10P14/69433Inorganic materials composed of nitrides containing silicon the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/01Manufacture or treatment
    • H10W20/071Manufacture or treatment of dielectric parts thereof
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/01Manufacture or treatment
    • H10W20/071Manufacture or treatment of dielectric parts thereof
    • H10W20/093Manufacture or treatment of dielectric parts thereof by modifying materials of the dielectric parts
    • H10W20/097Manufacture or treatment of dielectric parts thereof by modifying materials of the dielectric parts by thermally treating
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/021Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0212Manufacture or treatment of FETs having insulated gates [IGFET] using self-aligned silicidation
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/021Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0223Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate
    • H10D30/0227Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate having both lightly-doped source and drain extensions and source and drain regions self-aligned to the sides of the gate, e.g. lightly-doped drain [LDD] MOSFET or double-diffused drain [DDD] MOSFET

Landscapes

  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Formation Of Insulating Films (AREA)
  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)
CNB2003101003418A 2002-10-15 2003-10-14 半导体器件及其制造方法 Expired - Fee Related CN1269223C (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP299918/2002 2002-10-15
JP2002299918A JP2004134687A (ja) 2002-10-15 2002-10-15 半導体装置及びその製造方法

Publications (2)

Publication Number Publication Date
CN1497737A CN1497737A (zh) 2004-05-19
CN1269223C true CN1269223C (zh) 2006-08-09

Family

ID=32288916

Family Applications (1)

Application Number Title Priority Date Filing Date
CNB2003101003418A Expired - Fee Related CN1269223C (zh) 2002-10-15 2003-10-14 半导体器件及其制造方法

Country Status (4)

Country Link
US (2) US20050118838A1 (https=)
JP (1) JP2004134687A (https=)
CN (1) CN1269223C (https=)
TW (1) TWI232576B (https=)

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004134687A (ja) * 2002-10-15 2004-04-30 Toshiba Corp 半導体装置及びその製造方法
US7306995B2 (en) * 2003-12-17 2007-12-11 Texas Instruments Incorporated Reduced hydrogen sidewall spacer oxide
US7422968B2 (en) * 2004-07-29 2008-09-09 Texas Instruments Incorporated Method for manufacturing a semiconductor device having silicided regions
US7732342B2 (en) * 2005-05-26 2010-06-08 Applied Materials, Inc. Method to increase the compressive stress of PECVD silicon nitride films
KR100652427B1 (ko) * 2005-08-22 2006-12-01 삼성전자주식회사 Ald에 의한 도전성 폴리실리콘 박막 형성 방법 및 이를이용한 반도체 소자의 제조 방법
JP2007287856A (ja) * 2006-04-14 2007-11-01 Toshiba Corp 半導体装置の製造方法
US20080293192A1 (en) * 2007-05-22 2008-11-27 Stefan Zollner Semiconductor device with stressors and methods thereof
US7803722B2 (en) * 2007-10-22 2010-09-28 Applied Materials, Inc Methods for forming a dielectric layer within trenches
WO2010061754A1 (ja) * 2008-11-28 2010-06-03 学校法人 東海大学 不揮発性半導体記憶装置及びその製造方法
JP6035007B2 (ja) * 2010-12-10 2016-11-30 富士通株式会社 Mis型の窒化物半導体hemt及びその製造方法
WO2012135363A2 (en) * 2011-03-28 2012-10-04 Texas Instruments Incorporated Integrated circuit having chemically modified spacer surface
CN102790008A (zh) * 2011-05-16 2012-11-21 中芯国际集成电路制造(上海)有限公司 形成接触插栓的方法
US9355910B2 (en) * 2011-12-13 2016-05-31 GlobalFoundries, Inc. Semiconductor device with transistor local interconnects
CN103489787B (zh) * 2013-09-22 2016-04-13 上海华力微电子有限公司 提高源漏接触和氮化硅薄膜黏附力的方法
JP6529956B2 (ja) * 2016-12-28 2019-06-12 株式会社Kokusai Electric 半導体装置の製造方法、基板処理装置およびプログラム
CN110233106B (zh) * 2018-03-05 2022-10-25 中芯国际集成电路制造(北京)有限公司 半导体结构及其形成方法

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW297142B (https=) * 1993-09-20 1997-02-01 Handotai Energy Kenkyusho Kk
JP2956571B2 (ja) * 1996-03-07 1999-10-04 日本電気株式会社 半導体装置
JP3050165B2 (ja) * 1997-05-29 2000-06-12 日本電気株式会社 半導体装置およびその製造方法
JP2001168092A (ja) * 1999-01-08 2001-06-22 Toshiba Corp 半導体装置およびその製造方法
TW495887B (en) * 1999-11-15 2002-07-21 Hitachi Ltd Semiconductor device and manufacturing method of the same
JP3914452B2 (ja) * 2001-08-07 2007-05-16 株式会社ルネサステクノロジ 半導体集積回路装置の製造方法
JP3586268B2 (ja) * 2002-07-09 2004-11-10 株式会社東芝 半導体装置及びその製造方法
JP2004134687A (ja) * 2002-10-15 2004-04-30 Toshiba Corp 半導体装置及びその製造方法
US7105439B2 (en) * 2003-06-26 2006-09-12 Taiwan Semiconductor Manufacturing Co., Ltd. Cobalt/nickel bi-layer silicide process for very narrow line polysilicon gate technology
US7148546B2 (en) * 2003-09-30 2006-12-12 Texas Instruments Incorporated MOS transistor gates with doped silicide and methods for making the same

Also Published As

Publication number Publication date
US20060249800A1 (en) 2006-11-09
TW200409341A (en) 2004-06-01
US20050118838A1 (en) 2005-06-02
JP2004134687A (ja) 2004-04-30
CN1497737A (zh) 2004-05-19
TWI232576B (en) 2005-05-11

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