CN1256612A - 二信号单功率平面电路板 - Google Patents

二信号单功率平面电路板 Download PDF

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CN1256612A
CN1256612A CN99120972A CN99120972A CN1256612A CN 1256612 A CN1256612 A CN 1256612A CN 99120972 A CN99120972 A CN 99120972A CN 99120972 A CN99120972 A CN 99120972A CN 1256612 A CN1256612 A CN 1256612A
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CN1241459C (zh
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肯尼思·法伦
米古尔·A·基马兹
罗斯·W·基斯勒
约翰·M·劳福
罗伊·H·马格努森
沃雅·R·马克维奇
埃尔·莫米斯
基姆·P·鲍勒蒂
马里伯斯·伯里诺
约翰·A·沃尔西
威廉姆·E·维尔森
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    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
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    • H05K3/44—Manufacturing insulated metal core circuits or other insulated electrically conductive core circuits
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    • H05K1/02—Details
    • H05K1/03—Use of materials for the substrate
    • H05K1/05—Insulated conductive substrates, e.g. insulated metal substrate
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    • H05K2201/095—Conductive through-holes or vias
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    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/108—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by semi-additive methods; masks therefor
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    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42—Plated through-holes or plated via connections
    • H05K3/425—Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern
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Abstract

制作电路板或电路卡的方法,金属层夹在光成象介电层之间。金属填充通路和镀敷通孔位于光成象材料中,信号电路位于其表面上并连接到通路和通孔。光成象可固化介电材料在铜的相反的光成象材料侧上。在光成象材料上显影出图形,在铜中显影出通孔,孔图形化在介电层中。对光成象材料的表面、通路和通孔进行金属化。清除光刻胶得到具有二侧金属化、从二侧延伸到中心铜层的通路、连接二个外围电路化铜层的镀敷通孔的电路板或卡。

Description

二信号单功率平面电路板
本发明一般涉及到电路板等的制作，更确切地说是涉及到具有二个信号平面和一个功率平面(2S/1P)的电路板的制作，其中的功率平面夹在二个光图形化介电材料层之间，且信号平面的电路层排列于其上。
在某些常规电路板结构中，电路板剖面包括诸如FR4的环氧树脂灌注的玻璃纤维之类的非光图形化介质以及一个或更多个铜层。在介电材料中机械地或用激光钻出通路和镀敷的通孔。这一钻孔要求与各个被钻的孔一点不错地不断精确对准。而且，在某些情况下，必须有隔离边界围绕板的边沿以防止功率平面暴露于此边沿。在板内也制作隔离边界，以便分隔同一平面上的各个电压区。借助于将铜腐蚀掉，使下方的FR4材料暴露的方法，来制作隔离边界。暴露的FR4材料使二个设计成不应该彼此接触的相邻的铜区隔离。在板的边沿周围也使用隔离边界，以便防止边界上的暴露的铜在板的成型操作中连接到一起。同样的技术被用来显示板上诸如零件数目之类的内容。
虽然光成象材料已经被用在金属衬底一侧上，但当用光成象材料制作2S/1P板，使光成象材料位于金属功率板二侧上时，却遇到了各种各样的工艺困难。在用作为其上待要制作电路图形的介电材料的光成象介电聚合物将预制的金属功率板夹在中间的工序中，无法用与非光图形化FR4相同的方法制作隔离边界。若在铜被腐蚀掉之后使用相同的工序，则由于没有留下的材料使之连在一起，面板的各个零件可以被隔离，并且横向分开。
因此，本发明的主要目的是提供一种工艺，其中在制作功率平面的金属层的相反的侧上使用光成象介电材料层，并在其上制作电路图形，在其中制作通路和镀敷的通孔。在一种情况下，提供了一种技术，其中能够在功率平面中制作隔离边界而面板不分开。
根据本发明，提供了一种制作印刷电路板的方法，其中用作功率平面的金属层夹在一对光成象介电层之间，且其中感光制作的金属填充的通路和感光制作的镀敷的通孔被制作在光图形化材料中，而信号电路被制作在各个介电材料的表面上，并被了解到通路和镀敷的通孔。在一个实施例中，提供了板周围的边界，其中所述金属层终止于离一个介电层边沿一定距离处。在板的内部也可以使用边界来隔离同一平面上的各个电压。此方法包括提供金属层，最好是具有通孔的铜箔的步骤。第一层光成象介电可固化材料排列在箔的一侧上，而第二层光成象可固化介电材料排列在所述材料层的另一侧上。此光成象介电材料最好是环氧基树脂。
第一和第二层可固化光成象材料被光图形化成各个侧上的预选图形。(若要制作边界，则第一光成象材料层包括边界图形，而第二光成象材料层上的图形不包括边界图形)。此图形被显影在第一和第二光成象材料层上，以通过通路显现金属层，而在边界的情况下，显现显影的图形中的边界处的金属。在金属层中的通孔处，在二个介电层中的孔被图形化处已经显影出通孔。然后，用光刻技术，最好是通过叠加铜镀敷，对各个光成象材料的表面、通路和通孔进行金属化。若存在边界，则通过第一层显现的环绕边界的金属被腐蚀，从而提供一个衬底，它具有延伸到金属层边沿以上的由第二光成象材料层确定的边沿。最好用光刻胶保护电路其他部分并利用光刻技术，来进行这一腐蚀。当采用这一技术时，光刻胶被随后清除，从而得到具有二侧金属化、从二侧延伸到中心金属层的通路、连接二个外围电路化的金属层的镀敷的通孔的电路板，而在制作板的情况下，用清除的金属形成由仍然未显影的可图形化的介电材料支持的边界。
图1是示意平面图，示出了工艺过程中制作在面板上的各种板；
图2a-2k是基本上沿图1中2-2线所示平面的剖面图，示出了各个制造阶段中电路板的制作。
现参照附图，图1示出了当卡、板或者卡或板的各个区域需要电学上分隔，亦即被制作的各个卡或板之间的功率平面中不能有物理接触时，用来在其上制作多个电路卡或板的面板的示意图。如图1所示，面板10具有多个制作在其上的由参考号12所示的电路卡，且各个卡12被完全延伸在各个卡12周围的边界14分隔。边界16提供了卡内部的电隔离。此处用术语“卡”或“电路卡”来表示可以用作安装元件和芯片的芯片载体或电路板。图2a-2k中的各个阶段示出了卡12的制作，开始于形成功率平面的金属层，通过各个步骤加工形成最终的被没有金属的边界环绕的形成功率平面的电路化卡或板。
现参照图2a，示出了金属层20，虽然可以采用其他尺寸的铜箔，例如1/2盎司铜箔，但在一个最佳实施例中，这是1盎司铜箔形式的铜。然而，1盎司铜箔是通常用于功率平面的标准材料。预期金属层的厚度应该约为0.7-2.8密尔。下面描述具有1P/2S结构，亦即一个功率平面和二个信号平面的电路卡的制作。
在许多情况下，需要从一个介电层的暴露表面上的电路延伸到另一个介电材料的暴露表面上的电路的镀敷的通孔。在这种情况下，其中之一示于22的通孔被制作在铜箔20中。可以用机械钻孔或腐蚀的方法来制作。一种腐蚀方法是采用光刻工艺，其中各个孔的位置被图形化和显影在涂敷于铜的二个表面上的光刻胶中，再用诸如氯化铜(CuCl2)之类的腐蚀剂将孔腐蚀穿过铜。然后剥离光刻胶。这一工艺在本技术领域中是众所周知的。
如28所示，在铜箔20的一侧上涂敷第一光成象介电材料层24，在铜箔20的相反的一侧上涂敷第二光成象介电材料层26，并在通孔22中填充介电材料。各个介电材料层的厚度最好在2-4密尔之间。一种特别有用的光成象材料是此处列为参考的题为“光成象组分”的共同受让的美国专利No.5026624所述类型的环氧基树脂材料。如图2b所示，此材料被光成象即光图形化并被显影，以显现所希望的图形，然后被固化，以便提供其上能够制作用来形成电路板的诸如镀敷的铜的金属电路图形的介电衬底。此介电材料可以如所述专利No.5026624所述那样幕涂，或含有触变剂并如美国专利No.5300402所述那样遮蔽涂敷。此材料也可以涂敷成干膜。制作干膜的方法如下。
制备固体含量约为86.5-89％的光成象介质组分，这种固体包含：大约27.44％的PKHC苯氧树脂；41.16％的Epirez 5183四溴双酚A；22.88％的Epirez SU-8八功能环氧双酚A甲醛酚醛合成树脂；4.85％的UVE 1014光引发剂；0.07％的乙基紫染料；从3M公司得到的0.03％的Fc 430氟化聚酯非离子表面活化剂；从Degussa得到的3.85％的Aerosil 380非晶二氧化硅；以便提供固体组分。溶剂约为总光成象介质组分的11-13.5％。光成象介电组分被涂敷在从DuPont得到的称为Mylar D的1.42密尔厚的聚对苯二甲酸乙二醇酯聚酯层上。可以对光成象介电组分进行干燥，以便在聚对苯二甲酸乙二醇酯背面提供厚度为2.8密尔的光成象介电膜。
如所述美国专利No.5026624和5300402所述的那样，此特定材料24和26是负性感光介质。因此，当此材料在显影液中被显影时，暴露于光化辐照(此时为紫外线)的区域将不被显影(亦即仍然保留)，而不暴露的区域被清除，亦即显影出来。掩模被置于待要完全显影出来的那些区域所在的光刻胶24和26上，而其余的介电材料24和26暴露于紫外线。对此材料进行显影的最佳试剂是丙烯碳酸酯。如图2c所示，这将提供延伸到铜箔20表面的窗口32和显现下方铜箔20的形成边界的光刻胶24上的窗口34，以及直径小于铜箔20中的窗口32的能够得到镀敷的通孔的窗口36。在显影之后，用紫外线冲击留下的介电材料24和26，然后如所述专利No.5026624所述的那样，在150-190℃下进行固化。在所述美国专利No.5026624中详细描述了这一显影和固化。可以充分地韧化此介电材料，以便形成其上能够淀积或制作电路的基底。然后，用蒸汽喷射或可选择的去涂抹方法处理整个表面，再为镀敷铜而引晶，最好是用钯38，以便如本技术众所周知的那样提供无电铜镀敷。图2c示出了这一制造阶段。
此时，如图2d所示，用光刻胶40涂敷产品二侧，此光刻胶最好是负性光刻胶DuPont Resiston T168。然后暴露除待要镀敷铜的地方之外的整个光刻胶并显影。如众所周知的那样，最好用丙烯碳酸酯对光刻胶进行显影，从而在要镀敷铜的地方形成穿过光刻胶40的窗口42。这些窗口将位于待要制作电路图形、待要制作孔、待要制作通路和待要制作通孔处的层24和26上。图2e示出了这一制造阶段。
然后，如图2f所示，根据熟知的方法，将铜无电镀敷在通过光刻胶40中的窗口42暴露的区域上，以便在介电材料24和26上形成电路图形44、穿过介电材料24和26与铜层10接触的无出口的通路46和镀敷的通孔48。接着，虽然常常不要求，但也可以对表面进行整平。
在无电镀敷之后，如图2g所示，用丙烯碳酸酯在提高的温度下剥离光刻胶40，以便提供电路44、通路46和镀敷的通孔48。光刻胶的显影还显现了窗口34中的光刻胶24下方的铜20。铜20在反侧上不通过光刻胶26显现。此时，最好在氰化物浴液中剥离其上未发生镀敷的留下的钯引晶38。
在剥离钯引晶之后，如图2h所示，在零件二侧涂敷另一个光刻胶涂层50。此光刻胶最好是MacDermid公司所售的负性光刻胶MI。覆盖光图形化材料24的光刻胶50除窗口34处外，被整个暴露并显影，以便提供与窗口34连通的窗口52。可以用碳酸钠来显影。图2i示出了这一点。
然后，最好用氯化铜溶液腐蚀窗口34下面显现的铜，这就提供了图2j所示的零件。
接着，用NaOH剥离光刻胶50的残留部分，从而得到图2k所示的零件。如所见，铜箔20终止于光图形化材料24的外边沿，而光图形化材料26的外边沿延伸到铜24以上。再参照图1，于是，即使在顶部光图形化材料24和周围的铜20中制作了边界，整个面板仍然被底部光图形化材料26固定在一起，从而保持了整个面板10的整体性。
若不要求边界，亦即Cu片20能够保持为一个整体并延伸到板的边沿，则可以略去上述工艺中有关制作边界的各个步骤。于是，不制作窗口34，并将如图2c-2g所示进行光图形化和镀敷，由于不需要图2h-2k所示的各个步骤，故这就是最终产品。
因此，已经描述了本发明的最佳实施例。但记住前面的描述，需要理解的是，这一描述仅仅是用举例的方法进行的，本发明不局限于此地方述的特定的实施例，而是可以作出各种各样的重组、修正和替换而不超越下列权利要求所述的本发明的实际构思。

Claims (20)

1.一种制作印刷电路卡的方法，其中在一对介电层之间夹有金属层，且周围有边界，其中所述金属层终止于离一个介电层的边沿一定距离处，此方法包含下列步骤：
提供具有相反的侧面的金属层；
在所述金属层的相反的侧面上提供第一和第二可光成象的可固化的介电材料层；
将所述第一和第二层所述可固化的光成象材料光图形化成预选的图形，所述第一光成象材料层上的图形包括边界图形，而所述第二光成象材料层上的图形没有边界图形；
然后，对所述光成象材料的所述第一和第二层上的所述图形进行显影，以便通过显影的图形中的通路和所述边界显现所述金属层部分；
接着，对各个所述第一和所述第二层进行金属化，以便用光刻技术制作所述第一和第二层所述光成象材料上的电路和所述第一和第二光成象材料层中的通路，并腐蚀所述边界处通过所述第一层暴露的金属，从而提供具有由延伸到所述金属层边沿以外的第二层所述光成象材料确定的边沿的衬底。
2.权利要求1所述的发明，其进一步特征是，感光制作穿过所述介电材料层和所述金属层二者的孔，并在所述孔中淀积金属。
3.权利要求1所述的发明，其中所述介电材料层之间的所述金属层是铜。
4.权利要求1所述的发明，其中所述光成象材料是环氧基树脂。
5.权利要求1所述的发明，其中在对第一和第二层进行金属化之后，对所述边界处暴露的金属进行腐蚀。
6.权利要求3所述的发明，其中第一和第二层的金属化用无电镀敷铜的方法完成。
7.权利要求1所述的发明，其中在面板上制作多个电路板。
8.权利要求1所述的发明，其中所述第一和第二光成象材料层被涂敷成干膜材料。
9.权利要求2所述的发明，其进一步特征是，在提供第一和第二光成象材料层之前，在所述金属层中制作窗口，用所述光成象材料填充所述窗口，在光成象材料中制作通过金属层窗口的孔，以及在所述光成象材料中的所述孔中提供金属填充所述窗口。
10.一种印刷电路卡，它包含夹在一对介电层之间的金属层，所述介电层各由光成象的固化的介电材料组成，且各具有外边沿、环绕所述电路卡的边界，所述边界由终止于离一个介电层的边沿一定距离且邻近所述另一个介电层的边沿的所述金属层组成；
形成所述光成象材料的所述第一和第二层上的电路的各个所述第一和所述第二层上的金属化，以及所述第一和第二光成象材料层中的连接于所述电路和所述金属层的填充有金属的通路。
11.权利要求10所述的发明，其进一步特征是，延伸穿过各个介电材料层和穿过金属层的镀敷的通孔。
12.权利要求11所述的发明，其中所述镀敷的通孔被电连接到二个介电材料上的电路。
13.权利要求10所述的发明，其中多个电路板包含由所述一个介电材料层处的边界连接的面板。
14.权利要求10所述的发明，其中的金属层是铜。
15.权利要求10所述的发明，其中的电路是铜。
16.一种制作印刷电路卡的方法，它包含下列步骤：
提供具有相反的侧面的金属层，
制作至少一个穿过所述金属层的窗口，
在所述金属层的相反的侧上提供第一和第二光成象材料层；
对所述光成象材料的所述第一和第二层进行光图形化和显影，以形成穿过所述光成象材料层和所述金属层中的所述至少一个窗口二者的窗口，且所述光成象层中的窗口小于所述金属层中的窗口，在至少一个终止于所述金属层处的光成象材料层中，制作至少一个通路，对具有电路的各个所述光成象材料层的暴露表面进行电路化，并在所述光成象材料中的所述至少一个孔和所述至少一个通路中淀积金属。
17.权利要求16所述的发明，其中所述光成象材料被淀积成干膜。
18.权利要求16所述的发明，其中所述电路用附加的镀敷来制作。
19.一种印刷电路卡，它包含夹在一对介电层之间的金属层，所述介电层各由光成象的固化的介电材料组成，
形成所述光成象材料的所述第一和第二层上的电路的各个所述第一和所述第二层上的金属化，以及至少所述第一光成象材料层中的连接于所述电路和所述金属层的填充有金属的通路和所述金属层中与所述第一和第二光成象材料层中的窗口，所述窗口被金属化，以便使所述第一层上的至少一部分电路与所述第二层上的一部分电路连接起来而不接触所述金属层。
20.权利要求19所述的发明，其中所述的孔和所述介电材料中的通路被感光制作。
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