CN1182763C - 复合叠层电路结构及其制作方法 - Google Patents
复合叠层电路结构及其制作方法 Download PDFInfo
- Publication number
- CN1182763C CN1182763C CNB991209761A CN99120976A CN1182763C CN 1182763 C CN1182763 C CN 1182763C CN B991209761 A CNB991209761 A CN B991209761A CN 99120976 A CN99120976 A CN 99120976A CN 1182763 C CN1182763 C CN 1182763C
- Authority
- CN
- China
- Prior art keywords
- voltage plane
- circuit board
- hole
- plating
- board component
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Images
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
- H05K3/4641—Manufacturing multilayer circuits by laminating two or more circuit boards having integrally laminated metal sheets or special power cores
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
- H05K3/429—Plated through-holes specially for multilayer circuits, e.g. having connections to inner circuit layers
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
- H05K3/4623—Manufacturing multilayer circuits by laminating two or more circuit boards the circuit boards having internal via connections between two or more circuit layers before lamination, e.g. double-sided circuit boards
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/095—Conductive through-holes or vias
- H05K2201/09509—Blind vias, i.e. vias having one side closed
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/095—Conductive through-holes or vias
- H05K2201/09536—Buried plated through-holes, i.e. plated through-holes formed in a core before lamination
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/095—Conductive through-holes or vias
- H05K2201/096—Vertically aligned vias, holes or stacked vias
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
- H05K2201/09809—Coaxial layout
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0011—Working of insulating substrates or insulating layers
- H05K3/0017—Etching of the substrate by chemical or physical means
- H05K3/0023—Etching of the substrate by chemical or physical means by exposure and development of a photosensitive insulating layer
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Structure Of Printed Boards (AREA)
Abstract
Description
Claims (17)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US09/204,458 US6175087B1 (en) | 1998-12-02 | 1998-12-02 | Composite laminate circuit structure and method of forming the same |
US09/204,458 | 1998-12-02 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN1261765A CN1261765A (zh) | 2000-08-02 |
CN1182763C true CN1182763C (zh) | 2004-12-29 |
Family
ID=22757970
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CNB991209761A Expired - Lifetime CN1182763C (zh) | 1998-12-02 | 1999-11-29 | 复合叠层电路结构及其制作方法 |
Country Status (5)
Country | Link |
---|---|
US (2) | US6175087B1 (zh) |
KR (1) | KR100342088B1 (zh) |
CN (1) | CN1182763C (zh) |
HK (1) | HK1027468A1 (zh) |
TW (1) | TW513901B (zh) |
Families Citing this family (81)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6750405B1 (en) * | 1995-06-07 | 2004-06-15 | International Business Machines Corporation | Two signal one power plane circuit board |
SE516087C2 (sv) * | 1999-02-02 | 2001-11-19 | Ericsson Telefon Ab L M | Anordning vid ledningsbärare och förfaranden för tillverkning av sådana ledningsbärare |
US6372999B1 (en) * | 1999-04-20 | 2002-04-16 | Trw Inc. | Multilayer wiring board and multilayer wiring package |
WO2000076281A1 (fr) | 1999-06-02 | 2000-12-14 | Ibiden Co., Ltd. | Carte a circuit imprime multicouche et procede de fabrication d'une telle carte |
US6869750B2 (en) * | 1999-10-28 | 2005-03-22 | Fujitsu Limited | Structure and method for forming a multilayered structure |
US6834426B1 (en) * | 2000-07-25 | 2004-12-28 | International Business Machines Corporation | Method of fabricating a laminate circuit structure |
JP3708005B2 (ja) * | 2000-08-09 | 2005-10-19 | 日本無線株式会社 | プリント配線板の穴埋め方法 |
US20020122923A1 (en) * | 2000-12-28 | 2002-09-05 | Ohr Stephen S. | Layered circuit boards and methods of production thereof |
US6930256B1 (en) | 2002-05-01 | 2005-08-16 | Amkor Technology, Inc. | Integrated circuit substrate having laser-embedded conductive patterns and method therefor |
US7334326B1 (en) | 2001-06-19 | 2008-02-26 | Amkor Technology, Inc. | Method for making an integrated circuit substrate having embedded passive components |
US6459047B1 (en) * | 2001-09-05 | 2002-10-01 | International Business Machines Corporation | Laminate circuit structure and method of fabricating |
JP2003133814A (ja) * | 2001-10-24 | 2003-05-09 | Kyocera Corp | 高周波用配線基板 |
US6831371B1 (en) * | 2002-03-16 | 2004-12-14 | Amkor Technology, Inc. | Integrated circuit substrate having embedded wire conductors and method therefor |
US6608757B1 (en) * | 2002-03-18 | 2003-08-19 | International Business Machines Corporation | Method for making a printed wiring board |
US7548430B1 (en) | 2002-05-01 | 2009-06-16 | Amkor Technology, Inc. | Buildup dielectric and metallization process and semiconductor package |
US20080043447A1 (en) * | 2002-05-01 | 2008-02-21 | Amkor Technology, Inc. | Semiconductor package having laser-embedded terminals |
US7670962B2 (en) | 2002-05-01 | 2010-03-02 | Amkor Technology, Inc. | Substrate having stiffener fabrication method |
US7399661B2 (en) * | 2002-05-01 | 2008-07-15 | Amkor Technology, Inc. | Method for making an integrated circuit substrate having embedded back-side access conductors and vias |
US7633765B1 (en) | 2004-03-23 | 2009-12-15 | Amkor Technology, Inc. | Semiconductor package including a top-surface metal layer for implementing circuit features |
US9691635B1 (en) | 2002-05-01 | 2017-06-27 | Amkor Technology, Inc. | Buildup dielectric layer having metallization pattern semiconductor package fabrication method |
US6930257B1 (en) | 2002-05-01 | 2005-08-16 | Amkor Technology, Inc. | Integrated circuit substrate having laminated laser-embedded circuit layers |
US7028400B1 (en) | 2002-05-01 | 2006-04-18 | Amkor Technology, Inc. | Integrated circuit substrate having laser-exposed terminals |
US20040192876A1 (en) * | 2002-11-18 | 2004-09-30 | Nigel Hacker | Novolac polymer planarization films with high temparature stability |
US20040108137A1 (en) * | 2002-12-10 | 2004-06-10 | Litton Systems, Inc. | Cross connect via for multilayer printed circuit boards |
AU2003286758A1 (en) * | 2003-07-17 | 2005-03-07 | Honeywell International Inc | Planarization films for advanced microelectronic applications and devices and methods of production thereof |
WO2005065274A2 (en) * | 2003-12-31 | 2005-07-21 | Motorola, Inc., A Corporation Of The State Of Delaware | Dielectric sheet, method for fabricating the dielectric sheet, printed circuit and patch antenna using the dielectric sheet, and method for fabricating the printed circuit |
US11081370B2 (en) | 2004-03-23 | 2021-08-03 | Amkor Technology Singapore Holding Pte. Ltd. | Methods of manufacturing an encapsulated semiconductor device |
US10811277B2 (en) | 2004-03-23 | 2020-10-20 | Amkor Technology, Inc. | Encapsulated semiconductor package |
US7470990B2 (en) * | 2004-03-31 | 2008-12-30 | Endicott Interconnect Technologies, Inc. | Low moisture absorptive circuitized substrate with reduced thermal expansion, method of making same, electrical assembly utilizing same, and information handling system utilizing same |
JP2005322878A (ja) * | 2004-04-09 | 2005-11-17 | Dainippon Printing Co Ltd | 印刷配線基板の組付パネル、印刷配線基板の実装用単位シート、リジッド−フレキシブル基板及びこれらの製造方法 |
US7145238B1 (en) | 2004-05-05 | 2006-12-05 | Amkor Technology, Inc. | Semiconductor package and substrate having multi-level vias |
US7157647B2 (en) * | 2004-07-02 | 2007-01-02 | Endicott Interconnect Technologies, Inc. | Circuitized substrate with filled isolation border, method of making same, electrical assembly utilizing same, and information handling system utilizing same |
US8826531B1 (en) | 2005-04-05 | 2014-09-09 | Amkor Technology, Inc. | Method for making an integrated circuit substrate having laminated laser-embedded circuit layers |
US7627947B2 (en) * | 2005-04-21 | 2009-12-08 | Endicott Interconnect Technologies, Inc. | Method for making a multilayered circuitized substrate |
US7827682B2 (en) * | 2005-04-21 | 2010-11-09 | Endicott Interconnect Technologies, Inc. | Apparatus for making circuitized substrates having photo-imageable dielectric layers in a continuous manner |
US7293355B2 (en) * | 2005-04-21 | 2007-11-13 | Endicott Interconnect Technologies, Inc. | Apparatus and method for making circuitized substrates in a continuous manner |
US7589398B1 (en) | 2006-10-04 | 2009-09-15 | Amkor Technology, Inc. | Embedded metal features structure |
US7550857B1 (en) | 2006-11-16 | 2009-06-23 | Amkor Technology, Inc. | Stacked redistribution layer (RDL) die assembly package |
US7750250B1 (en) | 2006-12-22 | 2010-07-06 | Amkor Technology, Inc. | Blind via capture pad structure |
US7752752B1 (en) | 2007-01-09 | 2010-07-13 | Amkor Technology, Inc. | Method of fabricating an embedded circuit pattern |
US8323771B1 (en) | 2007-08-15 | 2012-12-04 | Amkor Technology, Inc. | Straight conductor blind via capture pad structure and fabrication method |
US20090178273A1 (en) * | 2008-01-15 | 2009-07-16 | Endicott Interconnect Technologies, Inc. | Method of making circuitized assembly including a plurality of circuitized substrates |
US20090241332A1 (en) * | 2008-03-28 | 2009-10-01 | Lauffer John M | Circuitized substrate and method of making same |
US8872329B1 (en) | 2009-01-09 | 2014-10-28 | Amkor Technology, Inc. | Extended landing pad substrate package structure and method |
US7960827B1 (en) | 2009-04-09 | 2011-06-14 | Amkor Technology, Inc. | Thermal via heat spreader package and method |
US8623753B1 (en) | 2009-05-28 | 2014-01-07 | Amkor Technology, Inc. | Stackable protruding via package and method |
US8222538B1 (en) | 2009-06-12 | 2012-07-17 | Amkor Technology, Inc. | Stackable via package and method |
US8471154B1 (en) | 2009-08-06 | 2013-06-25 | Amkor Technology, Inc. | Stackable variable height via package and method |
US8796561B1 (en) | 2009-10-05 | 2014-08-05 | Amkor Technology, Inc. | Fan out build up substrate stackable package and method |
US8937381B1 (en) | 2009-12-03 | 2015-01-20 | Amkor Technology, Inc. | Thin stackable package and method |
US9691734B1 (en) | 2009-12-07 | 2017-06-27 | Amkor Technology, Inc. | Method of forming a plurality of electronic component packages |
US20110147069A1 (en) * | 2009-12-18 | 2011-06-23 | International Business Machines Corporation | Multi-tiered Circuit Board and Method of Manufacture |
US8536462B1 (en) | 2010-01-22 | 2013-09-17 | Amkor Technology, Inc. | Flex circuit package and method |
US8618731B2 (en) * | 2010-05-18 | 2013-12-31 | General Electric Company | Large-area flexible OLED light source |
US8300423B1 (en) | 2010-05-25 | 2012-10-30 | Amkor Technology, Inc. | Stackable treated via package and method |
US8294276B1 (en) | 2010-05-27 | 2012-10-23 | Amkor Technology, Inc. | Semiconductor device and fabricating method thereof |
US8338229B1 (en) | 2010-07-30 | 2012-12-25 | Amkor Technology, Inc. | Stackable plasma cleaned via package and method |
US8717775B1 (en) | 2010-08-02 | 2014-05-06 | Amkor Technology, Inc. | Fingerprint sensor package and method |
US8337657B1 (en) | 2010-10-27 | 2012-12-25 | Amkor Technology, Inc. | Mechanical tape separation package and method |
US8482134B1 (en) | 2010-11-01 | 2013-07-09 | Amkor Technology, Inc. | Stackable package and method |
US9748154B1 (en) | 2010-11-04 | 2017-08-29 | Amkor Technology, Inc. | Wafer level fan out semiconductor device and manufacturing method thereof |
US8525318B1 (en) | 2010-11-10 | 2013-09-03 | Amkor Technology, Inc. | Semiconductor device and fabricating method thereof |
US8557629B1 (en) | 2010-12-03 | 2013-10-15 | Amkor Technology, Inc. | Semiconductor device having overlapped via apertures |
US8535961B1 (en) | 2010-12-09 | 2013-09-17 | Amkor Technology, Inc. | Light emitting diode (LED) package and method |
US9721872B1 (en) | 2011-02-18 | 2017-08-01 | Amkor Technology, Inc. | Methods and structures for increasing the allowable die size in TMV packages |
US9013011B1 (en) | 2011-03-11 | 2015-04-21 | Amkor Technology, Inc. | Stacked and staggered die MEMS package and method |
KR101140113B1 (ko) | 2011-04-26 | 2012-04-30 | 앰코 테크놀로지 코리아 주식회사 | 반도체 디바이스 |
US8653674B1 (en) | 2011-09-15 | 2014-02-18 | Amkor Technology, Inc. | Electronic component package fabrication method and structure |
US8633598B1 (en) | 2011-09-20 | 2014-01-21 | Amkor Technology, Inc. | Underfill contacting stacking balls package fabrication method and structure |
US9029962B1 (en) | 2011-10-12 | 2015-05-12 | Amkor Technology, Inc. | Molded cavity substrate MEMS package fabrication method and structure |
KR101366461B1 (ko) | 2012-11-20 | 2014-02-26 | 앰코 테크놀로지 코리아 주식회사 | 반도체 디바이스 및 그 제조 방법 |
US9799592B2 (en) | 2013-11-19 | 2017-10-24 | Amkor Technology, Inc. | Semicondutor device with through-silicon via-less deep wells |
KR101488590B1 (ko) | 2013-03-29 | 2015-01-30 | 앰코 테크놀로지 코리아 주식회사 | 반도체 디바이스 및 그 제조 방법 |
JP5931799B2 (ja) * | 2013-05-28 | 2016-06-08 | 株式会社日立製作所 | 層間接続基板およびその製造方法 |
KR101607981B1 (ko) | 2013-11-04 | 2016-03-31 | 앰코 테크놀로지 코리아 주식회사 | 반도체 패키지용 인터포저 및 이의 제조 방법, 제조된 인터포저를 이용한 반도체 패키지 |
TW201817280A (zh) | 2016-07-06 | 2018-05-01 | 亮銳公司 | 用於整合式發光二極體驅動器之印刷電路板 |
US9960328B2 (en) | 2016-09-06 | 2018-05-01 | Amkor Technology, Inc. | Semiconductor device and manufacturing method thereof |
US10251270B2 (en) * | 2016-09-15 | 2019-04-02 | Innovium, Inc. | Dual-drill printed circuit board via |
US10446356B2 (en) * | 2016-10-13 | 2019-10-15 | Sanmina Corporation | Multilayer printed circuit board via hole registration and accuracy |
US10283445B2 (en) * | 2016-10-26 | 2019-05-07 | Invensas Corporation | Bonding of laminates with electrical interconnects |
CN110996526B (zh) * | 2019-12-27 | 2020-11-03 | 生益电子股份有限公司 | 一种信号过孔的制作方法 |
Family Cites Families (37)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4498122A (en) * | 1982-12-29 | 1985-02-05 | At&T Bell Laboratories | High-speed, high pin-out LSI chip package |
US4756930A (en) | 1983-06-06 | 1988-07-12 | Macdermid, Incorporated | Process for preparing printed circuit board thru-holes |
US4566186A (en) | 1984-06-29 | 1986-01-28 | Tektronix, Inc. | Multilayer interconnect circuitry using photoimageable dielectric |
US4915983A (en) | 1985-06-10 | 1990-04-10 | The Foxboro Company | Multilayer circuit board fabrication process |
US4902610A (en) | 1985-08-02 | 1990-02-20 | Shipley Company Inc. | Method for manufacture of multilayer circuit board |
US5334488A (en) | 1985-08-02 | 1994-08-02 | Shipley Company Inc. | Method for manufacture of multilayer circuit board |
US4720322A (en) | 1987-04-13 | 1988-01-19 | Texas Instruments Incorporated | Plasma etching of blind vias in printed wiring board dielectric |
DE3776325D1 (de) | 1987-04-16 | 1992-03-05 | Ibm | Verfahren zur herstellung von kontaktoeffnungen in einer doppellagenisolation. |
US4854038A (en) * | 1988-03-16 | 1989-08-08 | International Business Machines Corporation | Modularized fabrication of high performance printed circuit boards |
US5026624A (en) | 1989-03-03 | 1991-06-25 | International Business Machines Corporation | Composition for photo imaging |
US4999740A (en) | 1989-03-06 | 1991-03-12 | Allied-Signal Inc. | Electronic device for managing and dissipating heat and for improving inspection and repair, and method of manufacture thereof |
US5108785A (en) | 1989-09-15 | 1992-04-28 | Microlithics Corporation | Via formation method for multilayer interconnect board |
US4978420A (en) | 1990-01-03 | 1990-12-18 | Hewlett-Packard Company | Single chamber via etch through a dual-layer dielectric |
US5191174A (en) * | 1990-08-01 | 1993-03-02 | International Business Machines Corporation | High density circuit board and method of making same |
US5298685A (en) * | 1990-10-30 | 1994-03-29 | International Business Machines Corporation | Interconnection method and structure for organic circuit boards |
US5229550A (en) * | 1990-10-30 | 1993-07-20 | International Business Machines Corporation | Encapsulated circuitized power core alignment and lamination |
US5290396A (en) | 1991-06-06 | 1994-03-01 | Lsi Logic Corporation | Trench planarization techniques |
US5137618A (en) | 1991-06-07 | 1992-08-11 | Foster Miller, Inc. | Methods for manufacture of multilayer circuit boards |
EP0523856A3 (en) | 1991-06-28 | 1993-03-17 | Sgs-Thomson Microelectronics, Inc. | Method of via formation for multilevel interconnect integrated circuits |
JP2920854B2 (ja) | 1991-08-01 | 1999-07-19 | 富士通株式会社 | ビィアホール構造及びその形成方法 |
US5420078A (en) | 1991-08-14 | 1995-05-30 | Vlsi Technology, Inc. | Method for producing via holes in integrated circuit layers |
JP2658661B2 (ja) | 1991-09-18 | 1997-09-30 | 日本電気株式会社 | 多層印刷配線板の製造方法 |
US5239448A (en) | 1991-10-28 | 1993-08-24 | International Business Machines Corporation | Formulation of multichip modules |
KR100235937B1 (ko) | 1992-03-31 | 1999-12-15 | 김영환 | 반도체소자 제조공정의 비아 콘택형성방법 |
US5483100A (en) | 1992-06-02 | 1996-01-09 | Amkor Electronics, Inc. | Integrated circuit package with via interconnections formed in a substrate |
ATE180137T1 (de) | 1992-06-15 | 1999-05-15 | Heinze Dyconex Patente | Verfahren zur herstellung von leiterplatten unter verwendung eines halbzeuges mit extrem dichter verdrahtung für die signalführung |
US5450290A (en) * | 1993-02-01 | 1995-09-12 | International Business Machines Corporation | Printed circuit board with aligned connections and method of making same |
US5337487A (en) | 1993-03-26 | 1994-08-16 | Mangino Sr Albert R | Layout tool |
US5448020A (en) * | 1993-12-17 | 1995-09-05 | Pendse; Rajendra D. | System and method for forming a controlled impedance flex circuit |
US5391513A (en) | 1993-12-22 | 1995-02-21 | Vlsi Technology, Inc. | Wet/dry anti-fuse via etch |
US5514622A (en) | 1994-08-29 | 1996-05-07 | Cypress Semiconductor Corporation | Method for the formation of interconnects and landing pads having a thin, conductive film underlying the plug or an associated contact of via hole |
US5453403A (en) | 1994-10-24 | 1995-09-26 | Chartered Semiconductor Manufacturing Pte, Ltd. | Method of beveled contact opening formation |
US5487218A (en) | 1994-11-21 | 1996-01-30 | International Business Machines Corporation | Method for making printed circuit boards with selectivity filled plated through holes |
KR960028736A (ko) * | 1994-12-07 | 1996-07-22 | 오오가 노리오 | 프린트 기판 |
US5774340A (en) * | 1996-08-28 | 1998-06-30 | International Business Machines Corporation | Planar redistribution structure and printed wiring device |
US5955704A (en) * | 1996-11-21 | 1999-09-21 | Dell U.S.A., L.P. | Optimal PWA high density routing to minimize EMI substrate coupling in a computer system |
US5930119A (en) * | 1998-02-26 | 1999-07-27 | Arizona Digital, Inc. | Backplane having reduced LC product |
-
1998
- 1998-12-02 US US09/204,458 patent/US6175087B1/en not_active Expired - Lifetime
-
1999
- 1999-10-01 TW TW088116981A patent/TW513901B/zh not_active IP Right Cessation
- 1999-11-29 CN CNB991209761A patent/CN1182763C/zh not_active Expired - Lifetime
- 1999-11-30 KR KR1019990054008A patent/KR100342088B1/ko not_active IP Right Cessation
-
2000
- 2000-10-11 HK HK00106448A patent/HK1027468A1/xx not_active IP Right Cessation
-
2001
- 2001-01-02 US US09/753,015 patent/US6451509B2/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
KR100342088B1 (ko) | 2002-06-26 |
US6451509B2 (en) | 2002-09-17 |
CN1261765A (zh) | 2000-08-02 |
TW513901B (en) | 2002-12-11 |
KR20000047807A (ko) | 2000-07-25 |
US20010023044A1 (en) | 2001-09-20 |
US6175087B1 (en) | 2001-01-16 |
HK1027468A1 (en) | 2001-01-12 |
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