CN1223013A - 半导体装置的制造方法以及半导体元件 - Google Patents
半导体装置的制造方法以及半导体元件 Download PDFInfo
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Abstract
涉及本发明的半导体装置的制造方法,实施包含以下步骤的处理:使半导体元件的电极与印刷电路板的电极对应地在印刷电路板上放置半导体元件的步骤;在印刷电路板上放置了半导体元件的状态下检查作为半导体装置的功能的步骤;当检查结果良好时相互接合印刷电路板和半导体元件的电极的步骤;当检查结果不好时至少将印刷电路板以及半导体元件的一方更换为同一种类的另一元件后再次检查作为半导体装置的功能的步骤。如果采用此构成,则因在印刷电路板上放置半导体元件的状态下,检查作为半导体装置的功能,因此当检查结果不好时,可以很容易地至少将印刷电路板和半导体元件的一方废弃或更换,在可以抑制元件的浪费的同时谋求作业的效率。另外,涉及本发明的半导体元件,因为在一面上设置和印刷电路板的电极连接的电极焊盘,并且在和上述面相反的另一面上设置检查用的电极焊盘,所以即使在使被设置在半导体的一面上的电极焊盘接触印刷电路板的电极时该电极被隐没的状态下,也可以使用被设置在半导体元件的另一面上的检查用电极焊盘,很容易地实施功能检查。
Description
本发明涉及通过将半导体元件安装在印刷电路板上得到半导体装置的半导体装置的制造方法,和在实施该制造方法时所使用的合适的半导体元件。
在将半导体元件安装在印刷电路板上制造半导体装置时,作为与近年来要求安装面积更小更薄的需要相适应的方法,已知有FCB(倒装芯片键合)法和TAB(载带自动键合)法。
如图24所示,FCB法是使印刷电路板2和集成电路裸片3通过在树脂6中混合导电粒子7形成的各向异性导电膜5和由金属构成的凸块4连接的方法。
即,在集成电路裸片3的电极焊盘10上设置凸块4构成带有凸块的集成电路裸片1,为了连接该带有凸块的集成电路芯片1和印刷电路板2,在上述凸块4和印刷电路板2上的电极焊盘8之间插入各向异性导电膜5,集成电路裸片3的电极焊盘10通过凸块4和各向异性导电膜5的导电粒子7与印刷电路板2上的电极焊盘8导通。
另外,使用FCB法的半导体装置的制造过程如图25所示。
首先,准备印刷电路板2、各向异性导电膜5以及集成电路裸片3(S1、S2、S3)
在此,在印刷电路板2的电极焊盘8上放置各向异性导电膜5,是使用各向异性导电膜贴附装置(未图示)将各向异性导电膜浮搁在电极焊盘8上(S4)。
另外,通过使用引线键合装置(未图示),在集成电路裸片3的电极焊盘10上形成凸块4,从而构成带有凸块的集成电路芯片1,此后进行电气检查,抛弃次品(S6)。
在放置了各向异性导电膜5的印刷电路板2上,用键合(FCB)装置搭载正品的带有凸块的集成电路裸片1,并加机械压力,通过各向异性导电膜5的导电粒子7使凸块4和电极焊盘8之间导通,并且用加热器加热,通过热压接将带有凸块的集成电路芯片1接合(安装)在印刷电路板2上(S7)。
在印刷电路板2上安装带有凸块的集成电路芯片1后,通过使检查机器的探针(未图示)接触进行功能检查(S8),在抛弃次品,从键合装置中取出正品后完成半导体装置的制造(S9)。
另一方面,TAB法是将膜载体LSI安装在印刷电路板上的方法,使用TAB法的半导体装置的制造过程如图26所示。
首先,准备印刷电路板和膜载体LSI(S10、S11)。
在此,对于膜载体LSI单独进行功能检查(S12),抛弃次品。
接着,使用键合(TAB)装置搭载正品的膜载体LSI接合在印刷电路板的规定位置上,在印刷电路板上安装膜载体LSI(S13)。
其后,通过使检查机器的探针(未图示)接触进行功能检查(S14),从键合装置中取出正品完成半导体装置(S18)。
另一方面,在安装后的功能检查(S14)中,当判定半导体装置为次品时,从印刷电路板上拆下膜载体LSI(S15),对膜载体LSI和印刷电路板分别独立地进行正品和次品的判别(S16、S17),剔除次品,膜载体LSI以及印刷电路板的正品在印刷电路板上安装膜载体LSI的步骤中(S13)被再次使用。
可是,在用图24和图25说明的FCB法中,在安装后的功能检查(S8)中,当判定半导体装置是次品时,由于将带有凸块的集成电路芯片和印刷电路板一起废弃,因此存在连未必是次品的带有凸块的集成电路芯片或者印刷电路板一同抛弃的缺点。
因此,考虑了这样的结构,即,采用容易从印刷电路板拆下带有凸块的集成电路芯片的接合强度低的各向异性导电膜,当在功能检查中判定为次品时,使用修理装置将带有凸块的集成电路芯片从印刷电路板上拆下,对正品元件进行再利用。
但是,由于采用连接强度低的各向异性导电膜,因此不仅存在在印刷电路板上安装带有凸块的集成电路芯片构成的半导体装置的可靠性降低的缺点,而且在修理时需要很多时间。
另一方面,在用图26说明的TAB法中,在判定半导体装置为次品,从印刷电路板上拆下膜载体LSI时,膜载体LSI因壁薄而容易损害,因而存在为了防止损坏需要高价的修理装置的问题。
本发明就是为了解决上述以往技术的问题而提出的,其目的在于提供一种在半导体装置的制造时可以防止废弃印刷电路板和半导体装置的正品这一缺点的同时,可以在半导体装置的制造中被判定为次品时,容易从印刷电路板上拆下半导体装置,由此提高作业效率的半导体装置的制造方法。
另外,本发明的目的在于,提供一种在实施上述的半导体装置的制造方法时适合的半导体元件。
本发明技术方案1所述的半导体装置的制造方法,是在印刷电路板上安装半导体元件得到半导体装置的半导体装置的制造方法,其特征在于实施包含以下步骤的处理:
使半导体元件的电极与印刷电路板的电极对应地在印刷电路板上放置半导体元件的步骤;
在印刷电路板上放置有半导体元件的状态下,检查作为半导体的功能的步骤;
当在检查步骤中的检查结果良好时,相互接合印刷电路板和半导体元件的电极的步骤;
当在检查步骤中的检查结果不好时,在将印刷电路板以及半导体元件的至少一方换成同一类型的另一元件后,再次检查作为半导体装置的功能的步骤。
如果采用此构成,因为是将半导体元件放置在印刷电路板上,并且在不接合印刷电路板和半导体元件的状态下,检查作为半导体装置的功能,所以当该检查结果不良时,可以极其容易地单独废弃在未接合状态下的印刷电路板和半导体元件的一方,同时可以更换同一种类的另一元件,由此可以抑制在半导体装置的制造时的元件的浪费,另外可以谋求在半导体装置的制造时的作业效率。
在本发明技术方案2所述的半导体装置的制造方法中,其特征在于:在将半导体元件放置在印刷电路板上的状态下,加可以使印刷电路板的电极和与该印刷电路板的电极接触的半导体元件的电极相互良好连接的压力。
如果采用此构成,则可以得到印刷电路板和半导体元件的良好的电连接状态。
本发明技术方案3所述的半导体装置的制造方法的特征在于:半导体元件是集成电路裸片。
如果采用此构成,则在将集成电路裸片放置在印刷电路板上的状态下检查作为半导体装置的功能时,如果检查结果不好,可以容易单独地只废弃不在接合状态下的印刷电路板和集成电路裸片中的至少一方。
本发明技术方案4所述的半导体装置的制造方法,其特征在于:半导体元件是集成电路裸片,在一面上设置与印刷电路板的电极连接的电极焊盘,并且在和这一面相反的面上设置检查用的电极焊盘。
如果采用此构成,则由于在印刷电路板的电极上使被设置在集成电路裸片一面上的电极焊盘接触,因此即使该电极焊盘处于隐没状态,也可以使用被设置在集成电路裸片的另一面上的检查用的电极焊盘,很容易地进行检查。
本发明技术方案5所述的半导体装置的制造方法,其特征在于:通过各向异性导电材料接合印刷电路板的电极和在集成电路裸片中与印刷电路板的电极接触的电极。
如果采用此构成,则可以与各种条件相适应地选择和印刷电路板的电极和集成电路裸片的电极的接合状态。
本发明技术方案6所述的半导体装置的制造方法,其特征在于:半导体元件是集成电路裸片在和印刷电路板的电极连接的电极上形成凸块,通过该凸块连接印刷电路板。
如果采用此构成,则通过装入凸块,就可以将在印刷电路板上的电极和在集成电路裸片上的电极的电连接状态设置成可靠的状态。
本发明技术方案7所述的半导体装置的制造方法,其特征在于:通过使检查用的探针接触在集成电路裸片中的检查用的电极焊盘,实施功能的检查。
如果采用此构成,通过使检查用的探针检查任意的电极,从所需要的电极中得到信号等,就可以实施必要的检查。
本发明技术方案8所述的半导体装置的制造方法,其特征在于:用密封树脂封装集成电路裸片中的检查用电极焊盘。
如果采用此构成,则可以有效地保护集成电路裸片中的检查用的电极焊盘。
本发明技术方案9所述的半导体装置的制造方法,其特征在于:半导体元件是膜载体LSI。
如果采用此构成,则在印刷电路板上放置膜载体LST的状态下检查作为半导体装置的功能时,如果检查结果不好,则很容易只单独废弃不在接合状态下的印刷电路板和膜载体LSI的至少一方。
本发明技术方案10所述的半导体装置的制造方法,其特征在于:通过使检查用探针接触印刷电路板的电极,实施功能的检查。
如果采用此构成,则通过使检查用的探针接触任意的电极,从需要的电极中得到信号等,从而可以实施必要的检查。
本发明技术方案11所述的半导体装置的制造方法,其特征在于:用金属间键合接合印刷电路板的电极和膜载体LSI的电极。
如果采用此构成,则可以与各种条件相适应地选择印刷电路板的电极和膜载体LSI的电极的接合状态。
本发明技术方案12所述的半导体装置的制造方法,其特征在于:通过各向异性导电材料接合印刷电路板的电极和膜载体LSI的电极。
如果采用此构成,则可以与各种条件相适应地选择印刷电路板的电极和膜载体LSI的电极的接合状态。
本发明技术方案13所述的半导体元件的构成特征在于:在一面上设置与印刷电路板的电极连接的电极焊盘,并且在和该面相反的另一面上设置检查用的电极焊盘。
如果采用此构成,则由于使设置在半导体元件的一面上的电极焊盘接触印刷电路板的电极,因此,即使该电极处于隐没状态,也可以用被设置在半导体元件的另一面上的检查用电极焊盘很容易地进行检查。
本发明技术方案14所述的半导体元件的特征在于:是集成电路裸片。
如果采用此构成,则在印刷电路板上放置集成电路裸片的状态下检查作为半导体装置的功能时,如果检查结果不良,则可以很容易只单独废弃未在接合状态下的印刷电路板和集成电路裸片中的至少一方。
本发明技术方案15所述的半导体元件的特征在于:是集成电路裸片,在和印刷电路板的电极连接的电极上形成凸块,通过该凸块与印刷电路板连接。
如果采用此构成,则通过装入凸块,可以将印刷电路板上的电极和集成电路裸片上的电极的电连接设置成可靠状态。
图1是展示涉及本发明的半导体装置的制造方法中用FCB法将集成电路裸片安装在印刷电路板上的实施例1的流程图。
图2(a)以及图2(b)是展示印刷电路板以及在该印刷电路板上浮搁着的各向异性导电膜的状态的图。
图3(a)以及图3(b)是展示涉及本发明的集成电路裸片以及在该集成电路裸片上形成凸块的状态的侧面图。
图4是展示组合带有凸块的集成电路裸片、各向异性导电膜以及印刷电路板的状态的示意图。
图5是展示在印刷电路板上放置带有凸块的集成电路裸片的步骤的示意图。
图6是展示对各向异性导电膜加压状态的示意图。
图7是展示功能检查的步骤的示意图。
图8是展示接合印刷电路板和带有凸块的集成电路芯片的步骤的示意图。
图9是展示从带有凸块的集成电路裸片中撤离带有加热器的弹簧筒的状态的示意图。
图10是展示树脂封装步骤的示意图。
图11是展示完成后的半导体装置的示意图。
图12(a)以及(b)是展示在功能检查中被判定为次品的情况下的步骤示意图。
图13是展示涉及本发明的半导体装置的制造方法中用TAB法将膜载体LSI安装在印刷电路板上的实施例2的流程图。
图14是展示膜载体LSI以及印刷电路板的侧面图。
图15是展示组合了膜载体LSI以及印刷电路板的状态的示意图。
图16是展示在印刷电路板上放置膜载体LSI的步骤以及功能检查的步骤的示意图。
图17是展示接合印刷电路板和膜载体LSI的步骤的示意图。
图18是展示从印刷电路板暂时撤离检查用的探针的状态的示意图。
图19是展示从膜载体LSI中撤离键合头的状态的示意图。
图20展示完成后的半导体装置的示意图。
图21(a)以及(b)是展示在功能检查中被判定为次品的情况下的步骤的示意图。
图22(a)以及(b)是展示用金属间键合在印刷电路板上接合膜载体LSI的实施例的示意图。
图23(a)以及(b)是展示用各向异性导电膜在印刷电路板上接合膜载体LSI的实施例的示意图。
图24是展示在印刷电路板上安装集成电路裸片构成的以往的半导体装置的图。
图25是展示在印刷电路板上安装集成电路裸片构成的半导体装置的制造方法的流程图。
图26是展示在印刷电路板上安装膜载体LSI构成的半导体装置的制造方法的流程图。
以下,根据附图详细说明涉及本发明的半导体装置的制造方法以及半导体元件在实施中的最佳实施例。
进而,在各图中,通过在同一构成元素上附加同一符号,省略其说明。
从图1至图12所示的实施例1,是用FCB法将集成电路裸片安装在印刷电路板上的半导体装置的制造方法,该半导体装置的制造方法,按照图1(流程图)所示的顺序实施。
在上述半导体装置的制造方法中,首先,准备如图2以及图3所示的印刷电路板2、各向异性导电膜(ACF)5,以及作为半导体元件的集成电路裸片3(S1、S2、S3)。
如图2(a)所示的印刷电路板2,在其表面的规定位置上设置有所需要的电极焊盘8、8…,对准备好的印刷电路板2,在电极焊盘8、8…上放置如图2(b)所示的被热压接的上述各向异性导电膜5(S4)。
另一方面,如图3(a)所示,集成电路裸片3在其一面(图中的上面)上设置用于与上述的印刷电路板2的电极8、8…连接的电极焊盘10、10…,进而,在集成电路裸片3的另一面(图中的下面)上设置有检查用的电极焊盘9、9…。
这里,上述检查用的电极焊盘9、9…的构成,可以设置成和电极焊盘10、10…的设置状态(个数、配置等)相同,或者也可以和电极焊盘10、10…的设置状态无关,而在任意的位置上设置后述的功能检查所需要的个数的电极焊盘9。
对于事先准备的集成电路裸片3,用引线键合装置(未图示),在如图3(b)所示的各电极焊盘10、10…上形成凸块4、4…(S5),构成带有凸块的集成电路裸片1。
对于这样构成的带有凸块的集成电路裸片1,实施电检查(作为集成电路的性能检查)(S6),在该电检查中被判定为次品的带有凸块的集成电路裸片1被废弃。
将在电检查(S6)中被判定为正品的带有凸块的集成电路裸片1,如图4所示,以使其反转的姿势吸附在键合(FCB)装置的带有加热器的弹簧筒13上,如图5所示对着放置有各向异性导电膜5的印刷电路板2的电极8、8…放置(S7)。
在此,如图6所示,对各向异性导电膜5加机械压力,使带有凸块的集成电路裸片1的凸块4,和印刷电路板2上的电极焊盘8通过各向异性导电膜5中的导电粒子7、7…相互导通。
在此状态下,如图7所示,使检查用的测试器探针12接触带有凸块的集成电路裸片1中的检查用电极焊盘9、9…,实施作为半导体装置的功能检查(S8)。
这里,带有凸块的集成电路裸片1中的检查用的电极焊盘9、9…,因为在集成电路裸片3中被设置在和设置有用于连接印刷电路板2的电极8、8…的电极焊盘10、10…的面相反的面上,所以通过使凸块4与印刷电路板2的电极焊盘8接触,就可以在带有凸块的集成电路芯片1的电极焊盘10被隐没的状态下,从带有集成电路裸片1的表面(图中的上面)露出。
因此,可以很容易且可靠地使检查用的测试器探针12接触带有凸块的集成电路芯片1的检查用的电极焊盘9,由此可以可靠地实施作为半导体装置的功能检查。
在功能检查(S8)中被判定为正品时,如图8所示,在经由导电粒子7、7…使凸块4和电极焊盘8导通的状态下,通过对带有加热器的吸附弹簧筒13的加热器通电,靠压力和加热使各向异性导电膜5的导电粒子7破碎,并且在树脂6融化后固化,由此对印刷电路板2实施带有凸块的集成电路芯片1的接合(安装)(S9)。
进而,在对带有加热器的吸附弹簧筒13的加热器通电时,当检查用的测试器探针12以及与该测试探针12连接的检查机器的电路有受到热应力破坏的危险时,通过使测试器探针12脱离带有凸块的集成电路裸片1,就可以对上述电路等的破坏防患于未然。
其后,如图9所示,使带有加热器的吸附弹簧筒13以及测试探针12(未图示)离开带有凸块的集成电路裸片1,接着如图10所示使键合(FCB)装置的分配器喷嘴14下降,在带有凸块的集成电路裸片1上的检查用的电极焊盘9、9…上滴下并涂布封装树脂11,通过该封装树脂的硬化进行树脂封装(S10),由此完成如图11所示的半导体装置100(S11)。
另一方面,在上述的功能检查(S8)中,当判定为次品时,通过从图12(a)所示的功能检查的状态,用如图12(b)所示的键合(FCB)装置的带有加热器的吸附弹簧筒13将其吸附,使带有加热器的吸附弹簧筒13上升,从而从印刷电路板32拆下带有凸块的集成电路裸片1(S12),另外从印刷电路板2上取下已放置的各向异性导电膜5。
其后,用测定器对从键合(FCB)装置上取出的带凸块的集成电路裸片1进行正品和次品的判定(S13),废弃次品,而对带凸块的集成电路裸片1的正品,再次在将带凸块的集成电路裸片1放置在放置有各向异性导电膜5的印刷电路板2上的步骤(S7)中使用。
另外,分别用测定器对从键合(FCB)装置取出的印刷电路板2以及各向异性导电膜5进行正品和次品的判定(S14、S15),废弃次品后,印刷电路板2以及各向异性导电膜5的正品再次被用于在印刷电路板2上放置各向异性导电膜5的步骤(S4)中。
进而,在上述实施例中,是用各向异性导电膜5接合带凸块的集成电路芯片1和印刷电路板2,但也可以替换各向异性导电膜使用同样是各向异性导电材料的各向异性导电胶,这种情况下,被判定为次品的印刷电路板2,要和涂布在该印刷电路板2上的各向异性导电胶同时废弃。
如果采用上述的实施例1,则在通过各向异性导电膜5接合带凸块的集成电路裸片1和印刷电路板2之前,通过各向异性导电膜5在印刷电路板2上放置带凸块的集成电路裸片1,由于在使带凸块的集成电路裸片1和印刷电路板2电连接的状态下实施功能检查,所以当作为半导体装置被判定为次品时,可以很容易从印刷电路板2分离带凸块的集成电路裸片1,从而可以提高在半导体装置制造时的作业效率。
另外,因为在分离印刷电路板2和带凸块的集成电路裸片1后,可以再利用是正品的元件(带凸块的集成电路裸片1、印刷电路板2以及各向异性导电膜5),所以可以实现提高半导体装置的制造中的经济性。
从图13至图23所示的实施例2,是用TAB法将膜载体LSI安装在印刷电路板上的半导体装置的制造方法,该半导体装置的制造方法,按照图13(流程图)所示的顺序实施。
在上述半导体装置的制造方法中,首先,如图14(a)以及(b)所示,准备设置有作为半导体元件的膜载体LSI31,和电极33、33…的印刷电路板32(S1、S2)。
这里,预先向印刷电路板32上的电极33的表面提供焊料38。
接着,如图15所示,用被设置在键合(TAB)装置的键合头37上的元件吸附嘴36吸附事先准备的膜载体LSI31。
其后,如图16所示,进行膜载体LSI31的引导部位和印刷电路板32上的电极33的对位,并使键合头37下降,将膜载体LSI31放置在印刷电路板32上(S3)。
这时,在由热压接工具34只加压的状态下,在使上述引导部位和电极33相互接触的同时,使被设置在键合头37上的检查用的探针35接触所需要的电极33。
这样,使检查用的探针35接触电极33,对用膜载体LSI31和印刷电路板32构成的半导体装置进行功能检查(S4)。
当在检查功能(S4)中被判断为正品时,如图17所示,由热压接工具34加热焊料38使其融化,通过焊料接合膜载体LSI31的引导部位和印刷电路板32上的电极33,对印刷电路板32安装膜载体LSI31(S5)。
在此,检查用的探针35,和热压接工具34分开设置,可以相对键合头37上下移动,当进行焊接时,检查用的探针35以及与该探针连接的检查用机器的电路有受到热应力破坏的危险时,如图18所示使检查用探针35上升,脱离电极33,从而可以对上述电路等的破坏防患于未然。
在进行了上述引导部位和电极33的焊接后,如图19所示,使键合(TAB)装置的键合头37上升,从而使热压接工具34以及检查用的探针35撤开,从键合(TAB)装置取出半导体装置,如图20所示完成半导体装置200(S6)。
另一方面,在上述的功能检查(S4)中,当被判定为次品时,通过从如图21(a)所示的功能检查的状态,用被设置在如图21(b)所示的键合(TAB)装置的键合头37上的元件吸附嘴36吸附膜载体LSI31,并使键合头37上升,从印刷电路板32上取下膜载体LSI31(S7)。
其后,对从键合(TAB)装置取出的膜载体LSI31,用测定器进行正品和次品的判定(S8),次品被废弃,而正品膜载体LSI31再次被用于将膜载体LSI31放置在印刷电路板32的步骤(S3)中。
另外,对从键合(TAB)装置取出的印刷电路板32,用测定器进行正品和次品的判定(S9),次品被抛弃,而正品的印刷电路板32被再次用于将膜载体LSI31放置在印刷电路板32上的步骤(S3)中。
进而,在图13中用虚线围起的步骤,是用同一机械进行一连串的处理,因此可以得到效率高的半导体装置的制造加工。
如果采用上述实施例2,则因为在用焊料38接合膜载体LSI31和印刷电路板32之前,在印刷电路板32上放置膜载体LSI31并在电连接的状态下实施功能检查,所以当作为半导体装置被判定为次品时,可以很容易从印刷电路板32分离膜载体LSI31,并可以提高在半导体装置的制造时的作业效率。
另外,当分离印刷电路板32和膜载体LSI31后,因为可以再次利用为正品的元件(膜载体LSI31或者印刷电路板32),所以还可以提高与半导体装置的制造有关的经济性。
可是,虽然在上述实施例2中,用焊料38接合膜载体LSI31和印刷电路板32,但如图22(a)以及(b)所示,也可以通过热压接(金属间键合)在印刷电路板32的电极33的表面上镀有金(Au)或者银(Ag)的金属层m1,和在膜载体LSI31的引导部位表面上镀有锡(Sn)的金属层m2,接合膜载体LSI31和印刷电路板32得到半导体装置201。
进而,如图23(a)以及(b)所示,还可以通过各向异性导电膜40热压接印刷电路板32的电极33和膜载体LSI31的引导部位,接合膜载体LSI31和印刷电路板32得到半导体装置202。
另外,还可以替换各向异性导电膜40,用同样是各向异性材料的各向异性导电胶,接合膜载体LSI31和印刷电路板32。
涉及本发明的半导体装置的制造方法以及半导体元件,可以有效地适用于构成各种电子机器的半导体装置的制造方法,以及构成上述半导体装置的半导体元件。
Claims (15)
1、一种半导体装置的制造方法,在将半导体元件安装在印刷电路板上得到半导体装置的半导体装置的制造方法中,其特征在于实施包含以下步骤的处理:
使上述半导体元件的电极与上述印刷电路板的电极对应的在上述印刷电路板上放置上述半导体元件的步骤;
在上述印刷电路板上已经放置了上述半导体元件的状态下,检查作为半导体装置的功能的步骤;
当在上述检查步骤中的检查结果良好时,接合上述印刷电路板的电极和上述半导体元件的电极得到半导体装置的步骤;
当在上述检查步骤中的检查结果不理想时,在至少将上述印刷电路板以及上述半导体元件的一方更换为同一种类型的另一元件后,再次检查作为上述半导体装置的功能的步骤。
2、如权利要求1所述的半导体装置的制造方法,其特征在于:在上述印刷电路板上放置有上述半导体元件的状态下,施加使上述印刷电路板的电极和与该印刷电路板的电极接触的上述半导体元件的电极相互良好接触的压力。
3、如权利要求1或2所述的半导体装置的制造方法,其特征在于:上述半导体元件是集成电路裸片。
4、如权利要求3所述的半导体装置的制造方法,其特征在于:上述集成电路裸片,在一面上设置有和印刷电路板的电极连接的电极焊盘,与此同时,在和上述面的相反的另一面上设置有检查用的电极焊盘。
5、如权利要求3或4所述的半导体装置的制造方法,其特征在于:通过各向异性导电材料接合上述印刷电路板的电极和在上述集成电路裸片中与上述印刷电路板的电极连接的电极。
6、如权利要求3至5的任意项所述的半导体装置的制造方法,其特征在于:上述集成电路裸片在和上述印刷电路板的电极连接的电极上形成凸块,通过该凸块和印刷电路板连接。
7、如权利要求4至6的任意项所述的半导体装置的制造方法,其特征在于:通过使检查用的探针接触在上述集成电路裸片上的检查用的电极,实施功能的检查。
8、如权利要求4至6的任意项所述的半导体装置的制造方法,其特征在于:用封装树脂封装在上述集成电路裸片中的检查用的电极焊盘。
9、如权利要求1或2所述的半导体装置的制造方法,其特征在于:上述半导体元件是膜载体LSI。
10、如权利要求9所述的半导体装置的制造方法,其特征在于:通过使检查用探针接触上述印刷电路板的电极实施功能的检查。
11、如权利要求9所述的半导体装置的制造方法,其特征在于:用金属间键合接合上述印刷电路板的电极和上述膜载体LSI的电极。
12、如权利要求9所述的半导体装置的制造方法,其特征在于:通过各向异性导电材料接合上述印刷电路板的电极和上述膜载体LSI的电极。
13、一种半导体元件,是被安装在印刷电路板上构成半导体装置的半导体元件,其特征在于:
在一面上设置和上述印刷电路板的电极连接的电极焊盘,并且在和上述面相反的另一面上安装检查用的电极焊盘。
14、如权利要求13所述的半导体元件,其特征在于:上述半导体元件是集成电路裸片。
15、如权利要求14所述的半导体元件,其特征在于:上述集成电路裸片在和上述印刷电路板的电极连接的电极上形成凸块,通过该凸块与上述印刷电路板连接。
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JP93623/1997 | 1997-04-11 | ||
JP9093623A JPH10284535A (ja) | 1997-04-11 | 1997-04-11 | 半導体装置の製造方法及び半導体部品 |
PCT/JP1998/001681 WO1998047175A1 (fr) | 1997-04-11 | 1998-04-13 | Procede de fabrication de dispositif et composant semiconducteurs |
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AU (1) | AU6748998A (zh) |
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CN113301718A (zh) * | 2021-05-28 | 2021-08-24 | 淮南师范学院 | 一种微型电子元件焊接装置及其检修方法 |
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US20070187844A1 (en) | 2006-02-10 | 2007-08-16 | Wintec Industries, Inc. | Electronic assembly with detachable components |
US20110222252A1 (en) * | 2006-02-10 | 2011-09-15 | Kong-Chen Chen | Electronic assembly with detachable components |
US20110222253A1 (en) * | 2006-02-10 | 2011-09-15 | Kong-Chen Chen | Electronic assembly with detachable components |
US20110223695A1 (en) * | 2006-02-10 | 2011-09-15 | Kong-Chen Chen | Electronic assembly with detachable components |
JP5732239B2 (ja) * | 2010-11-30 | 2015-06-10 | デクセリアルズ株式会社 | 熱圧着ヘッド、熱圧着装置、実装方法 |
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JP2015072236A (ja) * | 2013-10-04 | 2015-04-16 | 富士通株式会社 | 半導体デバイス製造装置 |
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FR2013735A1 (zh) * | 1968-07-05 | 1970-04-10 | Gen Electric Inf Ita | |
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JP3055193B2 (ja) | 1991-03-19 | 2000-06-26 | セイコーエプソン株式会社 | 回路の接続方法及び液晶装置の製造方法 |
US5258648A (en) * | 1991-06-27 | 1993-11-02 | Motorola, Inc. | Composite flip chip semiconductor device with an interposer having test contacts formed along its periphery |
JPH0521509A (ja) | 1991-07-12 | 1993-01-29 | Ricoh Co Ltd | 半導体装置、その実装体及び実装方法 |
US5334857A (en) * | 1992-04-06 | 1994-08-02 | Motorola, Inc. | Semiconductor device with test-only contacts and method for making the same |
FR2690278A1 (fr) * | 1992-04-15 | 1993-10-22 | Picogiga Sa | Composant photovoltaïque multispectral à empilement de cellules, et procédé de réalisation. |
US5426072A (en) * | 1993-01-21 | 1995-06-20 | Hughes Aircraft Company | Process of manufacturing a three dimensional integrated circuit from stacked SOI wafers using a temporary silicon substrate |
JPH0714878A (ja) | 1993-06-24 | 1995-01-17 | Sharp Corp | 電子部品の実装方法 |
JPH0758152A (ja) * | 1993-08-13 | 1995-03-03 | Sharp Corp | 半導体装置の実装方法 |
JP3260253B2 (ja) * | 1995-01-06 | 2002-02-25 | 松下電器産業株式会社 | 半導体装置の検査方法と検査用導電性接着剤 |
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- 1998-04-13 EP EP98912776A patent/EP0942466A4/en not_active Withdrawn
- 1998-04-13 AU AU67489/98A patent/AU6748998A/en not_active Abandoned
- 1998-04-13 WO PCT/JP1998/001681 patent/WO1998047175A1/ja not_active Application Discontinuation
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Cited By (2)
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CN107765656A (zh) * | 2016-08-23 | 2018-03-06 | 东和株式会社 | 管理系统以及管理方法 |
CN113301718A (zh) * | 2021-05-28 | 2021-08-24 | 淮南师范学院 | 一种微型电子元件焊接装置及其检修方法 |
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AU6748998A (en) | 1998-11-11 |
EP0942466A4 (en) | 2003-01-02 |
WO1998047175A1 (fr) | 1998-10-22 |
JPH10284535A (ja) | 1998-10-23 |
US6245582B1 (en) | 2001-06-12 |
CN1108635C (zh) | 2003-05-14 |
EP0942466A1 (en) | 1999-09-15 |
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