CN115769382A - 半导体装置 - Google Patents

半导体装置 Download PDF

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Publication number
CN115769382A
CN115769382A CN202180046974.1A CN202180046974A CN115769382A CN 115769382 A CN115769382 A CN 115769382A CN 202180046974 A CN202180046974 A CN 202180046974A CN 115769382 A CN115769382 A CN 115769382A
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CN
China
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region
active
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outer peripheral
side bottom
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Pending
Application number
CN202180046974.1A
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English (en)
Chinese (zh)
Inventor
尾崎大辅
野口晴司
樱井洋辅
浜崎竜太郎
山田拓弥
伊仓巧裕
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Fuji Electric Co Ltd
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Fuji Electric Co Ltd
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Publication date
Application filed by Fuji Electric Co Ltd filed Critical Fuji Electric Co Ltd
Publication of CN115769382A publication Critical patent/CN115769382A/zh
Pending legal-status Critical Current

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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/17Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
    • H10D62/177Base regions of bipolar transistors, e.g. BJTs or IGBTs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D12/00Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT]
    • H10D12/411Insulated-gate bipolar transistors [IGBT]
    • H10D12/441Vertical IGBTs
    • H10D12/461Vertical IGBTs having non-planar surfaces, e.g. having trenches, recesses or pillars in the surfaces of the emitter, base or collector regions
    • H10D12/481Vertical IGBTs having non-planar surfaces, e.g. having trenches, recesses or pillars in the surfaces of the emitter, base or collector regions having gate structures on slanted surfaces, on vertical surfaces, or in grooves, e.g. trench gate IGBTs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/102Constructional design considerations for preventing surface leakage or controlling electric field concentration
    • H10D62/103Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices
    • H10D62/105Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE] 
    • H10D62/106Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE]  having supplementary regions doped oppositely to or in rectifying contact with regions of the semiconductor bodies, e.g. guard rings with PN or Schottky junctions
    • H10D62/107Buried supplementary regions, e.g. buried guard rings 
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/124Shapes, relative sizes or dispositions of the regions of semiconductor bodies or of junctions between the regions
    • H10D62/126Top-view geometrical layouts of the regions or the junctions
    • H10D62/127Top-view geometrical layouts of the regions or the junctions of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/111Field plates
    • H10D64/112Field plates comprising multiple field plate segments
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/111Field plates
    • H10D64/117Recessed field plates, e.g. trench field plates or buried field plates
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/20Electrodes characterised by their shapes, relative sizes or dispositions 
    • H10D64/27Electrodes not carrying the current to be rectified, amplified, oscillated or switched, e.g. gates
    • H10D64/311Gate electrodes for field-effect devices
    • H10D64/411Gate electrodes for field-effect devices for FETs
    • H10D64/511Gate electrodes for field-effect devices for FETs for IGFETs
    • H10D64/517Gate electrodes for field-effect devices for FETs for IGFETs characterised by the conducting layers
    • H10D64/519Gate electrodes for field-effect devices for FETs for IGFETs characterised by the conducting layers characterised by their top-view geometrical layouts
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/102Constructional design considerations for preventing surface leakage or controlling electric field concentration
    • H10D62/103Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices
    • H10D62/105Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE] 

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  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Bipolar Transistors (AREA)
  • Electrodes Of Semiconductors (AREA)
CN202180046974.1A 2021-01-25 2021-10-04 半导体装置 Pending CN115769382A (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2021-009648 2021-01-25
JP2021009648 2021-01-25
PCT/JP2021/036687 WO2022158053A1 (ja) 2021-01-25 2021-10-04 半導体装置

Publications (1)

Publication Number Publication Date
CN115769382A true CN115769382A (zh) 2023-03-07

Family

ID=82548676

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202180046974.1A Pending CN115769382A (zh) 2021-01-25 2021-10-04 半导体装置

Country Status (5)

Country Link
US (1) US12575149B2 (https=)
JP (1) JP7459976B2 (https=)
CN (1) CN115769382A (https=)
DE (1) DE112021002612T5 (https=)
WO (1) WO2022158053A1 (https=)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2022158053A1 (ja) 2021-01-25 2022-07-28 富士電機株式会社 半導体装置
JP7593511B2 (ja) * 2022-01-20 2024-12-03 富士電機株式会社 半導体装置
JP2024034141A (ja) * 2022-08-31 2024-03-13 富士電機株式会社 半導体装置および半導体装置の製造方法
WO2025142731A1 (ja) * 2023-12-28 2025-07-03 ローム株式会社 半導体装置

Family Cites Families (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4028333B2 (ja) * 2002-09-02 2007-12-26 株式会社東芝 半導体装置
JP3934613B2 (ja) 2004-01-21 2007-06-20 株式会社東芝 半導体装置
US8519477B2 (en) * 2009-11-20 2013-08-27 Force Mos Technology Co., Ltd. Trench MOSFET with trenched floating gates and trenched channel stop gates in termination
US8680613B2 (en) * 2012-07-30 2014-03-25 Alpha And Omega Semiconductor Incorporated Termination design for high voltage device
MX2014003783A (es) 2011-09-28 2014-05-14 Toyota Motor Co Ltd Igbt y metodo para fabricar el mismo.
WO2013080806A1 (ja) 2011-11-28 2013-06-06 富士電機株式会社 絶縁ゲート型半導体装置およびその製造方法
US8829607B1 (en) * 2013-07-25 2014-09-09 Fu-Yuan Hsieh Fast switching super-junction trench MOSFETs
JP6208579B2 (ja) * 2013-12-26 2017-10-04 トヨタ自動車株式会社 半導体装置
JP6231396B2 (ja) 2014-02-10 2017-11-15 トヨタ自動車株式会社 半導体装置及び半導体装置の製造方法
JP6472714B2 (ja) 2015-06-03 2019-02-20 ルネサスエレクトロニクス株式会社 半導体装置およびその製造方法
JP6728953B2 (ja) * 2015-07-16 2020-07-22 富士電機株式会社 半導体装置及びその製造方法
CN108140674B (zh) 2015-10-16 2021-02-19 三菱电机株式会社 半导体装置
DE102016112721B4 (de) 2016-07-12 2022-02-03 Infineon Technologies Ag n-Kanal-Leistungshalbleitervorrichtung mit p-Schicht im Driftvolumen
DE102017107174B4 (de) 2017-04-04 2020-10-08 Infineon Technologies Ag IGBT mit dV/dt-Steuerbarkeit und Verfahren zum Verarbeiten eines IGBT
JP6946824B2 (ja) * 2017-07-28 2021-10-06 富士電機株式会社 半導体装置および半導体装置の製造方法
DE102017124872B4 (de) 2017-10-24 2021-02-18 Infineon Technologies Ag Verfahren zur Herstellung eines IGBT mit dV/dt-Steuerbarkeit
DE102017124871B4 (de) * 2017-10-24 2021-06-17 Infineon Technologies Ag Leistungshalbleiter-Vorrichtung und Verfahren zum Herstellen einer Leistungshalbleiter-Vorrichtung
WO2020078626A1 (en) 2018-10-18 2020-04-23 Abb Schweiz Ag Insulated gate power semiconductor device and method for manufacturing such device
WO2022158053A1 (ja) 2021-01-25 2022-07-28 富士電機株式会社 半導体装置

Also Published As

Publication number Publication date
US12575149B2 (en) 2026-03-10
JPWO2022158053A1 (https=) 2022-07-28
DE112021002612T5 (de) 2023-03-16
WO2022158053A1 (ja) 2022-07-28
JP7459976B2 (ja) 2024-04-02
US20230124922A1 (en) 2023-04-20

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