CN115702500A - 半导体器件和电子设备 - Google Patents
半导体器件和电子设备 Download PDFInfo
- Publication number
- CN115702500A CN115702500A CN202180041720.0A CN202180041720A CN115702500A CN 115702500 A CN115702500 A CN 115702500A CN 202180041720 A CN202180041720 A CN 202180041720A CN 115702500 A CN115702500 A CN 115702500A
- Authority
- CN
- China
- Prior art keywords
- semiconductor device
- sub
- contacts
- line
- operational amplifier
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
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Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/45—Differential amplifiers
- H03F3/45071—Differential amplifiers with semiconductor devices only
- H03F3/45076—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier
- H03F3/45475—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier using IC blocks as the active amplifying circuit
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/60—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of BJTs
- H10D84/645—Combinations of only lateral BJTs
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/45—Differential amplifiers
- H03F3/45071—Differential amplifiers with semiconductor devices only
- H03F3/45076—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier
- H03F3/4508—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier using bipolar transistors as the active amplifying circuit
- H03F3/45085—Long tailed pairs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/60—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of BJTs
- H10D84/67—Complementary BJTs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
- H10W20/41—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
- H10W20/427—Power or ground buses
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
- H03F2203/45—Indexing scheme relating to differential amplifiers
- H03F2203/45528—Indexing scheme relating to differential amplifiers the FBC comprising one or more passive resistors and being coupled between the LC and the IC
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
- H03F2203/45—Indexing scheme relating to differential amplifiers
- H03F2203/45612—Indexing scheme relating to differential amplifiers the IC comprising one or more input source followers as input stages in the IC
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D10/00—Bipolar junction transistors [BJT]
- H10D10/40—Vertical BJTs
- H10D10/421—Vertical BJTs having both emitter-base and base-collector junctions ending at the same surface of the body
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D10/00—Bipolar junction transistors [BJT]
- H10D10/60—Lateral BJTs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/60—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of BJTs
- H10D84/63—Combinations of vertical and lateral BJTs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
- H10P90/19—Preparing inhomogeneous wafers
- H10P90/1904—Preparing vertically inhomogeneous wafers
- H10P90/1906—Preparing SOI wafers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
- H10W10/10—Isolation regions comprising dielectric materials
- H10W10/181—Semiconductor-on-insulator [SOI] isolation regions, e.g. buried oxide regions of SOI wafers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/541—Dispositions of bond wires
- H10W72/5449—Dispositions of bond wires not being orthogonal to a side surface of the chip, e.g. fan-out arrangements
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/90—Bond pads, in general
- H10W72/941—Dispositions of bond pads
- H10W72/944—Dispositions of multiple bond pads
- H10W72/9445—Top-view layouts, e.g. mirror arrays
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Semiconductor Integrated Circuits (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2020-099164 | 2020-06-08 | ||
| JP2020099164 | 2020-06-08 | ||
| PCT/JP2021/018899 WO2021251081A1 (ja) | 2020-06-08 | 2021-05-19 | 半導体装置、電子機器 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN115702500A true CN115702500A (zh) | 2023-02-14 |
Family
ID=78847227
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202180041720.0A Pending CN115702500A (zh) | 2020-06-08 | 2021-05-19 | 半导体器件和电子设备 |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US20230223403A1 (https=) |
| JP (1) | JP7731879B2 (https=) |
| CN (1) | CN115702500A (https=) |
| DE (1) | DE112021002303B4 (https=) |
| WO (1) | WO2021251081A1 (https=) |
Family Cites Families (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH08115985A (ja) * | 1994-10-17 | 1996-05-07 | Nec Corp | 低雑音の半導体集積回路 |
| JP3408164B2 (ja) * | 1998-09-29 | 2003-05-19 | 三洋電機株式会社 | 半導体集積回路装置 |
| JP2002246553A (ja) * | 2001-02-16 | 2002-08-30 | Matsushita Electric Ind Co Ltd | 半導体集積回路のノイズ低減装置 |
| JP2005039320A (ja) * | 2003-07-15 | 2005-02-10 | Renesas Technology Corp | 半導体素子及び高周波電力増幅装置 |
| JP4513575B2 (ja) * | 2005-01-12 | 2010-07-28 | 三菱電機株式会社 | 保持解放機構 |
| JP5090696B2 (ja) * | 2006-09-12 | 2012-12-05 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
| JP2008112857A (ja) * | 2006-10-30 | 2008-05-15 | Nec Electronics Corp | 半導体集積回路装置 |
| JP2008193019A (ja) * | 2007-02-08 | 2008-08-21 | Matsushita Electric Ind Co Ltd | 半導体集積回路装置 |
| US9490179B2 (en) | 2010-05-21 | 2016-11-08 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor element and semiconductor device |
| JP5724934B2 (ja) | 2011-07-05 | 2015-05-27 | 株式会社デンソー | 半導体装置 |
| JP6842553B2 (ja) * | 2017-08-22 | 2021-03-17 | ローム株式会社 | オペアンプ |
| US10608168B2 (en) * | 2017-10-04 | 2020-03-31 | Allegro Microsystems, Llc | Isolated hall effect element with improved electro-magnetic isolation |
| JP7308595B2 (ja) * | 2018-07-02 | 2023-07-14 | Tianma Japan株式会社 | イメージセンサ |
| JP2020004936A (ja) * | 2018-07-02 | 2020-01-09 | 株式会社デンソー | 半導体装置およびその製造方法 |
-
2021
- 2021-05-19 US US17/928,373 patent/US20230223403A1/en active Pending
- 2021-05-19 JP JP2022530087A patent/JP7731879B2/ja active Active
- 2021-05-19 DE DE112021002303.9T patent/DE112021002303B4/de active Active
- 2021-05-19 WO PCT/JP2021/018899 patent/WO2021251081A1/ja not_active Ceased
- 2021-05-19 CN CN202180041720.0A patent/CN115702500A/zh active Pending
Also Published As
| Publication number | Publication date |
|---|---|
| DE112021002303T5 (de) | 2023-03-16 |
| WO2021251081A1 (ja) | 2021-12-16 |
| US20230223403A1 (en) | 2023-07-13 |
| JPWO2021251081A1 (https=) | 2021-12-16 |
| DE112021002303B4 (de) | 2023-09-21 |
| JP7731879B2 (ja) | 2025-09-01 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination |