CN115207077A - 氮化镓高电子迁移率晶体管 - Google Patents

氮化镓高电子迁移率晶体管 Download PDF

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CN115207077A
CN115207077A CN202110601772.0A CN202110601772A CN115207077A CN 115207077 A CN115207077 A CN 115207077A CN 202110601772 A CN202110601772 A CN 202110601772A CN 115207077 A CN115207077 A CN 115207077A
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gallium nitride
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刘莒光
杨弘堃
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Excelliance Mos Corp
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Abstract

本发明提供一种氮化镓高电子迁移率晶体管，包括：基板、成核层、缓冲层、信道层、阻挡层、栅极、源极、漏极、以及第一p型氮化镓岛。成核层设置在基板上。缓冲层设置在成核层上。信道层设置在缓冲层上。阻挡层设置在信道层上。栅极设置在阻挡层上。源极设置在栅极的第一侧的阻挡层上。漏极设置在栅极的第二侧的阻挡层上。栅极的第二侧是相对于栅极的第一侧。多个第一p型氮化镓岛分别设置在漏极的第一侧与栅极的第二侧之间，其中所述多个第一p型氮化镓岛电位是浮动的。

Description

氮化镓高电子迁移率晶体管
技术领域
本发明涉及一种功率晶体管，尤其涉及一种氮化镓高电子迁移率晶体管(highelectron mobility transistor,HEMT)。
背景技术
氮化镓高电子迁移率晶体管是利用氮化铝镓(AlGaN)与氮化镓(GaN)的异质结构，在接面处会产生具有高平面电荷密度和高电子迁移率的二维电子气(two dimensionalelectron gas,2DEG)，因此适于高功率、高频率和高温度运作。然而，氮化镓高电子迁移率晶体管在瞬关的过程中，因表面缺陷容易使电子聚集在氮化铝镓阻挡层表面，对信道电子(2DEG)产生排斥，导致2DEG浓度下降并降低最大漏极电流，让晶体管的开关效能下降或是失效，进而使可靠性降低。
发明内容
本发明是针对一种氮化镓高电子迁移率晶体管，可以增加晶体管开关的可靠性。
根据本发明的实施例，一种氮化镓高电子迁移率晶体管包括：基板、成核层、缓冲层、信道层、阻挡层、栅极、源极、漏极以及第一p型氮化镓岛。成核层设置在基板上。缓冲层设置在成核层上。信道层设置在缓冲层上。阻挡层设置在信道层上。栅极设置在阻挡层上。源极设置在栅极的第一侧的阻挡层上。漏极设置在栅极的第二侧的阻挡层上。栅极的第二侧是相对于栅极的第一侧。多个第一p型氮化镓岛分别设置在漏极的第一侧与栅极的第二侧之间，其中多个第一p型氮化镓岛电位是浮动的。
在根据本发明的实施例的氮化镓高电子迁移率晶体管中，上述的各个第一p型氮化镓岛与栅极的间距大于各个第一p型氮化镓岛与漏极的间距。
在根据本发明的实施例的氮化镓高电子迁移率晶体管中，上述的漏极具有一延伸方向，且多个第一p型氮化镓岛沿延伸方向排列。
在根据本发明的实施例的氮化镓高电子迁移率晶体管中，上述沿延伸方向排列的同一行的第一p型氮化镓岛之间的间距是相同的。
在根据本发明的实施例的氮化镓高电子迁移率晶体管中，上述氮化镓高电子迁移率晶体管还可包括多个第二p型氮化镓岛，分别设置在漏极的第二侧的阻挡层上，漏极的第二侧是相对于漏极的第一侧，且所述多个第二p型氮化镓岛电位是浮动的。
在根据本发明的实施例的氮化镓高电子迁移率晶体管中，上述的栅极包括栅极金属层与介于阻挡层与栅极金属层之间的p型氮化镓层。
根据本发明的另一实施例，一种氮化镓高电子迁移率晶体管包括：基板、成核层、缓冲层、信道层、阻挡层、栅极、源极、至少一第一p型氮化镓岛、漏极以及介电层。成核层设置在基板上。缓冲层设置在成核层上。信道层设置在缓冲层上。阻挡层设置在信道层上。栅极设置在阻挡层上。源极设置在栅极的第一侧的阻挡层上。至少一第一p型氮化镓岛设置在栅极的第二侧的阻挡层上，其中栅极的第二侧是相对于栅极的第一侧。漏极设置在栅极的第二侧的阻挡层上并覆盖所述第一p型氮化镓岛。介电层介于漏极与第一p型氮化镓岛之间，以使第一p型氮化镓岛电位是浮动的。
在根据本发明的另一实施例的氮化镓高电子迁移率晶体管中，上述至少一第一p型氮化镓岛为多个第一p型氮化镓岛，且多个第一p型氮化镓岛沿漏极的延伸方向排列。
在根据本发明的另一实施例的氮化镓高电子迁移率晶体管中，上述介电层延伸设置在漏极与阻挡层之间，且介电层具有多个接触窗开口(contact opening)，以使漏极通过多个接触窗开口与阻挡层接触。
在根据本发明的另一实施例的氮化镓高电子迁移率晶体管中，上述栅极包括栅极金属层与介于阻挡层与栅极金属层之间的p型氮化镓层。
基于上述，本发明通过第一p型氮化镓岛的设置，可以产生如同浮动环(floatingring)的作用，能形成空穴以复合阻挡层130上的多余电子，避免二维电子气(2DEG)浓度受到影响，进而提供优异可靠性的氮化镓高电子迁移率晶体管。
为让本发明的上述特征和优点能更明显易懂，下文特举实施例，并配合附图作详细说明如下。
附图说明
图1是依照本发明的第一实施例的一种氮化镓高电子迁移率晶体管的上视示意图；
图2是图1的剖线A-A’的剖面示意图；
图3是依照本发明的第二实施例的一种氮化镓高电子迁移率晶体管的上视示意图；
图4是依照本发明的第三实施例的一种氮化镓高电子迁移率晶体管的上视示意图；
图5是依照本发明的第四实施例的一种氮化镓高电子迁移率晶体管的上视示意图；
图6是图5的剖线I-I’的剖面示意图；
图7是图5的剖线II-II’的剖面示意图；
图8是依照本发明的第五实施例的一种氮化镓高电子迁移率晶体管的上视示意图。
附图标记说明
10、20、30、40、50：氮化镓高电子迁移率晶体管
100、200：基板
105、205：成核层
110、210：缓冲层
120、220：信道层
130、230：阻挡层
140、240：栅极
140a、240a：栅极的第一侧
140b、240b：栅极的第二侧
142、242：栅极金属层
144、244：p型氮化镓层
150、250：源极
160、260：漏极
160a、260a：漏极的第一侧
160b、260b：漏极的第二侧
170、270：第一p型氮化镓岛
180：第二p型氮化镓岛
280：介电层
280a：接触窗开口
D1：第一p型氮化镓岛与栅极间距
D2：第一p型氮化镓岛与漏极间距
D3：第一p型氮化镓岛之间的间距
具体实施方式
现将详细地参考本发明的示范性实施例，示范性实施例的实例说明于附图中。只要有可能，相同元件符号在附图和描述中用来表示相同或相似部分。
图1是依照本发明的第一实施例的一种氮化镓高电子迁移率晶体管的上视示意图。图2是图1的剖线A-A’的剖面示意图。
首先，请同时参照图1与图2，氮化镓高电子迁移率晶体管10包括：基板100、成核层105、缓冲层110、信道层120、阻挡层130、栅极140、源极150、漏极160以及数个第一p型氮化镓岛170。成核层105设置在基板100上。缓冲层110设置在成核层105上。信道层120设置在缓冲层110上。阻挡层130设置在信道层120上。栅极140设置在阻挡层130上。源极150设置在栅极140的第一侧140a的阻挡层130上。漏极160设置在栅极140的第二侧140b的阻挡层130上。第一p型氮化镓岛170分别设置在漏极160的第一侧160a与栅极140的第二侧140b之间，其中数个第一p型氮化镓岛170电位是浮动的(floating)。漏极160具有延伸方向，且第一p型氮化镓岛170沿漏极160的延伸方向排列。
各个第一p型氮化镓岛170与栅极140有一间距D1，各个第一p型氮化镓岛170与漏极160有一间距D2，第一p型氮化镓岛170彼此之间在漏极160的延伸方向上也有一间距D3。第一p型氮化镓岛170的位置并没有特别限定，优选是靠近漏极160，也就是各个第一p型氮化镓岛170与栅极140的间距D1大于各个第一p型氮化镓岛170与漏极160的间距D2。漏极160的延伸方向排列的同一行的第一p型氮化镓岛170之间的间距D3并没有特别限定。
漏极160的第二侧160b是相对于漏极的第一侧160a，在漏极160的第二侧160b也可以设置多个第二p型氮化镓岛180，且第二p型氮化镓岛180电位是浮动的，如同第一p型氮化镓岛170的设置方式。
请继续参照图2，氮化镓高电子迁移率晶体管10的基板100可以包括蓝宝石(Sapphire)、碳化硅(SiC)、氧化锌(ZnO)、硅(Si)、氧化镓(Ga2O3)等材料；缓冲层110及信道层120的材料可以包括未掺杂的氮化镓(GaN)；而阻挡层130的材料可以包括未掺杂的氮化铝镓(AlxGa1-xN，x＝0.2～1)，但本发明不限于此。缓冲层110的配置可以解决基板100与信道层120之间若具有晶格不匹配的问题。
源极150与漏极160的材料可以使用适宜的金属材料，例如金、钛、氮化钛、铝或前述金属的合金等。栅极140可以包括栅极金属层142与介于阻挡层130与栅极金属层142之间的p型氮化镓层144，其中栅极金属层142的材料例如镍、铂、氮化钽、氮化钛、钨或前述金属的合金，栅极金属层142也可以是其他适宜的导电材料。p型氮化镓层144与第一p型氮化镓岛170的材料例如是掺杂有掺质的氮化镓，优选为掺杂镁的氮化镓，但本发明不限于此。第一p型氮化镓岛170并未与栅极140或漏极160电性相接，而是电性独立于栅极140或漏极160，因此可以形成如浮动环(floating ring)的效果，其中第一P型氮化镓岛170的电位介于栅极140与漏极160之间。在元件导通时，第一P型氮化镓岛170注入空穴至阻挡层130。
第一实施例的氮化镓高电子迁移率晶体管10的制作例如是在基板100上依序形成缓冲层110、信道层120以及阻挡层130后，在阻挡层130上同时形成p型氮化镓层144与第一p型氮化镓岛170，再形成源极150、栅极金属层142与漏极160。上述各层的形成方式例如是化学气相沉积法、物理气相沉积法或其他适当的形成方法，再搭配光刻蚀刻工艺制作出各个电极与图案。
本实施例的氮化镓高电子迁移率晶体管10因为漏极160与栅极140之间设置有第一p型氮化镓岛170，产生如同浮动环(floating ring)的作用，能形成空穴以复合阻挡层130上的多余电子，避免二维电子气(2DEG)浓度受到影响，进而提供优异可靠性的氮化镓高电子迁移率晶体管。
第二p型氮化镓岛180具有与第一p型氮化镓岛170相同的功能，当本实施例的漏极160的第二侧160b也设置有栅极(未示出)时，第二p型氮化镓岛180也可以复合氮化镓高电子迁移率晶体管10开关时出现在阻挡层130表面的多余电子，进而提供优异可靠性的氮化镓高电子迁移率晶体管。
图3是依照本发明的第二实施例的一种氮化镓高电子迁移率晶体管的上视示意图，其中使用与第一实施例相同的附图标记来表示相同或近似的构件，且相同或近似的构件内容也可参照第一实施例的相关说明，不再赘述。
请参照图3，氮化镓高电子迁移率晶体管20在漏极160的延伸方向上设置四个第一p型氮化镓岛170，使彼此间的间距D3比第一实施例的间距要小，且两两第一p型氮化镓岛170的间距D3可为相同，也可为不同，优选为设置相同的间距D3，进而增加复合阻挡层130表面多余电子的能力。
图4是依照本发明的第三实施例的一种氮化镓高电子迁移率晶体管的上视示意图，其中使用与第一实施例相同的附图标记来表示相同或近似的构件，且相同或近似的构件内容也可参照第一实施例的相关说明，不再赘述。
请参照图4，本实施例与第一实施例的差异在于漏极160的第一侧160a与栅极140的第二侧140b之间有两行的第一p型氮化镓岛170，其中间距D1是指第一p型氮化镓岛170与栅极140最接近的距离，所以本实施例的第一p型氮化镓岛170与栅极140的间距D1比第一实施例的间距要小，第一p型氮化镓岛170之间的间距D3也比第一实施例的间距要小，进而使复合阻挡层130表面多余电子的能力增强。其中多个第一p型氮化镓岛170的间距D3可为相同，也可为不同，优选为设置相同间距D3。
图5是依照本发明的第四实施例的一种氮化镓高电子迁移率晶体管的上视示意图，图6是图5的剖线I-I’的剖面示意图，图7是图5的剖线II-II’的剖面示意图。
请同时参照图5至图7，氮化镓高电子迁移率晶体管40包括：基板200、成核层205、缓冲层210、信道层220、阻挡层230、栅极240、源极250、漏极260、第一p型氮化镓岛270以及介电层280。成核层205设置在基板200上。缓冲层210设置在成核层205上。信道层220设置在缓冲层210上。阻挡层230设置在信道层220上。栅极240设置在阻挡层230上。源极250设置在栅极240的第一侧240a的阻挡层230上。第一p型氮化镓岛270设置在栅极240的第二侧240b的阻挡层230上，其中栅极240的第二侧240b是相对于栅极240的第一侧240a。也就是说，第一p型氮化镓岛270是设置在漏极260的第一侧260a与第二侧260b之间。第一p型氮化镓岛270的数目并没有特别限定，可以为单一个或多个，且第一p型氮化镓岛270沿漏极260的延伸方向排列。漏极260设置在栅极240的第二侧240b的阻挡层230上并覆盖第一p型氮化镓岛270。
介电层280则介于漏极260与第一p型氮化镓岛270之间，以使第一p型氮化镓岛270电位是浮动的，其中介电层280可延伸设置在漏极260与阻挡层230之间，且介电层280具有多个接触窗开口280a，以使漏极260通过接触窗开口280a与阻挡层230接触。介电层280的材料并没有特别限定，可使用一般常用的介电材料。第一p型氮化镓岛270并未与栅极240或漏极260电性相接，而是电性独立于栅极240或漏极260，因此浮动的第一p型氮化镓岛270会产生如同浮动环(floating ring)的作用，能形成空穴以复合阻挡层230上的多余电子，避免二维电子气(2DEG)浓度受到影响，进而提供优异可靠性的氮化镓高电子迁移率晶体管。
第四实施例的氮化镓高电子迁移率晶体管40的制作例如是在基板200上依序形成成核层205、缓冲层210、信道层220以及阻挡层230后，在阻挡层230上同时形成p型氮化镓层244与第一p型氮化镓岛270，然后沉积一层介电层280覆盖上述结构与膜层。接着，利用光刻蚀刻等工艺，在预定形成栅极、源极与漏极的位置的介电层280内形成多个接触窗口280a，再于接触窗口280a内填满金属或合金，以形成源极250、栅极金属层242与漏极260与第一p型氮化镓岛270。关于基板200、缓冲层210、信道层220、阻挡层230、栅极240、源极250、第一p型氮化镓岛270与漏极260的材料与形成方式类似上述的第一实施例，于此不再赘述。介电层280的形成方式例如是化学气相沉积法或旋涂技术等方法。
图8是依照本发明的第五实施例的一种氮化镓高电子迁移率晶体管的上视示意图，其中使用与第四实施例相同的附图标记来表示相同或近似的构件，且相同或近似的构件内容也可参照第四实施例的相关说明，不再赘述。
请参照图8，本实施例与第四实施例的差异在于第一p型氮化镓岛270的数量增加，进而产生如同浮动环的作用，能复合氮化镓高电子迁移率晶体管50表面的多余电子，避免二维电子气浓度受到影响，进而提供优异可靠性的氮化镓高电子迁移率晶体管50。
综上所述，本发明通过设置在栅极与漏极之间的p型氮化镓岛或者设置在漏极下方的p型氮化镓岛，复合氮化镓高电子迁移率晶体管表面的多余电子，以避免二维电子气(2DEG)浓度受到影响，进而改善氮化镓高电子迁移率晶体管的可靠性。
最后应说明的是：以上各实施例仅用以说明本发明的技术方案，而非对其限制；尽管参照前述各实施例对本发明进行了详细的说明，本领域的普通技术人员应当理解：其依然可以对前述各实施例所记载的技术方案进行修改，或者对其中部分或者全部技术特征进行等同替换；而这些修改或者替换，并不使相应技术方案的本质脱离本发明各实施例技术方案的范围。

Claims (10)

1.一种氮化镓高电子迁移率晶体管，其特征在于，包括：
基板；
成核层，设置在所述基板上；
缓冲层，设置在所述成核层上；
信道层，设置在所述缓冲层上；
阻挡层，设置在所述信道层上；
栅极，设置在所述阻挡层上；
源极，设置在所述栅极的第一侧的所述阻挡层上；
漏极，设置在所述栅极的第二侧的所述阻挡层上，所述栅极的所述第二侧是相对于所述栅极的所述第一侧；以及
多数个第一p型氮化镓岛，分别设置在所述漏极的第一侧与所述栅极的所述第二侧之间，其中所述多数个第一p型氮化镓岛电位是浮动的。
2.根据权利要求1所述的氮化镓高电子迁移率晶体管，其特征在于，各个所述第一p型氮化镓岛与所述栅极的间距大于各个所述第一p型氮化镓岛与所述漏极的间距。
3.根据权利要求1所述的氮化镓高电子迁移率晶体管，其特征在于，所述漏极具有一延伸方向，且所述多数个第一p型氮化镓岛沿所述延伸方向排列。
4.根据权利要求3所述的氮化镓高电子迁移率晶体管，其特征在于，沿所述延伸方向排列的同一行的所述第一p型氮化镓岛之间的间距是相同的。
5.根据权利要求1所述的氮化镓高电子迁移率晶体管，其特征在于，还包括多数个第二p型氮化镓岛，分别设置在所述漏极的第二侧的所述阻挡层上，所述漏极的所述第二侧是相对于所述漏极的所述第一侧，且所述多数个第二p型氮化镓岛电位是浮动的。
6.根据权利要求1所述的氮化镓高电子迁移率晶体管，其特征在于，所述栅极包括栅极金属层与介于所述阻挡层与所述栅极金属层之间的p型氮化镓层。
7.一种氮化镓高电子迁移率晶体管，其特征在于，包括：
基板；
成核层，设置在所述基板上；
缓冲层，设置在所述成核层上；
信道层，设置在所述缓冲层上；
阻挡层，设置在所述信道层上；
栅极，设置在所述阻挡层上；
源极，设置在所述栅极的第一侧的所述阻挡层上；
至少一第一p型氮化镓岛，设置在所述栅极的第二侧的所述阻挡层上，其中所述栅极的所述第二侧是相对于所述栅极的所述第一侧；
漏极，设置在所述栅极的所述第二侧的所述阻挡层上并覆盖所述至少一第一p型氮化镓岛；以及
介电层，介于所述漏极与所述至少一第一p型氮化镓岛之间，以使所述至少一第一p型氮化镓岛电位是浮动的。
8.根据权利要求7所述的氮化镓高电子迁移率晶体管，其特征在于，所述至少一第一p型氮化镓岛为多数个第一p型氮化镓岛，且所述多数个第一p型氮化镓岛沿所述漏极的延伸方向排列。
9.根据权利要求7所述的氮化镓高电子迁移率晶体管，其特征在于，所述介电层延伸设置在所述漏极与所述阻挡层之间，且所述介电层具有多数个接触窗开口，以使所述漏极通过所述多数个接触窗开口与所述阻挡层接触。
10.根据权利要求7所述的氮化镓高电子迁移率晶体管，其特征在于，所述介电层延伸设置在所述漏极与所述阻挡层之间，且所述介电层具有多数个接触窗开口，以使所述漏极通过所述多数个接触窗开口与所述阻挡层接触。
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