CN1146974C - 制造多层陶瓷基片的方法 - Google Patents
制造多层陶瓷基片的方法 Download PDFInfo
- Publication number
- CN1146974C CN1146974C CNB998019275A CN99801927A CN1146974C CN 1146974 C CN1146974 C CN 1146974C CN B998019275 A CNB998019275 A CN B998019275A CN 99801927 A CN99801927 A CN 99801927A CN 1146974 C CN1146974 C CN 1146974C
- Authority
- CN
- China
- Prior art keywords
- cavity
- greenwood
- sheet
- sintering
- ceramic substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 239000000758 substrate Substances 0.000 title claims abstract description 36
- 239000000919 ceramic Substances 0.000 title claims abstract description 23
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 20
- 238000005245 sintering Methods 0.000 claims abstract description 56
- 238000000034 method Methods 0.000 claims abstract description 36
- 238000003475 lamination Methods 0.000 claims description 10
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 claims description 5
- 230000015572 biosynthetic process Effects 0.000 claims description 5
- 238000003825 pressing Methods 0.000 claims description 4
- 229910052799 carbon Inorganic materials 0.000 claims description 3
- 238000007639 printing Methods 0.000 claims description 3
- 239000002562 thickening agent Substances 0.000 claims description 3
- 239000010439 graphite Substances 0.000 claims description 2
- 229910002804 graphite Inorganic materials 0.000 claims description 2
- 238000010030 laminating Methods 0.000 abstract 1
- 239000010410 layer Substances 0.000 description 23
- 238000004242 micellar liquid chromatography Methods 0.000 description 16
- 239000002131 composite material Substances 0.000 description 12
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 11
- 239000000463 material Substances 0.000 description 11
- 239000002245 particle Substances 0.000 description 6
- 239000000843 powder Substances 0.000 description 6
- 239000002904 solvent Substances 0.000 description 6
- 239000002002 slurry Substances 0.000 description 5
- ZWEHNKRNPOVVGH-UHFFFAOYSA-N 2-Butanone Chemical compound CCC(C)=O ZWEHNKRNPOVVGH-UHFFFAOYSA-N 0.000 description 4
- 238000007796 conventional method Methods 0.000 description 4
- 238000005520 cutting process Methods 0.000 description 4
- 229920005989 resin Polymers 0.000 description 4
- 239000011347 resin Substances 0.000 description 4
- 238000007650 screen-printing Methods 0.000 description 4
- YXFVVABEGXRONW-UHFFFAOYSA-N Toluene Chemical compound CC1=CC=CC=C1 YXFVVABEGXRONW-UHFFFAOYSA-N 0.000 description 3
- 239000000853 adhesive Substances 0.000 description 3
- 230000001070 adhesive effect Effects 0.000 description 3
- DOIRQSBPFJWKBE-UHFFFAOYSA-N dibutyl phthalate Chemical compound CCCCOC(=O)C1=CC=CC=C1C(=O)OCCCC DOIRQSBPFJWKBE-UHFFFAOYSA-N 0.000 description 3
- 239000000203 mixture Substances 0.000 description 3
- 239000004014 plasticizer Substances 0.000 description 3
- 239000001856 Ethyl cellulose Substances 0.000 description 2
- ZZSNKZQZMQGXPY-UHFFFAOYSA-N Ethyl cellulose Chemical compound CCOCC1OC(OC)C(OCC)C(OCC)C1OC1C(O)C(O)C(OC)C(CO)O1 ZZSNKZQZMQGXPY-UHFFFAOYSA-N 0.000 description 2
- VVQNEPGJFQJSBK-UHFFFAOYSA-N Methyl methacrylate Chemical compound COC(=O)C(C)=C VVQNEPGJFQJSBK-UHFFFAOYSA-N 0.000 description 2
- 229920005372 Plexiglas® Polymers 0.000 description 2
- WUOACPNHFRMFPN-UHFFFAOYSA-N alpha-terpineol Chemical compound CC1=CCC(C(C)(C)O)CC1 WUOACPNHFRMFPN-UHFFFAOYSA-N 0.000 description 2
- 229910010293 ceramic material Inorganic materials 0.000 description 2
- SQIFACVGCPWBQZ-UHFFFAOYSA-N delta-terpineol Natural products CC(C)(O)C1CCC(=C)CC1 SQIFACVGCPWBQZ-UHFFFAOYSA-N 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 229920001249 ethyl cellulose Polymers 0.000 description 2
- 235000019325 ethyl cellulose Nutrition 0.000 description 2
- 230000008020 evaporation Effects 0.000 description 2
- 238000001704 evaporation Methods 0.000 description 2
- 239000011521 glass Substances 0.000 description 2
- 238000007731 hot pressing Methods 0.000 description 2
- 238000003698 laser cutting Methods 0.000 description 2
- 239000007788 liquid Substances 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 239000011812 mixed powder Substances 0.000 description 2
- 229920005644 polyethylene terephthalate glycol copolymer Polymers 0.000 description 2
- 238000004080 punching Methods 0.000 description 2
- 229940116411 terpineol Drugs 0.000 description 2
- ZNQVEEAIQZEUHB-UHFFFAOYSA-N 2-ethoxyethanol Chemical compound CCOCCO ZNQVEEAIQZEUHB-UHFFFAOYSA-N 0.000 description 1
- IMROMDMJAWUWLK-UHFFFAOYSA-N Ethenol Chemical compound OC=C IMROMDMJAWUWLK-UHFFFAOYSA-N 0.000 description 1
- 241000446313 Lamella Species 0.000 description 1
- 229910019142 PO4 Inorganic materials 0.000 description 1
- -1 Phthalic acid ester Chemical class 0.000 description 1
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 230000008602 contraction Effects 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 208000002925 dental caries Diseases 0.000 description 1
- 239000006185 dispersion Substances 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 238000007641 inkjet printing Methods 0.000 description 1
- 238000009434 installation Methods 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 238000004898 kneading Methods 0.000 description 1
- 150000001247 metal acetylides Chemical class 0.000 description 1
- 230000007935 neutral effect Effects 0.000 description 1
- 150000004767 nitrides Chemical class 0.000 description 1
- XNGIFLGASWRNHJ-UHFFFAOYSA-N o-dicarboxybenzene Natural products OC(=O)C1=CC=CC=C1C(O)=O XNGIFLGASWRNHJ-UHFFFAOYSA-N 0.000 description 1
- 238000003909 pattern recognition Methods 0.000 description 1
- 239000010452 phosphate Substances 0.000 description 1
- NBIIXXVUZAFLBC-UHFFFAOYSA-K phosphate Chemical compound [O-]P([O-])([O-])=O NBIIXXVUZAFLBC-UHFFFAOYSA-K 0.000 description 1
- 229920002037 poly(vinyl butyral) polymer Polymers 0.000 description 1
- 229920002451 polyvinyl alcohol Polymers 0.000 description 1
- 238000002360 preparation method Methods 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000002356 single layer Substances 0.000 description 1
- 238000005507 spraying Methods 0.000 description 1
- 238000010345 tape casting Methods 0.000 description 1
- 238000010023 transfer printing Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4803—Insulating or insulated parts, e.g. mountings, containers, diamond heatsinks
- H01L21/481—Insulating layers on insulating parts, with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4803—Insulating or insulated parts, e.g. mountings, containers, diamond heatsinks
- H01L21/4807—Ceramic parts
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1515—Shape
- H01L2924/15153—Shape the die mounting substrate comprising a recess for hosting the device
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1517—Multilayer substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/156—Material
- H01L2924/15786—Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
- H01L2924/15787—Ceramics, e.g. crystalline carbides, nitrides or oxides
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T156/00—Adhesive bonding and miscellaneous chemical manufacture
- Y10T156/10—Methods of surface bonding and/or assembly therefor
- Y10T156/1052—Methods of surface bonding and/or assembly therefor with cutting, punching, tearing or severing
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T156/00—Adhesive bonding and miscellaneous chemical manufacture
- Y10T156/10—Methods of surface bonding and/or assembly therefor
- Y10T156/1052—Methods of surface bonding and/or assembly therefor with cutting, punching, tearing or severing
- Y10T156/1056—Perforating lamina
- Y10T156/1057—Subsequent to assembly of laminae
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49155—Manufacturing circuit on or in base
- Y10T29/49163—Manufacturing circuit on or in base with sintering of base
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Ceramic Engineering (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
一种制造多层陶瓷基片的方法,该方法无需用于形成空腔的模和对准生材片。该方法包括以下步骤:提供多块其中具有预制通孔和布线图案的生材片;在要成为空腔底部的区域上形成一层防止相邻生材片烧结的层;层压并烧结生材片,形成多层烧结体;沿空腔内壁形成切痕直至空腔底部,除去内部的烧结部分,留下形成的空腔。该方法无需昂贵的模,由此提供了一种简单、稳定且便宜的制造多层陶瓷基片的方法。
Description
技术领域
本发明涉及制造具有空腔的多层陶瓷基片(如内部埋有孔的集成电路芯片)的方法。
背景技术
多层陶瓷基片(下文称作MLCs)被广泛用于许多电子器件,这些电子器件要求越来越小的尺寸和越来越高的性能。MLCs是通过将多层具有预制通孔和布线图案的生材片(green sheet)层压形成一层压体,然后烧结该层压体而制得。
通过将集成电路芯片(如倒装晶片)埋入基片中形成的空腔内能使MLCs变得更薄。根据安装要求,基片中可以具有盲孔和通孔。
用常规方法在MLCs中形成空腔时,先用压模在欲形成空腔的那部分生坯片上冲孔,以形成所需孔。因此,空腔的规格每次变化,都必需重新制造压模,这就提高了模的成本。此外,在要形成穿过多于一块生材片的空腔时,每块生材片中的孔必需在层压之前对准。为此需要制备一个不同的用于对准的模,以精确对准各孔的位置。这就提高了制造成本,并增加了制造步骤。
此外,即便使用这种模具,也不能高精度地确定孔的位置,这使得常规方法难以应用于当前的高密度布线工艺。换句话说,常规技术正被当前非常精细布线图案的发展趋势所淘汰。
另一方面,由于常规MLCs的尺寸会由于烧结过程中发生的收缩而改变,为了确保尺寸精度,正越来越普遍地使用不收缩的陶瓷基片。为了在不收缩的陶瓷基片中形成空腔,必需用在基片烧结温度不会烧结的材料将生材片层压体夹在中间。空腔的底部也需要覆盖有在基片烧结温度不会烧结的材料。然而,没有一种简单的方法能够将不烧结的材料精确地施放在空腔底部,这使得难以在不收缩的陶瓷基片中形成空腔。
本发明的目的是提供一种制造MLCs的方法,该方法无需昂贵的模和孔对准工艺。
发明内容
在本发明中,对MLCs中将会成为空腔底部的那部分生材片进行防烧结工艺,以防相邻生材片烧结。然后,切削空腔内壁直至空腔底部,除去空腔的内部烧结部分。这有助于形成空腔。因此,即使空腔穿过数层生材片,本发明也能够迅速地产生空腔,且无需使用昂贵的模。
更具体而言,制造本发明MLCs的方法包括以下步骤。
i)将多块具有预制通孔和布线图案的生材片层压形成层压体;
ii)对该层压体进行烧结,产生多层烧结体,其中层压体包含其中有空腔的生材片,在要成为空腔底部的区域的相邻两片生材片之间施用防烧结材料;
iii)切削空腔内壁直至空腔底部,然后除去烧结部分,留下空腔。
本发明提供了一种制造多层陶瓷基片的方法,它包括:
提供多块生材片,在一块或多块所述生材片上形成通孔和布线图案中的至少一种;
在一块或多块所述生材片要形成空腔的区域上形成一层防烧结层,所述防烧结层形成在将成为空腔底部的区域上;
对上面有通孔和/或布线图案和防烧结层的所述生材片进行层压和烧结,形成多层烧结陶瓷基片;
在至少一层烧结基片上相应于所述防烧结层区域的预定区域周围形成切痕,除去所述切痕包围的所述基片部分,由此在所述基片中留下空腔。
附图说明
图1是按照本发明一个实施方案在生材片中形成通孔的步骤的透视图。
图2A是按照本发明的实施方案向层压和烧结生材片得到的多层烧结体施用激光束的剖面图。
图2B是按照本发明的实施方案在多层烧结体中产生空腔的剖面图。
图3A-3B是按照本发明的实施方案形成另一种空腔的剖面图。
具体实施方式
接着按制造步骤依次说明本发明的一个实施方案。
在第一步中,制造绝缘的生材片(下文称作生材片)。
本发明所用的生材片可以用常规方法制得。例如,可使用能够在1,000℃或更低的温度烧结的低温烧结陶瓷材料。
例如,可使用这样一种浆料,它由含45-60%(重量)平均粒度为0.5-1.5微米的玻璃粉末(如CaO-Al2O3-SiO2-B2O3组合物)和55-40%(重量)平均粒度为1.0-2.0微米的氧化铝粉末的混合粉末,以及载体(含有粘合剂、增塑剂和溶剂)捏和制得。
多种溶剂可溶性树脂(如纤维素树脂、聚乙烯醇缩丁醛树脂、聚甲基丙烯酸甲酯树脂)中的任一种或水溶性聚乙烯醇树脂可用作粘合剂。
邻苯二甲酸酯(如邻苯二甲酸二丁酯)、磷酸酯或其它通用增塑剂可用作增塑剂。
能快速蒸发的溶剂(如甲苯和甲基乙基酮)和缓慢蒸发的溶剂(如溶纤剂及其衍生物、卡必醇及其衍生物或苯甲醇)可用作溶剂。根据生材片的制造条件选择溶剂。
如上制得的浆液通常用刮涂法形成片材,然后干燥该片材得到厚0.1-0.3mm的生材片。
在第二步中,在生材片上形成通孔和布线图案。本发明的一个重要特征是在该步骤中对生材片的一些部分进行防烧结处理。形成通孔和布线图案,用连续印刷法在该生材片上施涂防烧结材料。
其它方法包括在将生材片切割成约100-250mm×约100-250mm的片之后印刷布线图案。在连续印刷的情况下,在形成图案之后切割生材片。还可以通过转印、喷墨印刷和喷涂来形成图案。
在第三步中,如常规MLCs制造方法那样,在生材片上形成内部电路、层合、加压、于高温(如880-950℃)烧结一小段时间(如5-15分钟),得到多层烧结体。然后,在该多层烧结体中形成空腔,通常用激光束来完成具有空腔的MLCs的制造。上述第二步和第三步的详细情况如下说明。
第二步是如常规制造方法那样在生材片中形成通孔。例如,使用冲模或冲孔机冲出通孔,然后将这些冲出的通孔填满用于填隙通孔(interstitial via holes)的导电糊膏。
接着,按照常规方法将布线用导电糊膏丝网印刷在基片的内层生材片或表面层生材片上,形成布线图案。
在本发明中,进一步在将成为空腔底部的区域上印刷防烧结糊,以防烧结。于此,如果每层中的空腔具有相同的形状,防烧结糊只需印刷在底部的空腔层上。如果空腔具有阶梯状结构使得一层比一层逐渐变小,或者一组层比一组层逐渐变小,如图3所示,防烧结糊还是印刷在为上层具有较大孔尺寸的一个或多个空腔提供底部的生材片层的表面上。这是因为空腔是通过除去一部分上层而逐步形成的。
主要由Ag、Cu和Au组成的糊膏可用作内层和表面层上布线图案用导电糊膏,以及填隙通孔用导电糊膏。因为该导电糊膏在低于1000℃的温度下烧结,它可以与上述陶瓷生材片一同烧结。
上述防烧结处理是对生材片上要成为空腔底部的位置进行的。只要能够防止相邻生材片的烧结,可以使用任何可行的方法进行防烧结处理,而不限于印刷防烧结糊。然而,一般来说,最方便且较好的是使用防烧结糊印刷法,它是将含有分散的陶瓷材料(其烧结温度高于生材片的烧结温度,如900℃)的糊状物施用到生材片上。
用于所述防烧结陶瓷糊的陶瓷的一个例子是Al2O3(氧化铝)。除氧化铝之外,还可使用具有高熔点的陶瓷,包括金属碳化物,如SiC、B4C和TiC,金属氮化物,如Si3N4、BN和TiN。
此外,如果生材片在中性气氛或还原气氛下烧结,可使用碳材料,如碳或石墨。防烧结糊可以用与制备用于生材片的浆料相同的方法进行制备。由于防烧结糊组分的烧结温度高于生材片的烧结温度,因此涂有该防烧结糊的相邻生材片区域不会烧结。
因此,可以在第三步中除去烧结体的内部而形成空腔,因为相邻的生材片未被烧结。
在第三步中,将多块生材片层压,并烧结形成多层基片。
首先,将多块生材片层合,热压层合体使之形成一整块生材片。用来制造层压体的热压条件无需精确地限定,但较好是温度约为60-120℃,压力约为50-300千克/厘米2。然后,于高温烧结该层压体,得到多层烧结体。
本发明的一个特征是在该多层烧结体中形成空腔。
关于形成空腔的方法,只要能够切削空腔内壁直至空腔底部并将空腔内的烧结体取出即可,对于所用方法并无特别限制。
有用的切割方法包括穿孔(perforation)、用模开槽、激光切削,以及使用日本专利公报No.H7-7269中揭示的压板(press plate)。最好的方法是激光切削法。
欲形成的空腔可以具有单层结构或多层结构。如图3所示,在多阶梯结构中,如果在下面数层空腔直径变小,先除去上层空腔内的那部分层而在上层中形成空腔,然后除去下层空腔部分的那部分层。
现参考图1-3详细说明本发明的实施方案。
将12重量份(下文称为“份”)聚甲基丙烯酸甲酯树脂、5份邻苯二甲酸二丁酯和50份甲基乙基酮加入含45份平均粒度为1.0微米的CaO-Al2O3-SiO2-B2O3玻璃粉末和55%(重量)平均粒度为1.5微米的氧化铝粉末的100份混合粉末中,捏合该混合物,得到浆液。用刮刀将该浆液施涂在聚对苯二甲酸乙二醇酯(PET)膜上,然后干燥形成0.2mm厚的生材片。
对10份10%乙基纤维素的萜品醇溶液和90份平均粒度为6微米的Ag粉末进行混合和捏合,制得用于布线和填隙通孔的导电糊膏。
混合10份10%乙基纤维素的萜品醇溶液和90份平均粒度为1.5微米的氧化铝粉末,制得防烧结糊。
使用直径为0.2mm的冲模,对生材片11a和11b上的预定位置(如图1所示)冲孔,形成通孔12。然后,通过丝网印刷将这些通孔12填满通孔用导电糊膏13。为了使导电糊膏13更完全地填满通孔12,可以从底部进行抽吸。
如图1所示,将用于布线14的导电糊膏丝网印刷在生材片11c的预定区域上。
如图1所示,将防烧结糊15丝网印刷在生材片11b的预定位置上。
小心不使生材片11a至11d错位,将这些生材片进行层压,如图2所示。通过层压,相邻生材片上的糊料13成为一整体。为了防止各层压层之间错位,较好的是通过图案识别(pattern recognition)或销定位(pin aligning)进行对准。在此实施方案中,生材片11a至11d包含不收缩的陶瓷材料。因此,将氧化铝片材放在生材片层压体A的顶部和底部以防基片收缩。生材片于100℃和100千克/厘米2进行层压。最后,得到层压体。
将层压体在400℃的温度下烧2小时以烧掉其中的粘合剂,然后,将层压体于900℃烧结10分钟,得到多层烧结体。在图2A和2B中,烧结层21a至21d对应于生材片11a至11d。用液体研磨机除去多层烧结体顶部和底部的未烧结的氧化铝片16。
用激光束照射多层烧结体的表面,如图2A中箭头所示,在烧结层21a中形成图2A中虚线所示的空腔。然后,如图2B所示,通过除去烧结部分17在多层烧结体中形成空腔18。由于在多层烧结体A′中要成为空腔18底部区域的烧结层21a和21b之间施涂了具有高烧结温度的防烧结糊15,因此能容易地除去烧结部分17。用液体研磨机除去在空腔18底部上留下的防烧结材料。
使用上述步骤,容易地制得具有空腔的MLCs。
此外,可用相同的步骤制造具有阶梯状空腔的MLCs,如图3所示。在这种情况下,在基片烧结之后,先形成最高层中的空腔18。再用激光束切削空腔19的内壁,然后形成第二阶梯空腔19。通过在空腔18底部形成导电性布线,IC芯片可面朝下地安装在上面。还可以将比通常MLCs具有更精细布线图案的陶瓷基片埋入空腔区内,进行电连接,进一步增加整个基片的布线密度。
通过使用本发明MLCs的制造方法,无需用昂贵的模在MLCs中形成空腔。此外,即使空腔穿过多层生材片或具有阶梯状结构,也可容易地形成。因此,本发明提供了一种简单、可靠且便宜的方法来制造MLCs。
Claims (7)
1.一种制造多层陶瓷基片的方法,它包括:
提供多块生材片,在一块或多块所述生材片上形成通孔和布线图案中的至少一种;
在一块或多块所述生材片要形成空腔的区域上形成一层防烧结层,所述防烧结层形成在将成为空腔底部的区域上;
对上面有通孔和/或布线图案和防烧结层的所述生材片进行层压和烧结,形成多层烧结陶瓷基片;
在至少一层烧结基片上相应于所述防烧结层区域的预定区域周围形成切痕,除去所述切痕包围的所述基片部分,由此在所述基片中留下空腔。
2.如权利要求1所述的制造多层陶瓷基片的方法,其特征在于多于一次地进行所述形成切痕和除去所述切痕包围的基片部分的步骤。
3.如权利要求1所述的制造多层陶瓷基片的方法,其特征在于用激光束形成所述切痕。
4.如权利要求1所述的制造多层陶瓷基片的方法,其特征在于所述切痕是由选自下列方法的一种方法形成的:
穿孔;
用模开槽;
压板加压。
5.如权利要求1所述的制造多层陶瓷基片的方法,其特征在于所述形成一层防烧结层的步骤包括印刷或施涂一种糊料,所述糊料含有其烧结温度高于生材片的烧结温度的陶瓷。
6.如权利要求1所述的制造多层陶瓷基片的方法,其特征在于所述形成一层防烧结层的步骤包括施涂碳糊或石墨糊。
7.如权利要求1所述的制造多层陶瓷基片的方法,其特征在于所述空腔中具有阶梯。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP31252898A JP3547327B2 (ja) | 1998-11-02 | 1998-11-02 | セラミック多層基板の製造方法 |
JP312528/1998 | 1998-11-02 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN1287686A CN1287686A (zh) | 2001-03-14 |
CN1146974C true CN1146974C (zh) | 2004-04-21 |
Family
ID=18030321
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CNB998019275A Expired - Fee Related CN1146974C (zh) | 1998-11-02 | 1999-11-01 | 制造多层陶瓷基片的方法 |
Country Status (9)
Country | Link |
---|---|
US (1) | US6350334B1 (zh) |
EP (1) | EP1042803B1 (zh) |
JP (1) | JP3547327B2 (zh) |
KR (1) | KR100521941B1 (zh) |
CN (1) | CN1146974C (zh) |
AT (1) | ATE504080T1 (zh) |
DE (1) | DE69943313D1 (zh) |
TW (1) | TWI232076B (zh) |
WO (1) | WO2000026957A1 (zh) |
Families Citing this family (22)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3656484B2 (ja) * | 1999-03-03 | 2005-06-08 | 株式会社村田製作所 | セラミック多層基板の製造方法 |
WO2001007247A1 (en) * | 1999-07-27 | 2001-02-01 | North Carolina State University | Patterned release film between two laminated surfaces |
JP3511982B2 (ja) * | 2000-06-14 | 2004-03-29 | 株式会社村田製作所 | 多層配線基板の製造方法 |
US7506438B1 (en) * | 2000-11-14 | 2009-03-24 | Freescale Semiconductor, Inc. | Low profile integrated module interconnects and method of fabrication |
US6917461B2 (en) * | 2000-12-29 | 2005-07-12 | Texas Instruments Incorporated | Laminated package |
JP2003031948A (ja) * | 2001-07-12 | 2003-01-31 | Matsushita Electric Ind Co Ltd | セラミック多層基板の製造方法 |
US6835260B2 (en) * | 2002-10-04 | 2004-12-28 | International Business Machines Corporation | Method to produce pedestal features in constrained sintered substrates |
US7332805B2 (en) * | 2004-01-06 | 2008-02-19 | International Business Machines Corporation | Electronic package with improved current carrying capability and method of forming the same |
KR100849455B1 (ko) * | 2005-04-19 | 2008-07-30 | 티디케이가부시기가이샤 | 다층 세라믹 기판 및 그 제조 방법 |
JP4867276B2 (ja) * | 2005-10-14 | 2012-02-01 | 株式会社村田製作所 | セラミック基板の製造方法 |
KR100659510B1 (ko) * | 2006-02-16 | 2006-12-20 | 삼성전기주식회사 | 캐비티가 형성된 기판 제조 방법 |
US7638988B2 (en) * | 2006-02-21 | 2009-12-29 | Virginia Tech Intellectual Properties, Inc. | Co-fired ceramic inductors with variable inductance, and voltage regulator having same |
KR100898977B1 (ko) * | 2007-11-07 | 2009-05-25 | 삼성전기주식회사 | 인쇄회로기판 제조방법 |
KR101004942B1 (ko) * | 2008-08-29 | 2010-12-28 | 삼성전기주식회사 | 다층 세라믹 기판 제조방법 |
KR101046006B1 (ko) * | 2008-10-23 | 2011-07-01 | 삼성전기주식회사 | 무수축 다층 세라믹 기판의 제조방법 |
FR2944646B1 (fr) | 2009-04-21 | 2012-03-23 | Commissariat Energie Atomique | Procede de realisation d'une cavite dans l'epaisseur d'un substrat pouvant former un site d'accueil de composant |
AT13229U1 (de) * | 2011-12-05 | 2013-08-15 | Austria Tech & System Tech | Verfahren zum herstellen einer leiterplatte unter entfernung eines teilbereichs derselben sowie verwendung eines derartigen verfahrens |
CN102838354B (zh) * | 2012-09-11 | 2013-10-02 | 中国兵器工业集团第二一四研究所苏州研发中心 | 一种具有内置空腔的多层陶瓷元件的工艺加工方法 |
CN103077912B (zh) * | 2013-01-15 | 2015-04-15 | 宜兴市环洲微电子有限公司 | 一种多芯片烧结用石墨模具 |
EP3361841B1 (en) * | 2015-10-09 | 2020-07-01 | Hitachi Metals, Ltd. | Method for manufacturing multilayer ceramic substrate |
CN108012404A (zh) * | 2017-11-29 | 2018-05-08 | 生益电子股份有限公司 | 一种设有台阶槽的pcb |
DE102020205043B4 (de) * | 2020-04-21 | 2024-07-04 | Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung eingetragener Verein | Verfahren zur Herstellung einer Leistungshalbleiterbauelementanordnung oder Leistungshalbleiterbauelementeinhausung |
Family Cites Families (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5250130A (en) * | 1988-01-27 | 1993-10-05 | W. R. Grace & Co.-Conn. | Replica hot pressing technique |
US5176771A (en) * | 1991-12-23 | 1993-01-05 | Hughes Aircraft Company | Multilayer ceramic tape substrate having cavities formed in the upper layer thereof and method of fabricating the same by printing and delamination |
DE4392791T1 (de) * | 1992-06-12 | 1995-06-01 | Aluminum Co Of America | Verfahren zur Herstellung mehrlagiger Strukturen mit nichtebenen Oberflächen |
JP3225666B2 (ja) * | 1993-01-27 | 2001-11-05 | 株式会社村田製作所 | キャビティ付きセラミック多層ブロックの製造方法 |
US5478420A (en) | 1994-07-28 | 1995-12-26 | International Business Machines Corporation | Process for forming open-centered multilayer ceramic substrates |
US5538582A (en) * | 1994-09-14 | 1996-07-23 | International Business Machines Corporation | Method for forming cavities without using an insert |
US5601673A (en) * | 1995-01-03 | 1997-02-11 | Ferro Corporation | Method of making ceramic article with cavity using LTCC tape |
US5645673A (en) * | 1995-06-02 | 1997-07-08 | International Business Machines Corporation | Lamination process for producing non-planar substrates |
JPH09266264A (ja) * | 1996-03-28 | 1997-10-07 | Sumitomo Kinzoku Electro Device:Kk | グリーンシート積層体の切断方法 |
US5785800A (en) * | 1996-06-21 | 1998-07-28 | International Business Machines Corporation | Apparatus for forming cavity structures using thermally decomposable surface layer |
US5800761A (en) | 1996-10-08 | 1998-09-01 | International Business Machines Corporation | Method of making an interface layer for stacked lamination sizing and sintering |
US5858145A (en) | 1996-10-15 | 1999-01-12 | Sarnoff Corporation | Method to control cavity dimensions of fired multilayer circuit boards on a support |
US5788808A (en) * | 1997-04-15 | 1998-08-04 | International Business Machines Corporation | Apparatus for forming cavity substrates using compressive pads |
US5885803A (en) * | 1997-06-19 | 1999-03-23 | Incyte Pharmaceuticals, Inc. | Disease associated protein kinases |
-
1998
- 1998-11-02 JP JP31252898A patent/JP3547327B2/ja not_active Expired - Fee Related
-
1999
- 1999-11-01 AT AT99951184T patent/ATE504080T1/de active
- 1999-11-01 EP EP99951184A patent/EP1042803B1/en not_active Expired - Lifetime
- 1999-11-01 DE DE69943313T patent/DE69943313D1/de not_active Expired - Lifetime
- 1999-11-01 KR KR10-2000-7007384A patent/KR100521941B1/ko not_active IP Right Cessation
- 1999-11-01 TW TW088118945A patent/TWI232076B/zh not_active IP Right Cessation
- 1999-11-01 CN CNB998019275A patent/CN1146974C/zh not_active Expired - Fee Related
- 1999-11-01 WO PCT/JP1999/006072 patent/WO2000026957A1/en active IP Right Grant
- 1999-11-01 US US09/555,009 patent/US6350334B1/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
DE69943313D1 (de) | 2011-05-12 |
TWI232076B (en) | 2005-05-01 |
ATE504080T1 (de) | 2011-04-15 |
KR100521941B1 (ko) | 2005-10-13 |
EP1042803B1 (en) | 2011-03-30 |
KR20010033828A (ko) | 2001-04-25 |
EP1042803A1 (en) | 2000-10-11 |
US6350334B1 (en) | 2002-02-26 |
CN1287686A (zh) | 2001-03-14 |
JP3547327B2 (ja) | 2004-07-28 |
JP2000138455A (ja) | 2000-05-16 |
WO2000026957A1 (en) | 2000-05-11 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN1146974C (zh) | 制造多层陶瓷基片的方法 | |
US4799983A (en) | Multilayer ceramic substrate and process for forming therefor | |
US5601672A (en) | Method for making ceramic substrates from thin and thick ceramic greensheets | |
US6406778B1 (en) | Multi-thickness, multi-layer green sheet lamination and method thereof | |
CN1662116A (zh) | 多层陶瓷基板及其制造方法 | |
US20010022416A1 (en) | Manufacturing method for multilayer ceramic device | |
JP2005347648A (ja) | 積層電子部品及びその製造方法 | |
CN1229209C (zh) | 陶瓷多层基板的制造方法和未烧成的复合叠层体 | |
US5976286A (en) | Multi-density ceramic structure and process thereof | |
CN1625806A (zh) | 多层陶瓷基板、其制造方法和制造装置 | |
CN1886034A (zh) | 使用凸点的印刷电路板及其制造方法 | |
CN1300526A (zh) | 陶瓷电路板的制造方法以及陶瓷电路板 | |
CN1235451C (zh) | 印刷电路板制造方法 | |
JPH0645759A (ja) | 多層セラミック回路基板の製造方法 | |
JP2004106540A (ja) | 複合体およびその製造方法、並びにセラミック基板の製造方法 | |
US6194053B1 (en) | Apparatus and method fabricating buried and flat metal features | |
US6245185B1 (en) | Method of making a multilayer ceramic product with thin layers | |
US6709749B1 (en) | Method for the reduction of lateral shrinkage in multilayer circuit boards on a substrate | |
JP4048974B2 (ja) | 多層セラミック基板を備える電子部品の製造方法 | |
CN1300527A (zh) | 陶瓷多层基片的制造方法 | |
CN1627884A (zh) | 陶瓷基板制造方法以及使用该陶瓷基板的电子元件模块 | |
CN1359118A (zh) | 制造多层电子陶瓷元器件的方法 | |
CN1729566A (zh) | 电子部件的制造方法及电子部件 | |
JP3111865B2 (ja) | セラミック基板の製造方法 | |
JP2004179568A (ja) | 積層セラミック部品の製造方法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20040421 Termination date: 20161101 |
|
CF01 | Termination of patent right due to non-payment of annual fee |