CN113491008B - 半导体装置 - Google Patents

半导体装置 Download PDF

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Publication number
CN113491008B
CN113491008B CN202080013456.5A CN202080013456A CN113491008B CN 113491008 B CN113491008 B CN 113491008B CN 202080013456 A CN202080013456 A CN 202080013456A CN 113491008 B CN113491008 B CN 113491008B
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semiconductor
gate wiring
semiconductor device
electrode
active regions
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Chinese (zh)
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CN113491008A (zh
Inventor
山田晋
杉田悟
小宫健治
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Denso Corp
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Denso Corp
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/20—Electrodes characterised by their shapes, relative sizes or dispositions 
    • H10D64/23—Electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. sources, drains, anodes or cathodes
    • H10D64/251—Source or drain electrodes for field-effect devices
    • H10D64/258—Source or drain electrodes for field-effect devices characterised by the relative positions of the source or drain electrodes with respect to the gate electrode
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/20—Electrodes characterised by their shapes, relative sizes or dispositions 
    • H10D64/27—Electrodes not carrying the current to be rectified, amplified, oscillated or switched, e.g. gates
    • H10D64/311—Gate electrodes for field-effect devices
    • H10D64/411—Gate electrodes for field-effect devices for FETs
    • H10D64/511—Gate electrodes for field-effect devices for FETs for IGFETs
    • H10D64/517—Gate electrodes for field-effect devices for FETs for IGFETs characterised by the conducting layers
    • H10D64/519—Gate electrodes for field-effect devices for FETs for IGFETs characterised by the conducting layers characterised by their top-view geometrical layouts
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
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    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • H—ELECTRICITY
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    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/40—Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H—ELECTRICITY
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    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/45—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their insulating parts
    • H10W20/48—Insulating materials thereof
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    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W40/00—Arrangements for thermal protection or thermal control
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    • H10W40/77—Auxiliary members characterised by their shape
    • H10W40/778—Auxiliary members characterised by their shape in encapsulations
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    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W76/00—Containers; Fillings or auxiliary members therefor; Seals
    • H10W76/10—Containers or parts thereof
    • H10W76/12—Containers or parts thereof characterised by their shape
    • H10W76/13—Containers comprising a conductive base serving as an interconnection
    • H10W76/138—Containers comprising a conductive base serving as an interconnection having another interconnection being formed by a cover plate parallel to the conductive base, e.g. sandwich type
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    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D12/00—Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT]
    • H10D12/411—Insulated-gate bipolar transistors [IGBT]
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    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/124—Shapes, relative sizes or dispositions of the regions of semiconductor bodies or of junctions between the regions
    • H10D62/126—Top-view geometrical layouts of the regions or the junctions
    • H10D62/127—Top-view geometrical layouts of the regions or the junctions of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
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    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/20—Electrodes characterised by their shapes, relative sizes or dispositions 
    • H10D64/23—Electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. sources, drains, anodes or cathodes
    • H10D64/251—Source or drain electrodes for field-effect devices
    • H10D64/252—Source or drain electrodes for field-effect devices for vertical or pseudo-vertical devices
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    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40—Leadframes
    • H10W70/411—Chip-supporting parts, e.g. die pads
    • H10W70/415—Leadframe inner leads serving as die pads
    • H—ELECTRICITY
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    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40—Leadframes
    • H10W70/421—Shapes or dispositions
    • H10W70/442—Shapes or dispositions of multiple leadframes in a single chip
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40—Leadframes
    • H10W70/461—Leadframes specially adapted for cooling
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    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40—Leadframes
    • H10W70/481—Leadframes for devices being provided for in groups H10D8/00 - H10D48/00
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    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/073—Connecting or disconnecting of die-attach connectors
    • H10W72/07331—Connecting techniques
    • H10W72/07336—Soldering or alloying
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    • H10W72/071—Connecting or disconnecting
    • H10W72/073—Connecting or disconnecting of die-attach connectors
    • H10W72/07351—Connecting or disconnecting of die-attach connectors characterised by changes in properties of the die-attach connectors during connecting
    • H10W72/07354—Connecting or disconnecting of die-attach connectors characterised by changes in properties of the die-attach connectors during connecting changes in dispositions
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    • H10W72/341—Dispositions of die-attach connectors, e.g. layouts
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    • H10W72/00—Interconnections or connectors in packages
    • H10W72/30—Die-attach connectors
    • H10W72/351—Materials of die-attach connectors
    • H10W72/352—Materials of die-attach connectors comprising metals or metalloids, e.g. solders
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    • H10W72/00—Interconnections or connectors in packages
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    • H10W72/00—Interconnections or connectors in packages
    • H10W72/851—Dispositions of multiple connectors or interconnections
    • H10W72/853—On the same surface
    • H10W72/865—Die-attach connectors and bond wires
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    • H10W72/00—Interconnections or connectors in packages
    • H10W72/851—Dispositions of multiple connectors or interconnections
    • H10W72/874—On different surfaces
    • H10W72/884—Die-attach connectors and bond wires
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    • H10W72/00—Interconnections or connectors in packages
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    • H10W72/926—Multiple bond pads having different sizes
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    • H10W72/90—Bond pads, in general
    • H10W72/941—Dispositions of bond pads
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    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
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    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/111—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
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    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/736—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked lead frame, conducting package substrate or heat sink
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    • H10W90/00—Package configurations
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    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink

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  • Semiconductor Integrated Circuits (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
CN202080013456.5A 2019-02-13 2020-01-14 半导体装置 Active CN113491008B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2019023694A JP7103256B2 (ja) 2019-02-13 2019-02-13 半導体装置
JP2019-023694 2019-02-13
PCT/JP2020/000817 WO2020166251A1 (ja) 2019-02-13 2020-01-14 半導体装置

Publications (2)

Publication Number Publication Date
CN113491008A CN113491008A (zh) 2021-10-08
CN113491008B true CN113491008B (zh) 2024-01-16

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CN202080013456.5A Active CN113491008B (zh) 2019-02-13 2020-01-14 半导体装置

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US (1) US11749731B2 (https=)
JP (1) JP7103256B2 (https=)
CN (1) CN113491008B (https=)
WO (1) WO2020166251A1 (https=)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2023088006A (ja) * 2021-12-14 2023-06-26 キオクシア株式会社 半導体装置及び半導体装置の製造方法
JP2024152328A (ja) * 2023-04-14 2024-10-25 株式会社豊田中央研究所 半導体装置

Citations (8)

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JP2002311454A (ja) * 2001-04-16 2002-10-23 Matsushita Electric Ind Co Ltd 液晶画像表示装置と画像表示装置用半導体装置の製造方法
JP2003077933A (ja) * 2001-06-21 2003-03-14 Matsushita Electric Ind Co Ltd 絶縁ゲート型トランジスタと液晶表示装置及び表示装置用半導体装置の製造方法
JP2004111885A (ja) * 2002-07-23 2004-04-08 Toshiba Corp 半導体装置
JP2013045973A (ja) * 2011-08-25 2013-03-04 Panasonic Corp 半導体装置
JP2014175647A (ja) * 2013-03-13 2014-09-22 Renesas Electronics Corp 半導体装置およびその製造方法
WO2015098237A1 (ja) * 2013-12-27 2015-07-02 トヨタ自動車株式会社 縦型半導体装置
JP2015162534A (ja) * 2014-02-27 2015-09-07 株式会社豊田中央研究所 表面電極を備えている半導体チップ
CN106463541A (zh) * 2014-05-23 2017-02-22 松下知识产权经营株式会社 碳化硅半导体装置

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010212589A (ja) * 2009-03-12 2010-09-24 Renesas Electronics Corp 半導体装置の製造方法
JP5755533B2 (ja) 2011-08-26 2015-07-29 ルネサスエレクトロニクス株式会社 半導体装置
JP5765324B2 (ja) * 2012-12-10 2015-08-19 トヨタ自動車株式会社 半導体装置
JP2014160779A (ja) * 2013-02-20 2014-09-04 Toyota Motor Corp 半導体装置
CN105518865A (zh) 2013-08-28 2016-04-20 三菱电机株式会社 半导体装置
DE112014001487B4 (de) * 2013-10-03 2021-03-04 Fuji Electric Co., Ltd. Halbleitermodul
JP2016167527A (ja) 2015-03-10 2016-09-15 株式会社日立製作所 半導体モジュール及びその製造方法
US9620440B1 (en) * 2016-02-25 2017-04-11 Texas Instruments Incorporated Power module packaging with dual side cooling
JP6860334B2 (ja) * 2016-12-06 2021-04-14 株式会社東芝 半導体装置

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002311454A (ja) * 2001-04-16 2002-10-23 Matsushita Electric Ind Co Ltd 液晶画像表示装置と画像表示装置用半導体装置の製造方法
JP2003077933A (ja) * 2001-06-21 2003-03-14 Matsushita Electric Ind Co Ltd 絶縁ゲート型トランジスタと液晶表示装置及び表示装置用半導体装置の製造方法
JP2004111885A (ja) * 2002-07-23 2004-04-08 Toshiba Corp 半導体装置
JP2013045973A (ja) * 2011-08-25 2013-03-04 Panasonic Corp 半導体装置
JP2014175647A (ja) * 2013-03-13 2014-09-22 Renesas Electronics Corp 半導体装置およびその製造方法
WO2015098237A1 (ja) * 2013-12-27 2015-07-02 トヨタ自動車株式会社 縦型半導体装置
JP2015162534A (ja) * 2014-02-27 2015-09-07 株式会社豊田中央研究所 表面電極を備えている半導体チップ
CN106463541A (zh) * 2014-05-23 2017-02-22 松下知识产权经营株式会社 碳化硅半导体装置

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US20210367048A1 (en) 2021-11-25
WO2020166251A1 (ja) 2020-08-20
US11749731B2 (en) 2023-09-05
JP7103256B2 (ja) 2022-07-20
JP2020136315A (ja) 2020-08-31
CN113491008A (zh) 2021-10-08

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