CN113471101B - 覆板及其制造方法 - Google Patents

覆板及其制造方法

Info

Publication number
CN113471101B
CN113471101B CN202110337576.7A CN202110337576A CN113471101B CN 113471101 B CN113471101 B CN 113471101B CN 202110337576 A CN202110337576 A CN 202110337576A CN 113471101 B CN113471101 B CN 113471101B
Authority
CN
China
Prior art keywords
coating
region
central region
cladding
panel
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN202110337576.7A
Other languages
English (en)
Chinese (zh)
Other versions
CN113471101A (zh
Inventor
万芬
刘卫军
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Canon Inc
Original Assignee
Canon Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Canon Inc filed Critical Canon Inc
Publication of CN113471101A publication Critical patent/CN113471101A/zh
Application granted granted Critical
Publication of CN113471101B publication Critical patent/CN113471101B/zh
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/6715—Apparatus for applying a liquid, a resin, an ink or the like
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/0015—Production of aperture devices, microporous systems or stamps
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/687—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
    • H01L21/68714—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
    • H01L21/68757—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support characterised by a coating or a hardness or a material
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B05—SPRAYING OR ATOMISING IN GENERAL; APPLYING FLUENT MATERIALS TO SURFACES, IN GENERAL
    • B05D—PROCESSES FOR APPLYING FLUENT MATERIALS TO SURFACES, IN GENERAL
    • B05D1/00—Processes for applying liquids or other fluent materials
    • B05D1/002—Processes for applying liquids or other fluent materials the substrate being rotated
    • B05D1/005—Spin coating
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/0002—Lithographic processes using patterning methods other than those involving the exposure to radiation, e.g. by stamping
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02282—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process liquid deposition, e.g. spin-coating, sol-gel techniques, spray coating
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/31051—Planarisation of the insulating layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
    • H01L21/76804—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics by forming tapered via holes

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Application Of Or Painting With Fluid Materials (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
CN202110337576.7A 2020-03-30 2021-03-30 覆板及其制造方法 Active CN113471101B (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US16/834,465 2020-03-30
US16/834,465 US12136564B2 (en) 2020-03-30 2020-03-30 Superstrate and method of making it

Publications (2)

Publication Number Publication Date
CN113471101A CN113471101A (zh) 2021-10-01
CN113471101B true CN113471101B (zh) 2025-10-28

Family

ID=77854686

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202110337576.7A Active CN113471101B (zh) 2020-03-30 2021-03-30 覆板及其制造方法

Country Status (5)

Country Link
US (1) US12136564B2 (enExample)
JP (1) JP7504035B2 (enExample)
KR (1) KR20210122100A (enExample)
CN (1) CN113471101B (enExample)
TW (1) TWI834943B (enExample)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11562924B2 (en) * 2020-01-31 2023-01-24 Canon Kabushiki Kaisha Planarization apparatus, planarization process, and method of manufacturing an article
US12325046B2 (en) * 2022-06-28 2025-06-10 Canon Kabushiki Kaisha Superstrate including a body and layers and methods of forming and using the same
US11878935B1 (en) * 2022-12-27 2024-01-23 Canon Kabushiki Kaisha Method of coating a superstrate
US20240411225A1 (en) * 2023-06-09 2024-12-12 Canon Kabushiki Kaisha System including heating means and actinic radiation source and a method of using the same

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3918221B2 (ja) 1997-03-12 2007-05-23 ソニー株式会社 保護膜形成装置及び保護膜形成方法
US6140254A (en) 1998-09-18 2000-10-31 Alliedsignal Inc. Edge bead removal for nanoporous dielectric silica coatings
US20080160129A1 (en) * 2006-05-11 2008-07-03 Molecular Imprints, Inc. Template Having a Varying Thickness to Facilitate Expelling a Gas Positioned Between a Substrate and the Template
EP2163367A4 (en) 2007-06-04 2011-03-23 Maruzen Petrochem Co Ltd FORM, MICROPROCESSED ARTICLE AND THEIR MANUFACTURING PROCESS
JP4609562B2 (ja) * 2008-09-10 2011-01-12 日立電線株式会社 微細構造転写用スタンパ及びその製造方法
RU2449415C1 (ru) * 2010-10-25 2012-04-27 Российская Федерация, От Имени Которой Выступает Министерство Промышленности И Торговли Российской Федерации Способ изготовления высоковольтного силового полупроводникового прибора
JP6083565B2 (ja) 2013-04-09 2017-02-22 パナソニックＩｐマネジメント株式会社 微細構造体の製造方法
US10354858B2 (en) 2013-12-31 2019-07-16 Texas Instruments Incorporated Process for forming PZT or PLZT thinfilms with low defectivity
JP2015170828A (ja) 2014-03-11 2015-09-28 富士フイルム株式会社 プラズマエッチング方法およびパターン化基板の製造方法
JP6385131B2 (ja) * 2014-05-13 2018-09-05 株式会社ディスコ ウェーハの加工方法
JP2017010962A (ja) * 2015-06-16 2017-01-12 株式会社東芝 デバイス基板およびデバイス基板の製造方法並びに半導体装置の製造方法
JP6649600B2 (ja) 2015-08-03 2020-02-19 三菱自動車工業株式会社 電動車両の回生制御装置
TWI804224B (zh) 2016-08-12 2023-06-01 美商英培雅股份有限公司 減少邊緣珠區域中來自含金屬光阻劑之金屬殘留物的方法
JP2019016616A (ja) * 2017-07-03 2019-01-31 大日本印刷株式会社 インプリントモールド及びその製造方法、並びに配線基板の製造方法
CN111868920A (zh) 2018-03-15 2020-10-30 应用材料公司 用于半导体器件封装制造工艺的平坦化
US11137536B2 (en) * 2018-07-26 2021-10-05 Facebook Technologies, Llc Bragg-like gratings on high refractive index material
KR102810856B1 (ko) * 2019-09-02 2025-05-20 삼성전자주식회사 반도체 소자 제조 장치, 반도체 소자 검사 장치 및 반도체 소자 제조 방법

Also Published As

Publication number Publication date
TW202136013A (zh) 2021-10-01
US12136564B2 (en) 2024-11-05
KR20210122100A (ko) 2021-10-08
US20210305082A1 (en) 2021-09-30
JP7504035B2 (ja) 2024-06-21
TWI834943B (zh) 2024-03-11
CN113471101A (zh) 2021-10-01
JP2021160352A (ja) 2021-10-11

Similar Documents

Publication Publication Date Title
CN113471101B (zh) 覆板及其制造方法
US10859913B2 (en) Superstrate and a method of using the same
JP6701286B2 (ja) 平坦化プロセスおよび装置
TWI662359B (zh) 次２０奈米之形貌體的均勻壓印圖案轉移方法
US10035296B2 (en) Methods for controlling spread of imprint material
US9793120B2 (en) Device substrate, method of manufacturing device substrate, and method of manufacturing semiconductor device
KR20170056457A (ko) 반전 톤 패터닝 방법
KR20210098334A (ko) 평탄화 장치, 평탄화 공정, 및 물품 제조 방법
US8506830B2 (en) Pattern formation method
KR102617324B1 (ko) 슈퍼스트레이트 및 그 사용 방법
US8163656B2 (en) Process for adjusting the size and shape of nanostructures
US12130549B2 (en) Method of manufacturing a template
JP2024545846A (ja) 基板チャック、ディスペンサ及び平坦化ヘッドを含む装置、及び、それを使用する方法
US20100081282A1 (en) Process for adjusting the size and shape of nanostructures
CN1242460C (zh) 确定终点的方法以及半导体圆片
KR20240174826A (ko) 가열 수단 및 화학 방사선 소스를 포함하는 시스템 및 그의 사용 방법
US11541577B2 (en) Template apparatus and methods of using the same
US11204549B2 (en) Superstrate with an offset mesa and methods of using the same
JP2008513229A (ja) インサイチュ嵌込み構造物形成方法
TW202516625A (zh) 輸送設備、成型設備及物品製造方法
JP2018147915A (ja) インプリントモールド及びインプリントモールドの製造方法
KR20230082569A (ko) 상판 및 그 사용 방법
JP7192409B2 (ja) インプリントモールド用基板及びインプリントモールド、並びにそれらの製造方法
US20190079389A1 (en) Template for imprint lithography and methods of making and using the same
KR20090005447A (ko) 연마패드 및 그의 제조방법

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant