CN113257887A - 一种具有三种区域的4H-SiC金属半导体场效应晶体管 - Google Patents

一种具有三种区域的4H-SiC金属半导体场效应晶体管 Download PDF

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CN113257887A
CN113257887A CN202110307399.8A CN202110307399A CN113257887A CN 113257887 A CN113257887 A CN 113257887A CN 202110307399 A CN202110307399 A CN 202110307399A CN 113257887 A CN113257887 A CN 113257887A
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贾护军
董梦宇
王笑伟
朱顺威
杨银堂
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Xidian University
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    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
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    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
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    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/10Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
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Abstract

本发明提供了一种具有三种区域的4H‑SiC金属半导体场效应晶体管,自下而上包括4H‑SiC半绝缘衬底(1)、P型缓冲层(2)、N型沟道层(3),源极帽层(4)和漏极帽层(5),源电极(6)和漏电极(7),栅电极(8),轻掺杂区域(9),氮化硅绝缘区域(10)和重掺杂区域(11)。本发明可以达到以下效果:饱和电流的提高、击穿电压的提高、频率特性的改善和PAE的提高。由于沟道内重掺杂区域的存在,器件的跨导有显著提高,使得器件的PAE有所提高。

Description

一种具有三种区域的4H-SiC金属半导体场效应晶体管
技术领域
本发明属于场效应晶体管技术领域;尤其涉及一种具有三种区域的4H-SiC金属半导体场效应晶体管。
背景技术
碳化硅(SiC)功率器件耐高温、抗辐射、具有较高的击穿电压和工作频率,适于在恶劣条件下工作,特别是与传统的硅(Si)功率器件相比,SiC功率器件可将功耗降低一半,因此可大幅度降低开关电源、电机驱动器等电路的热耗、体积和重量。SiC在微波功率器件,尤其是金属半导体场效应晶体管(MESFET)的应用中占有主要地位。SiC MESFET非常适合在雷达发射机中使用,使用它可显著提高雷达发射机的输出功率和功率密度,提高工作频率和工作频带宽度,提高雷达发射机的环境温度适应性,提高抗辐射能力。
传统的4H-SiC MESFET的结构从下到上是:4H-SiC半绝缘衬底、P型缓冲层、N型沟道层和N+帽层,通过对传统结构沟道形状以及栅极形状改变对器件性能的提升有限,许多结构在提升器件击穿电压时降低了饱和电流,提高器件饱和电流又降低了器件击穿电压,即提升器件某一方面性能的时候往往伴随着某一方面性能的降低。这种牵制关系制约着器件性能的提高。
发明内容
本发明的目的是提供了一种具有三种区域的4H-SiC金属半导体场效应晶体管。
本发明是通过以下技术方案实现的:
本发明涉及一种具有三种区域的4H-SiC金属半导体场效应晶体管,自下而上包括4H-SiC半绝缘衬底1、P型缓冲层2、N型沟道层3,所述N型沟道层3的上方设置有源极帽层4和漏极帽层5,所述源极帽层4和漏极帽层5的表面分别设置有源电极6和漏电极7,所述N型沟道层3的上方且靠近源电极6的一侧形成栅电极8,所述源极帽层4和漏极帽层5之间的凹陷栅靠近源极帽层4的一侧为轻掺杂区域9,所述源极帽层4和漏极帽层5之间的凹陷栅靠近漏极帽层5的一侧为氮化硅绝缘区域10,所述P型缓冲层2的上方且位于N型沟道层3底部设置有重掺杂区域11。
优选地,所述轻掺杂区域9的深度为0.06μm,宽度为0.2μm,掺杂浓度为1×1015cm-3
优选地,所述氮化硅绝缘区域10的深度为0.06μm,宽度为0.8μm。
优选地,所述重掺杂区域11以P型缓冲层2表面为参考高度为0.1μm,宽度为0.5μm,掺杂浓度为5×1019cm-3
本发明具有以下优点:
(1)饱和电流的提高。对于具有沟道内部分重掺杂区域、部分轻掺杂区域以及部分绝缘区域的4H-SiC金属半导体场效应晶体管,由于沟道内重掺杂区域的存在,沟道内的可移动载流子数量大量增加,使得器件的饱和电流提高,最大输出功率密度与也得到了提高。
(2)击穿电压的提高。对于具有沟道内部分重掺杂区域、部分轻掺杂区域以及部分绝缘区域的4H-SiC金属半导体场效应晶体管,由于沟道内氮化硅绝缘区域的存在,沟道内电场的分布得到了改善,使得电场集边效应得到减弱,击穿电压得到了提高。
(3)频率特性的改善。对于具有沟道内部分重掺杂区域、部分轻掺杂区域以及部分绝缘区域的4H-SiC金属半导体场效应晶体管,由于沟道内轻掺杂区域的存在,器件的栅源电容的到了改善,使得在提高器件其他性能的时候,防止频率特性恶化,最终提高了器件的截止频率。
(4)PAE的提高。对于具有沟道内部分重掺杂区域、部分轻掺杂区域以及部分绝缘区域的4H-SiC金属半导体场效应晶体管,由于沟道内重掺杂区域的存在,器件的跨导有显著提高,使得器件的PAE有所提高。
附图说明
图1是为本发明具有沟道内部分重掺杂区域、部分轻掺杂区域以及部分绝缘区域的4H-SiC金属半导体场效应晶体管示意图。
其中:1为4H-SiC半绝缘衬底,2为P型缓冲层,3为N型沟道层,4为源极帽层,5为漏极帽层,6为源电极,7为漏电极,8为栅电极,9为轻掺杂区域,10为氮化硅绝缘区域,11为重掺杂区域。
具体实施方式
下面结合具体实施例对本发明进行详细说明。应当指出的是,以下的实施实例只是对本发明的进一步说明,但本发明的保护范围并不限于以下实施例。
实施例
本实施例涉及一种具有三种区域的4H-SiC金属半导体场效应晶体管,具体涉及一种具有沟道内部分重掺杂区域、部分轻掺杂区域以及部分绝缘区域的4H-SiC金属半导体场效应晶体管;如图1所示:自下而上包括4H-SiC半绝缘衬底1、P型缓冲层2、N型沟道层3,所述N型沟道层3的上方设置有源极帽层4和漏极帽层5,所述源极帽层4和漏极帽层5的表面分别设置有源电极6和漏电极7,所述N型沟道层3的上方且靠近源电极6的一侧形成栅电极8,所述源极帽层4和漏极帽层5之间的凹陷栅靠近源极帽层4的一侧为轻掺杂区域9,所述源极帽层4和漏极帽层5之间的凹陷栅靠近漏极帽层5的一侧为氮化硅绝缘区域10,所述P型缓冲层2的上方且位于N型沟道层3底部设置有重掺杂区域11。
优选地,所述轻掺杂区域9的深度为0.06μm,宽度为0.2μm,掺杂浓度为1×1015cm-3
优选地,所述氮化硅绝缘区域10的深度为0.06μm,宽度为0.8μm。
优选地,所述重掺杂区域11以P型缓冲层2表面为参考高度为0.1μm,宽度为0.5μm,掺杂浓度为5×1019cm-3
与现有技术相比,本发明具有以下优点:
(1)饱和电流的提高。对于具有沟道内部分重掺杂区域、部分轻掺杂区域以及部分绝缘区域的4H-SiC金属半导体场效应晶体管,由于沟道内重掺杂区域的存在,沟道内的可移动载流子数量大量增加,使得器件的饱和电流提高,最大输出功率密度与也得到了提高。
(2)击穿电压的提高。对于具有沟道内部分重掺杂区域、部分轻掺杂区域以及部分绝缘区域的4H-SiC金属半导体场效应晶体管,由于沟道内氮化硅绝缘区域的存在,沟道内电场的分布得到了改善,使得电场集边效应得到减弱,击穿电压得到了提高。
(3)频率特性的改善。对于具有沟道内部分重掺杂区域、部分轻掺杂区域以及部分绝缘区域的4H-SiC金属半导体场效应晶体管,由于沟道内轻掺杂区域的存在,器件的栅源电容的到了改善,使得在提高器件其他性能的时候,防止频率特性恶化,最终提高了器件的截止频率。
(4)PAE的提高。对于具有沟道内部分重掺杂区域、部分轻掺杂区域以及部分绝缘区域的4H-SiC金属半导体场效应晶体管,由于沟道内重掺杂区域的存在,器件的跨导有显著提高,使得器件的PAE有所提高。
以上对本发明的具体实施例进行了描述。需要理解的是,本发明并不局限于上述特定实施方式,本领域技术人员可以在权利要求的范围内做出各种变形或修改,这并不影响本发明的实质。

Claims (4)

1.一种具有三种区域的4H-SiC金属半导体场效应晶体管,自下而上包括4H-SiC半绝缘衬底(1)、P型缓冲层(2)、N型沟道层(3),其特征在于,所述N型沟道层(3)的上方设置有源极帽层(4)和漏极帽层(5),所述源极帽层(4)和漏极帽层(5)的表面分别设置有源电极(6)和漏电极(7),所述N型沟道层(3)的上方且靠近源电极(6)的一侧形成栅电极(8),所述源极帽层(4)和漏极帽层(5)之间的凹陷栅靠近源极帽层(4)的一侧为轻掺杂区域(9),所述源极帽层(4)和漏极帽层(5)之间的凹陷栅靠近漏极帽层(5)的一侧为氮化硅绝缘区域(10),所述P型缓冲层(2)的上方且位于N型沟道层(3)底部设置有重掺杂区域(11)。
2.如权利要求1所述的具有三种区域的4H-SiC金属半导体场效应晶体管,其结构特征在于,所述轻掺杂区域(9)的深度为0.06μm,宽度为0.2μm,掺杂浓度为1×1015cm-3
3.如权利要求1所述的具有三种区域的4H-SiC金属半导体场效应晶体管,其结构特征在于,所述氮化硅绝缘区域(10)的深度为0.06μm,宽度为0.8μm。
4.如权利要求1所述的具有三种区域的4H-SiC金属半导体场效应晶体管,其结构特征在于,所述重掺杂区域(11)以P型缓冲层(2)表面为参考高度为0.1μm,宽度为0.5μm,掺杂浓度为5×1019cm-3
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CN113782590A (zh) * 2021-09-09 2021-12-10 西安电子科技大学 一种具有部分下沉沟道的4H-SiC金属半导体场效应晶体管
CN114023805A (zh) * 2021-10-18 2022-02-08 西安电子科技大学 具有P型掺杂区和凹陷缓冲层的4H-SiC金属半导体场效应管

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