CN108172618B - 高k介质沟槽横向双扩散金属氧化物宽带隙半导体场效应管及其制作方法 - Google Patents
高k介质沟槽横向双扩散金属氧化物宽带隙半导体场效应管及其制作方法 Download PDFInfo
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Abstract
本发明提出了一种具有高K介质(High‑K Dielectric Pillar,HK)沟槽横向双扩散金属氧化物宽带隙半导体场效应管(LDMOS)及其制作方法。该器件主要是在器件的漏端形成深槽高K介质层,高K介质层的下端深入到器件衬底上的外延层,上端与器件表面的漏电极相连接。在器件关断时,HK介质沟槽均匀的电场降低了器件漏端下方由柱面结产生的高峰高电场,优化了器件的纵向电场分布,提升了器件的击穿电压;而且,高K介质层与宽带隙半导体材料衬底形成MIS电容结构,在器件关断时能够有效地辅助耗尽衬底中的电荷,有效提高了器件在一定耐压下衬底的掺杂浓度即降低了衬底的电阻率。
Description
技术领域
本发明涉及功率半导体器件领域,特别是涉及一种横向双扩散金属氧化物半导体场效应管及其制作方法。
背景技术
宽带隙半导体材料具有大的禁带宽度、高临界击穿电场、高热导率和高电子饱和漂移速度等特点,因此其在大功率、高温以及高频的电力电子领域有非常广阔的应用前景。横向功率器件具有易集成,热稳定性好,较好的频率稳定性,低功耗,多子导电,功率驱动小,开关速度高等优点被广泛应用于PIC(Power Integrated Circuit)中。目前在以宽带隙半导体材料(典型SiC)作为衬底的横向双扩散金属氧化物半导体场效应管(LDMOS)是被广泛研究的对象之一。在LDMOS等横向功率器件的设计优化过程中随着优化表面电场的终端技术,包括降低表面电场技术(Reduced Surface Field,简称RESURF)、场板(Field Plate,简称FP)技术、横向变掺杂(Variation of Lateral Doping,简称VLD)等技术的应用,横向功率器件的表面电场已经优化到了一定程度,然而优化器件纵向电场的技术相对较少。
由于横向功率器件的耐压是由横向和纵向电场综合决定的,为了提高进一步提升LDMOS的击穿电压,需要对器件的横向电场和纵向电场同时优化。对于采用RESURF等技术将器件表面电场优化到一定程度的LDMOS器件,器件的纵向电场决定了器件的整体耐压。
发明内容
本发明提出了一种高K介质(High-K Dielectric Pillar,HK)沟槽横向双扩散金属氧化物宽带隙半导体场效应管,旨在优化基于宽带隙半导体材料的LDMOS器件击穿电压与比导通电阻的矛盾关系。
本发明的技术方案如下:
高K介质沟槽横向双扩散金属氧化物宽带隙半导体场效应管,包括:
半导体材料的衬底;
在衬底上生长的外延层;
在所述外延层上形成的基区和漂移区;
在所述基区上临近漂移区的一侧形成的源区和沟道,在漂移区的另一侧形成的漏区;
在基区中源区外侧形成的沟道衬底接触;
在源区和沟道衬底接触表面短接形成的源电极;
对应于沟道形成的栅绝缘层以及栅电极;
在漏区上形成的漏电极;
其特殊之处在于:
所述衬底为宽带隙半导体材料,部分漏区刻蚀形成深沟槽,该深沟槽下端穿过漂移区深入到衬底上方的外延层,深沟槽内填充有高K介质,高K介质的深宽比主要根据器件耐压等级确定,高K介质的上端经多晶硅接触层与所述漏电极相接。
本发明还进一步作了如下优化:
高K介质的相对介电常数是100~2000。
高K介质的深度(即深沟槽的深度)与漂移区长度相关,较佳的取值为:高K介质的深度是漂移区长度的1/4~2倍。
高K介质的深宽比(即深沟槽的深宽比)根据器件耐压等级和实际宽带隙材料的工艺进行确定。如:器件耐压为600V时,高K介质的深宽比为5/1-20/1。
多晶硅接触层和漏电极的整体厚度与栅电极的厚度相当。
宽带隙半导体材料衬底的掺杂浓度根据器件的特性要求设定,典型值为1×1013cm-3~1×1015cm-3。
宽带隙半导体材料为氮化镓、碳化硅或金刚石。
一种制作上述高K介质沟槽横向双扩散金属氧化物宽带隙半导体场效应管的方法,包括以下步骤:
1)取宽带隙半导体材料的衬底;
2)在衬底上生长外延层;
3)在外延层上通过高温离子注入和高温激活等工艺形成基区和漂移区;
4)在基区和漂移区上通过场钝化工艺形成有源区;
5)有源区上生长栅氧化层并淀积多晶硅,再刻蚀多晶硅形成栅电极;
6)在基区临近漂移区的一侧高温离子注入和高温激活等工艺形成源区和沟道,同时在漂移区的另一侧形成漏区;
7)在基区中源区外侧高温离子注入和高温激活等工艺形成沟道衬底接触;
8)在部分漏区通过刻蚀形成深沟槽,然后淀积高K介质材料;
9)深沟槽内完全填充高K介质后,在表面淀积多晶硅,并与高K介质材料形成接触;
10)在器件表面淀积钝化层,然后刻蚀接触孔;
11)在器件上表面淀积金属;
12)在所述源区和沟道衬底接触上方通过接触孔短接形成源极;
13)在漏区上方通过接触孔形成漏电极。
本发明技术方案的有益效果如下:
采用针对宽带隙材料的深沟槽刻蚀技术,在器件漏端区域形成高深宽比的沟槽,然后在沟槽中淀积高K介质材料。深沟槽的高K介质层下端深入器件衬底区域,上端与器件表面的漏端电极相连接。HK沟槽介质层与宽带隙半导体材料的衬底形成MIS电容结构,在器件关断时能够有效地辅助耗尽中宽带隙半导体材料中的电荷,提高了器件衬底的掺杂浓度,使得具有低阻衬底的LDMOS可以获得高的击穿电压。并且,在器件关断时HK沟槽介质层上具有均匀的电场从而可以有效地调制器件的体电场。降低了器件漏端下方由柱面结产生的高峰电场,优化了器件的纵向电场分布,提升了器件的性能;解决了基于宽带隙半导体材料的横向LDMOS器件随着器件漂移区长度击穿电压易饱和的问题,从而进一步优化了器件击穿电压与比导通电阻之间的矛盾关系。
附图说明
图1为本发明实施例的结构示意图(正视图)。
附图标号说明:
1-源电极;2-栅电极;3-栅绝缘层;4-漂移区;5-漏电极;6-多晶硅接触层;7-漏区;8-高K介质(填充于深沟槽);9-漂移区;10-外延层;11-衬底;12-基区;13-源区;14-沟道衬底接触;15-沟道。
具体实施方式
如图1所示,本发明的高K介质沟槽横向双扩散金属氧化物宽带隙半导体场效应管,包括:
宽带隙半导体材料(例如氮化镓、碳化硅或金刚石)的衬底11(衬底的掺杂浓度为1×1013cm-3~1×1015cm-3);
在衬底11上生长的外延层10;
在外延层10上形成的基区12和漂移区9;
在基区12上临近漂移区9的一侧形成的源区13和沟道15,在漂移区9的另一侧形成的漏区7;
在基区中源区13外侧形成的沟道衬底接触14;
在源区和沟道衬底接触表面短接形成的源电极1;
对应于沟道15形成的栅绝缘层3以及栅电极2;
在漏区上形成的漏电极5;
部分漏区刻蚀形成深沟槽,该深沟槽下端穿过漂移区9深入到衬底上方的外延层10,深沟槽内填充有高K介质8。高K介质的相对介电常数是100~2000,高K介质的深度是漂移区长度的1/4~2倍;当器件耐压为600V时,高K介质的深宽比为5/1-20/1。高K介质8的上端经多晶硅接触层6与漏电极5相接。多晶硅接触层和漏电极的整体厚度与栅电极的厚度相当。
采用基于宽带隙材料的深沟槽刻蚀工艺在LDMOS器件漏区上形成深沟槽,沟槽内部淀积高K介质材料,在HK沟槽上方淀积多晶硅,并在表面形成漏电极。对于传统的基于宽带隙半导体材料的LDMOS器件通过RESURF和场板等有效地技术优化了器件的表面电场,使得器件的击穿发生在器件体内。由于器件漏端为柱面结,在附近形成高峰电场,限制了器件的纵向耐压能力。通过高K介质沟槽技术使得器件漏端的高峰电场降低并有效地优化了器件的纵向电场分布。同时又由于高K介质层与宽带隙半导体衬底形成MIS电容结构,在器件关断时能够辅助耗尽器件衬底中的电荷,从而有效地提高了器件衬底的掺杂浓度,降低了衬底的电阻率。总之通过器件漏端的HK沟槽技术能够有效地提升器件的性能,优化器件击穿电压和比导通电阻之间的矛盾关系。
以下以基于宽带隙半导体SiC材料的N沟道LDMOS为例,具体可以通过以下步骤进行制备:
1)选取P型SiC材料作为衬底;
2)在衬底外延形成特定浓度的P型SiC外延层;
3)在P型SiC外延层上通过高温离子注入和高温激活等工艺形成N型漂移区和P型基区;
4)在基区和漂移区通过器件表面钝化工艺形成有源区;
5)在有源区上生长栅氧化层并淀积多晶硅,然后刻蚀多晶硅和栅氧化层形成栅电极;
6)N型高温离子注入并高温激活工艺在基区临近漂移区的一侧形成源区和沟道,同时在漂移区的另一侧形成漏区;
7)在所述基区中源区外侧P型离子注入形成沟道衬底接触;
8)在漏区内部通过刻蚀形成深沟槽,然后淀积高K介质材料;
9)深沟槽中填充高K介质后,在表面淀积多晶硅,并与高K介质材料形成接触;
10)在器件表面淀积钝化层,然后刻蚀接触孔;
11)在器件上表面淀积金属;
12)在所述源区和沟道衬底接触上方通过接触孔短接形成源极;
13)在漏区上方通过接触孔形成漏电极。
经Sentaurus仿真,本发明提出的新型器件的性能较之于传统器件大幅度提升:两种器件(本发明提出的器件和传统宽带隙半导体LDMOS器件)在漂移区长度相同的条件下,新型器件的击穿电压提升了40%。
当然,本发明中的LDMOS也可以为P型沟道,其结构与N沟道LDMOS等同,本发明提出的器件漏端的高K介质沟槽技术同样适应基于宽带隙材料的LIGBT,PiN二极管等功率半导体器件,这些均应视为属于本申请权利要求的保护范围,在此不再赘述。
以上所述仅是本发明的优选实施方式,应当指出,对于本技术领域的普通技术人员来说,在不脱离本发明技术原理的前提下,还可以做出若干改进和替换,这些改进和替换的方案也落入本发明的保护范围。
Claims (7)
1.高K介质沟槽横向双扩散金属氧化物宽带隙半导体场效应管,包括:
半导体材料的衬底;
在衬底上生长的外延层;
在所述外延层上形成的基区和漂移区;
在所述基区上临近漂移区的一侧形成的源区和沟道,在漂移区的另一侧形成的漏区;
在基区中源区外侧形成的沟道衬底接触;
在源区和沟道衬底接触表面短接形成的源电极;
对应于沟道形成的栅绝缘层以及栅电极;
在漏区上形成的漏电极;
其特征在于:
所述衬底为宽带隙半导体材料,部分漏区刻蚀形成深沟槽,该深沟槽下端穿过漂移区深入到衬底上方的外延层,深沟槽内填充有高K介质,高K介质的深宽比根据器件耐压等级确定,高K介质的上端经多晶硅接触层与所述漏电极相接。
2.根据权利要求1所述的高K介质沟槽横向双扩散金属氧化物宽带隙半导体场效应管,其特征在于:高K介质的相对介电常数是100~2000。
3.根据权利要求1所述的高K介质沟槽横向双扩散金属氧化物宽带隙半导体场效应管,其特征在于:高K介质的深度是漂移区长度的1/4~2倍。
4.根据权利要求1所述的高K介质沟槽横向双扩散金属氧化物宽带隙半导体场效应管,其特征在于:器件耐压为600V时,高K介质的深宽比为5/1-20/1。
5.根据权利要求1所述的高K介质沟槽横向双扩散金属氧化物宽带隙半导体场效应管,其特征在于:宽带隙半导体材料为氮化镓、碳化硅或金刚石。
6.根据权利要求1所述的高K介质沟槽横向双扩散金属氧化物宽带隙半导体场效应管,其特征在于:宽带隙半导体材料的衬底的掺杂浓度典型值为1×1013cm-3~1×1015cm-3。
7.一种制作权利要求1所述高K介质沟槽横向双扩散金属氧化物宽带隙半导体场效应管的方法,包括以下步骤:
1)取宽带隙半导体材料作衬底;
2)在衬底上生长外延层;
3)在外延层上通过高温离子注入和高温激活工艺形成基区和漂移区;
4)在基区和漂移区上通过钝化工艺形成有源区;
5)有源区上生长栅氧化层并淀积多晶硅,再刻蚀多晶硅形成栅电极;
6)在基区临近漂移区的一侧采用高温离子注入和高温激活工艺形成源区和沟道,同时在漂移区的另一侧形成漏区;
7)在基区中源区外侧通高温离子注入和高温激活工艺形成沟道衬底接触;
8)在部分漏区通过刻蚀形成深沟槽,然后淀积高K介质材料;
9)深沟槽内完全填充高K介质后,在表面淀积多晶硅,并与高K介质材料形成接触;
10)在器件表面淀积钝化层,然后刻蚀接触孔;
11)在器件上表面淀积金属;
12)在源区和沟道衬底接触上方通过接触孔短接形成源极;
13)在漏区上方通过接触孔形成漏电极。
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