CN111293176B - 一种GaN纵向逆导结场效应管 - Google Patents
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Abstract
本发明属于功率半导体技术领域,涉及GaN纵向逆导结场效应管。本发明利用器件顶层两个背靠背的PN结形成JFET结构来控制沟道的开启和关断,且利用肖特基金属淀积在一侧的P‑GaN上形成逆导二极管的阳极。通过适当的控制沟道宽度和PN结的掺杂浓度可以实现对器件阈值电压的控制。另外,位于肖特基阳极下方的浮空P型GaN埋层在GaN漂移区引入了反偏PN结,该反偏PN结在承受反向耐压时其耗尽区不断扩展使该器件体内电场分布均匀,有效降低器件内部最大峰值电场。本发明的有益效果为,在正向开关工作状态下,具有阈值电压可调,导通电阻低、饱和电流大、关态耐压高和低功耗等优点;在逆导工作状态下,具有开启电压低、导通电阻低,反向耐压大和低功耗等优点。
Description
技术领域
本发明属于功率半导体技术领域,涉及一种GaN纵向逆导结场效应管。
背景技术
GaN作为第三代宽禁带半导体材料的代表,由于其优异于第一代(Si)和第二代(GaAs) 半导体材料的材料特性,使其在当今社会的应用越来越广泛。由于GaN材料的禁带宽度大,具备高的功率密度,使其在5G通信方面有着重要地位;AlGaN/GaN异质结界面处由于材料极化效应而引起的2DEG具有高浓度、高迁移率的特点,因此器件可以实现高开关频率和低导通损耗,因此该类GaN器件被广泛的无人驾驶技术和电动汽车上。与SiC材料相比,同样属于第三代半导体材料GaN具备更大优势。一方面,GaN-on-Si的发展使得GaN器件的成本显著下降,这对于GaN器件的应用是具有里程碑意义的。另一方面,由于GaN器件属于平面器件,与现有的Si半导体工艺兼容性强,这使其更容易与其他半导体器件集成。正因如此,对于GaN材料的研究也越来越受到人们的关注。
GaN器件发展30几年来,对于横向AlGaN/GaN HEMT器件的研究相对比较成熟,因此横向器件的缺点也越来越被大家熟知。1)传统横向GaN HEMT器件会导致电流崩塌等一系列可靠性问题。电流崩塌是由于器件沟道内电场分布不均匀而引起的沟道电子被AlGaN势垒层缺陷所俘获,俘获后的缺陷反过来耗尽2DEG沟道,而导致的器件电流能力下降和导通电阻升高等问题。这一现象在横向器件中是普遍存在的,且备受研究者关注。2)由于横向器件利用高速高迁移率的2DEG沟道进行导电,因此器件一般是表面器件,表面器件通常易发生过早击穿的问题。在反向耐压状态下,器件沟道内电场分布不均匀,一般在栅极靠近漏端处电场相对比较集中。过于集中的电场不仅会引起如上述所述的电流崩塌的问题,同样会造成器件表面电场过高而引起的过早击穿问题,从而无法发挥GaN异质结器件所具有的高工作频率、低导通电阻与高耐压的优势。3)对于横向器件为了提高器件的击穿电压,通常需要通过增大器件栅漏间距的方法实现,这会导致器件尺寸增大,从而增大生产成本。这与GaN器件的发展趋势和市场定位是相悖的。
针对横向器件所具有的缺点,研究者们也给出了相应的解决方法。1)对于横向器件的电流崩塌问题,研究者提出采用钝化层的方法来缓解电流崩塌引起的器件性能的退化,常见的钝化层由SiN、AlN、SiO2等。钝化层的引入,一方面能减少AlGaN势垒层中的缺陷,另一方面能缓解电场分布集中的问题,因此能有效的降低因电流崩塌而造成的器件性能退化。然而,钝化层的引入同样也会引起其他方面的问题,如钝化层与AlGaN势垒层的界面问题,钝化层引入的额外的漏电通道问题等。这些问题同样可能引起器件可靠性问题,因此目前的手段只能缓解这一现象而不能从根源上解决这个问题。2)对于反向耐压下,沟道电场分布不均匀而引起的器件过早击穿的问题,研究者提出通过场板技术方案来解决这一问题。场板是与电极相连接的金属层,根据连接的电极,一般分为栅场板和源场板两种。场板的引入很好的解决了栅极靠漏端电场集中而引起的器件过早击穿的问题,大大提升了横向器件的击穿电压,也是目前应用比较广泛的一项用于提升器件击穿电压的手段。同样,场板的引入不可避免的引入了额外的寄生电容和寄生电感等,这大大影响了器件的开关频率和开关速度,同时增加了额外的功耗问题。因此对于横向器件而言,需要在这两者之间进行折中考虑。3)对于横向器件通过牺牲器件面积来换取器件的高耐压问题,目前的解决方法还是通过结合场板等多项技术尽可能在牺牲最小器件面积的情况下提升器件的击穿电压。但目前对于600V级别的器件来说器件的面积还是要大很多。基于上述分析,研究者们非常渴望能够从根源上解决横向 AlGaN/GaN HEMT器件所面临的这些问题。
在这样的背景下,GaN纵向器件的研究便愈来愈成为热点。纵向器件以体电子为载流子通过体电子来导电,因此可以从根源上解决横向器件中电流崩塌的问题。另外,纵向器件将电场峰值转移到器件的体内,从而避免了横向器件由于电场在栅附近处集中而引起器件过早击穿的问题。纵向器件能够通过改变漂移区的厚度和漂移区的掺杂浓度来控制器件的击穿电压,因此可以解决横向器件用面积来换取器件耐压的问题,能够很好的降低生产成本。虽然纵向器件能够解决横向器件存在的诸多问题,但是纵向器件本身也存在一些目前尚未解决的问题。目前,对于GaN纵向器件的研究大多是基于MOSFET和CAVET(CurrentAperture Vertical Electron Transistors)结构进行的,虽然这两种方案都能实现增强型和耐高压,但是 GaN MOS栅技术尚未成熟还有很多问题有待解决,例如界面缺陷、P-GaN反型层的电子迁移率低等问题,而CAVET实现工艺复杂且增强型的实现较为不易,目前基于CAVET结构制备的器件其阈值电压普遍不高。另外,不管对于横向器件还是纵向器件都存在的一个问题是GaN 器件不像Si器件一样具有体二极管。在大功率的电力电子系统中,一般会选择续流二极管并联在开关管两端,以防止电路中所产生的感应电动势击穿或者烧毁开关管。然而,分立的续流二极管不仅增加了系统的体积和成本,而且增加了寄生电容与寄生电感,从而导致开关损耗增大。传统的GaN PN结二极管由于开启电压过大,且P型GaN的空穴迁移率过低,并不适合作为续流二极管使用。因此,开发具有逆导功能的GaN纵向增强型器件对GaN器件的应用具有重大意义。
发明内容
为了解决上述技术难题,本发明提出了一种具有逆导功能的GaN纵向结场效应管。在正向开关工作状态下,具有阈值电压可调,导通电阻低、饱和电流大、关态耐压高和低功耗等优点;在逆导工作状态下,具有开启电压低、导通电阻低,反向耐压大和低功耗等优点。
本发明解决上述技术问题所采用的技术方案是:如图1所示,一种GaN纵向逆导结场效应管,从下至上依次包括层叠设置的硅衬底10、漏极GaN N型重掺杂层1、N型漂移区2、P型掺杂阻挡层4和源极GaN N型重掺杂层5;所述P型掺杂阻挡层4与N型漂移区2构成PNP结构的 JFET区11;其特征在于,还包括了凹槽结构,所述凹槽位于器件两端,垂直方向沿着P型掺杂阻挡层4延伸到N型漂移区2,并在凹槽内淀积了肖特基接触金属9;所述N型漂移区2中具有多个沿垂直方向平行设置的浮空P-GaN区域3,浮空P-GaN区域3位于凹槽下方,并以N型漂移区2的垂直中线呈对称分布;所述源极GaN N型重掺杂层5位于JFET区11正上方,并与P型掺杂阻挡层4相邻;所述源极GaN N型重掺杂层5的上表面是源极欧姆金属7;所述P型掺杂阻挡层4 的上表面是栅极金属6,且栅极金属6夹在源极欧姆金属7中间;所述漏极GaN N型重掺杂层1 的横向宽度大于N型漂移区2的宽度,所述N型漂移区2位于漏极GaN N型重掺杂层1上表面中部,在漏极GaN N型重掺杂层1上表面两端分别具有漏极欧姆金属8。
作为优选方式,所述浮空P-GaN区域3的长度Lp大约为0.5~1.5μm,宽度tp大约为1.0~2.0μm,掺杂浓度Np大约为0.5~1.5×1017cm-3。
作为优选方式,所述N型漂移区2的厚度大约为5~20μm。
作为优选方式,所述P型掺杂阻挡层4的厚度Tp在0.5~2.5μm之间。
作为优选方式,所述JFET区11的沟道宽度Lap在0.5~1.0μm之间。
为了解决GaN纵向器件增强型的实现所遇到的技术问题,本发明通过引入P型掺杂阻挡层与N型漂移区形成PNP结构的JFET区,通过调节PN结的空间电荷区,实现对JFET沟道的控制从而达到控制器件阈值电压的目的。本发明采用JFET技术来实现增强型,且通过适当设计结构参数(P型掺杂阻挡层的掺杂浓度、JFET区的沟道宽度和长度等)可实现阈值电压的大范围灵活控制,如仿真结果图2给出了JFET区沟道宽度Lap对器件阈值电压的控制。仿真图3转移特性曲线给出了本发明实现了GaN纵向器件的阈值电压高达2.0V,同时图4输出特性曲线给出了器件的比导通电阻低至2.79mΩ·cm2。采用本发明能够很好的解决采用MOS结构而导致的导通电阻大而采用CAVET结构阈值电压小的矛盾问题,在实现低导通电阻高耐压的同时保持了器件较高的阈值电压。
为了解决GaN器件对体二极管的需求和器件耐压低的问题,本发明利用不同功函数金属与N型漂移区接触所形成的不同肖特基势垒高度来调制逆导二极管的开启电压,从而实现逆导功能;利用浮空P-GaN区域与N型漂移区所形成的体内PN结来承受关态电压,降低关态漏电流,如仿真图5浮空P-GaN区对电场的调制作用所示,通过引入浮空P-GaN区器件的击穿电压达到了1720V。本发明很好的解决了GaN器件无体二极管问题和器件耐压低的问题,具有广泛的应用前景。
需要指出的是,P型掺杂阻挡层的掺杂浓度和厚度、JFET区沟道宽度等参数不同时,JFET 结构中PN结的空间电荷区的宽度有明显差异,从而所实现的阈值电压也有所差异;浮空P-GaN 层的长度、厚度、掺杂浓度以及与P型掺杂阻挡层的距离都会影响到器件体内电场分布以及关态漏电降低的程度。
本发明的有益效果为,在正向开关工作状态下,具有阈值电压可调,导通电阻低、饱和电流大、关态耐压高和低功耗等优点;在逆导工作状态下,具有开启电压低、导通电阻低,反向耐压大和低功耗等优点。
图6为基于本发明原理的另一种实现方式,与图1的区别在于器件的漏极欧姆金属8直接淀积在GaN N型重掺杂层1的下表面,其余部分无差异。
附图说明
图1为本发明提出的GaN纵向逆导结场效应管的结构示意图。
图2为本发明提出的器件JFET区沟道宽度Lap对器件阈值电压的控制图。
图3为本发明所提结构的转移特性曲线。
图4为本发明所提结构的输出特性曲线。
图5为本发明所提结构中浮空P-GaN区对电场的调制作用。
图6为本发明所提结构的另一种实现形式的示意图。
具体实施方式
在发明内容部分已经对本发明的方案进行了详细描述,在此不再赘述。
Claims (5)
1.一种GaN纵向逆导结场效应管,从下至上依次包括层叠设置的硅衬底(10)、漏极GaNN型重掺杂层(1)、N型漂移区(2)、P型掺杂阻挡层(4)和源极GaN N型重掺杂层(5);所述P型掺杂阻挡层(4)与N型漂移区(2)构成PNP结构的JFET区(11);其特征在于,还包括凹槽结构,所述凹槽位于器件上表面两端,沿垂直方向贯穿P型掺杂阻挡层(4)延伸到N型漂移区(2),并在凹槽内淀积肖特基接触金属(9);所述N型漂移区(2)中具有多个沿垂直方向平行设置的浮空P-GaN区域(3),浮空P-GaN区域(3)位于凹槽下方,两侧的浮空P-GaN区域(3)以N型漂移区(2)的垂直中线呈对称分布;所述源极GaN N型重掺杂层(5)位于JFET区(11)正上方,并与P型掺杂阻挡层(4)相邻;所述源极GaN N型重掺杂层(5)的上表面是源极欧姆金属(7);所述P型掺杂阻挡层(4)的上表面是栅极金属(6),且栅极金属(6)夹在源极欧姆金属(7)之间;所述漏极GaN N型重掺杂层(1)的横向宽度大于N型漂移区(2)的宽度,所述N型漂移区(2)位于漏极GaN N型重掺杂层(1)上表面中部,在漏极GaN N型重掺杂层(1)上表面两端分别具有漏极欧姆金属(8)。
2.根据权利要求1所述的一种GaN纵向逆导结场效应管,其特征在于,所述浮空P-GaN区域(3)的长度Lp为0.5~1.5μm。
3.根据权利要求1所述的一种GaN纵向逆导结场效应管,其特征在于,P型掺杂阻挡层(4)的掺杂浓度Np为1~5(× 1017cm-3)。
4.根据权利要求1所述的一种GaN纵向逆导结场效应管,其特征在于,P型掺杂阻挡层(4)的厚度Tp为0.5~2.5μm。
5.根据权利要求1~4任意一项所述的一种GaN纵向逆导结场效应管,其特征在于,JFET区(11)的沟道宽度Lap为0.5~1.5μm。
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