CN111710727A - 一种阵列基板及其制备方法以及显示面板 - Google Patents

一种阵列基板及其制备方法以及显示面板 Download PDF

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CN111710727A
CN111710727A CN202010534614.3A CN202010534614A CN111710727A CN 111710727 A CN111710727 A CN 111710727A CN 202010534614 A CN202010534614 A CN 202010534614A CN 111710727 A CN111710727 A CN 111710727A
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张鹏
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Shenzhen China Star Optoelectronics Semiconductor Display Technology Co Ltd
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Priority to US16/963,369 priority patent/US11894386B2/en
Priority to PCT/CN2020/101098 priority patent/WO2021248609A1/zh
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Abstract

本发明提供一种阵列基板及其制备方法以及显示面板。阵列基板包括依次层叠设置在衬底上的有源层、金属接触层、栅极绝缘层、栅极层、源漏极层、及像素电极。金属接触层的绝缘区对应于有源层的沟道区，金属接触层的导体区位于绝缘区的两旁。源漏极层的源极和漏极分别与导体区连接。以缓解现有TFT器件中IGZO导体化区电阻较大的问题。

Description

一种阵列基板及其制备方法以及显示面板
技术领域
本发明涉及显示技术领域，尤其涉及一种阵列基板及其制备方法以及显示面板。
背景技术
随着显示技术的发展，显示屏逐渐往大尺寸高分辨率的方向发展。而传统的TFT(Thin Film Transistor，薄膜晶体管)器件一般采用a-Si(Amorphous Silicon，非晶硅)作为有源层。a-Si器件由于发展已久，器件特性稳定，但是a-Si迁移率低下，在高分辨率及高刷新频率下，就逐渐失去了原有的优势。而IGZO(Indium Gallium Zinc Oxide，铟镓锌氧化物)作为氧化物半导体材料中的一种，相比较于a-Si，有着比a-Si更大的迁移率。使用IGZO作为TFT器件中的沟道材料，可以提高显示面板的分辨率。而对于顶栅(Top gate)结构的氧化物半导体TFT器件，通常在对栅极层和栅极绝缘层进行刻蚀后，采用氦气等离子体对未被栅极层覆盖的IGZO区域进行导体化，以保证源漏极层与半导体层间良好的欧姆接触。之后再进行源漏极层的制作，形成TFT器件。但是经历长时间的热退火制程会增加IGZO被导体化区域的电阻，影响导体化的效果，从而使TFT器件的电性恶化甚至失效。
因此，现有TFT器件中IGZO导体化区电阻较大的问题需要解决。
发明内容
本发明提供一种阵列基板及其制备方法以及显示面板，以缓解现有TFT器件中IGZO导体化区电阻较大的技术问题。
为解决上述问题，本发明提供的技术方案如下：
本发明实施例提供一种阵列基板，其包括在衬底上依次层叠制备的有源层、金属接触层、栅极绝缘层、栅极层、源漏极层、及像素电极。所述有源层设置于所述衬底上，包括沟道区。所述金属接触层设置于所述有源层上，包括导体区和绝缘区，所述绝缘区对应于所述沟道区，所述导体区设置于所述绝缘区两旁。所述栅极绝缘层设置于所述金属接触层上方。所述栅极层设置于所述栅极绝缘层上方，所述栅极层包括栅极，所述栅极位于所述沟道区的相对上方。所述源漏极层设置于所述导体区上方，所述源漏极层包括源极和漏极。所述像素电极设置于所述源漏极层上方，且与所述源极或所述漏极连接。其中，所述源极和所述漏极分别与所述导体区连接。
在本发明实施例提供的阵列基板中，所述阵列基板还包括遮光层，所述遮光层设置于所述衬底上，且位于所述有源层的下方。
在本发明实施例提供的阵列基板中，所述有源层的宽度小于所述遮光层的宽度。
在本发明实施例提供的阵列基板中，所述有源层的材料包括铟镓锌氧化物、铟锌锡氧化物、铟镓锌锡氧化物中的一种。
在本发明实施例提供的阵列基板中，所述金属接触层的材料包括铝、铜、钼、钛或者其合金。
本发明实施例提供一种阵列基板制备方法，其包括以下步骤：步骤S10、提供一衬底，依次在所述衬底上制备有源层及金属接触层，使用一道光罩对所述有源层和所述金属接触层进行黄光工艺，并对部分所述金属接触层进行氧化处理，使所述金属接触层形成导体区和绝缘区，以定义出所述有源层的沟道区。步骤S20、在所述金属接触层上制备栅极绝缘层，在所述栅极绝缘层上制备栅极层，对所述栅极层和所述栅极绝缘层进行黄光工艺，形成栅极。步骤S30、在所述栅极层上制备层间绝缘层，在所述层间绝缘层上制备源漏极层，对所述源漏极层进行黄光工艺形成源极和漏极，所述源极和所述漏极分别连接到所述导体区。
在本发明实施例提供的阵列基板制备方法中，在步骤S10中，制备所述有源层和所述金属接触层包括以下步骤：在所述衬底上制备遮光层，在所述遮光层上制备缓冲层，在所述缓冲层上制备所述有源层。在所述有源层上沉积一层金属薄膜作为金属接触层，在所述金属接触层上涂布光阻，使用半色调掩膜光罩对所述光阻进行曝光显影形成光阻图案。以所述光阻图案为遮挡，对所述金属接触层和所述有源层进行蚀刻，去除未被所述光阻图案遮挡的所述金属接触层和所述有源层。对所述光阻图案进行灰化，使所述光阻图案两侧部分减薄，中间部分去除，以裸露出部分所述金属接触层。以减薄的光阻图案为遮挡，对裸露出的所述金属接触层进行氧化处理，形成绝缘区。剥离掉所述减薄的光阻图案。
在本发明实施例提供的阵列基板制备方法中，在步骤S20中，采用光阻剥离工艺形成所述栅极。
在本发明实施例提供的阵列基板制备方法中，还包括以下步骤：步骤S40、在所述源漏极层以及所述层间绝缘层上依次制备钝化层和平坦化层，并在所述平坦化层上制备像素电极，所述像素电极与所述源极或所述漏极连接。
本发明实施例提供一种显示面板，其包括前述实施例其中之一的阵列基板。
本发明的有益效果为：本发明提供的阵列基板及其制备方法以及显示面板中，在有源层上制备金属接触层，金属接触层的导体区的导电性和稳定性更好，作为后续源极、漏极与有源层连接的桥梁，解决了现有TFT器件中IGZO导体化区电阻较大的问题，进而有效的避免因导体化弱化或失效造成的TFT器件性能恶化。同时有源层和金属接触层同时沉积，可以更好的保护有源层的沟道区。而且对应沟道区的金属接触层经氧化处理后形成的绝缘区可以作为栅极绝缘层的一部分，可以更好的保护有源层，使TFT器件性能更稳定。
附图说明
为了更清楚地说明实施例或现有技术中的技术方案，下面将对实施例或现有技术描述中所需要使用的附图作简单介绍，显而易见地，下面描述中的附图仅仅是发明的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1为本发明实施例提供的阵列基板的膜层结构侧视示意图；
图2为本发明实施例提供的阵列基板制备方法的流程示意图；
图3至图9为本发明实施例提供的阵列基板制备方法中各步骤制得的膜层结构侧视示意图；
图10为本发明实施例提供的第一种显示面板的侧视示意图；
图11为本发明实施例提供的第二种显示面板的侧视示意图。
具体实施方式
以下各实施例的说明是参考附加的图示，用以例示本发明可用以实施的特定实施例。本发明所提到的方向用语，例如[上]、[下]、[前]、[后]、[左]、[右]、[内]、[外]、[侧面]等，仅是参考附加图式的方向。因此，使用的方向用语是用以说明及理解本发明，而非用以限制本发明。在图中，结构相似的单元是用以相同标号表示。
在一种实施例中，提供一种阵列基板100，如图1所示，其包括在衬底10上依次层叠制备的有源层40、金属接触层50、栅极绝缘层11、栅极层60、源漏极层70、及像素电极80。所述有源层40设置于所述衬底10上，包括沟道区41。所述金属接触层50设置于所述有源层40上，包括导体区52和绝缘区51，所述绝缘区51对应于所述沟道区41，所述导体区52设置于所述绝缘区51的两旁。所述栅极绝缘层11设置于所述金属接触层50上方。所述栅极层60设置于所述栅极绝缘层11上方，所述栅极层60包括栅极61，所述栅极61位于所述沟道区41的相对上方。所述源漏极层70设置于所述导体区52上方，所述源漏极层70包括源极72和漏极71。所述像素电极80设置于所述源漏极层70上方，且与所述源极72或所述漏极71连接，如图1示出的像素电极80与源极72连接。其中，所述源极72和所述漏极71分别与所述导体区52连接。
具体的，所述衬底10包括玻璃基板或聚酰亚胺等柔性基板。
具体的，所述阵列基板100还包括遮光层20，所述遮光层20设置于所述衬底10上，且位于所述有源层40的下方。当然的，所述有源层40和所述遮光层20之间还设置有缓冲层30。
进一步的，所述遮光层20的材料包括铝、铜、钼、钛等金属或者其合金或者其他遮光材料。
进一步的，所述有源层40的宽度小于所述遮光层20的宽度。
进一步的，所述有源层40的材料包括铟镓锌氧化物、铟锌锡氧化物、铟镓锌锡氧化物等金属氧化物半导体中的一种。
进一步的，所述金属接触层50和所述有源层40使用同一道光罩进行黄光蚀刻工艺。使形成的所述金属接触层50和所述有源层40的图案大小相同。
进一步的，对经过黄光蚀刻工艺后的金属接触层50的中间部分进行氧化处理，使所述金属接触层50形成导体区52和绝缘区51，以定义出有源层40的沟道区41的宽长比。未进行氧化处理的两侧部分作为所述金属接触层50的导体区52，用于与所述源漏极层70的源极72和漏极71连接。
进一步的，金属接触层50的中间部分经过氧化处理后，形成金属氧化物绝缘区51。该绝缘区51可以作为栅极绝缘层11的一部分，能够更好的保护有源层40。
进一步的，栅极绝缘层11和所述栅极层60经同一道光罩进行黄光蚀刻工艺，形成栅极61及信号走线(图未示)。其中经过蚀刻后的栅极绝缘层11的图案大小和栅极61相同。
进一步的，所述金属接触层50的材料包括铝、铜、钼、钛等金属或者其合金。
进一步的，所述金属接触层50的厚度范围为50埃至200埃。
进一步的，所述源漏极层70的源极72或漏极71与所述金属接触层50的导体区52连接，金属接触层50的导体区52相较于导体化的有源层，导电性和稳定性更好，可以有效的避免因导体化弱化或失效造成的TFT器件性能恶化。
进一步的，所述栅极层60和所述源漏极层70的材料均包括铝、铜、钼、钛等金属或者其合金或者其叠层结构。
进一步的，所述栅极层60、所述源漏极层70以及所述像素电极80之间设置有多个绝缘层。多个绝缘层包括层间绝缘层12、钝化层13及平坦化层14。其中层间绝缘层12位于所述栅极层60和所述源漏极层70之间。钝化层13和平坦化层14位于源漏极层70和像素电极80之间。
进一步的，层间绝缘层12、钝化层13、平坦化层14及缓冲层30上设置有过孔。所述源漏极层70的源极72和漏极71通过层间绝缘层12的过孔连接金属接触层50的导体区52，且源极72还通过层间绝缘层12和缓冲层30的过孔连接遮光层20。像素电极80通过平坦化层14和钝化层13的过孔连接源极72或漏极71。如图1示出的像素电极80与源极72连接。
在一种实施例中，提供一种阵列基板的制备方法，如图2所示，其包括以下步骤：
步骤S10、提供一衬底，依次在所述衬底上制备有源层及金属接触层，使用一道光罩对所述有源层和所述金属接触层进行黄光工艺，并对部分所述金属接触层进行氧化处理，使所述金属接触层形成导体区和绝缘区，以定义出所述有源层的沟道区。
具体的，如图3所示，在所述衬底10上制备遮光层20，在所述遮光层20上制备缓冲层30，在所述缓冲层30上制备所述有源层40。
具体的，在所述衬底10上沉积一层厚度为500埃至2000埃的金属薄膜，并对金属薄膜进行黄光工艺，形成遮光层20。制备遮光层20的金属薄膜包括铝、铜、钼、钛等金属或者其合金。
进一步的，在遮光层20及所述衬底10上沉积一层厚度为1000埃至5000埃的氧化硅(SiOx)或氮化硅(SiNx)等无机物薄膜作为缓冲层30。
进一步的，在缓冲层30上沉积一层厚度为100埃至1000埃的金属氧化物半导体薄膜作为有源层40，接着在金属氧化物半导体材料上沉积一层厚度为50埃至200埃的金属薄膜作为金属接触层50。金属接触层50的金属薄膜包括铝、铜、钼、钛等金属或者其合金。
进一步的，在金属接触层50上涂布一层光阻，使用一道半色调掩膜光罩对光阻进行曝光显影，形成光阻图案200。光阻图案200两侧部分的厚度大于中间部分的厚度。
进一步的，以所述光阻图案200为遮挡，对所述金属接触层50和所述有源层40进行蚀刻，去除未被所述光阻图案遮挡的所述金属接触层和所述有源层。
进一步的，使用氧气等灰化气体对所述光阻图案200进行灰化，使所述光阻图案两侧部分减薄，中间部分去除，以裸露出部分金属接触层50，如图4所示。
进一步的，以减薄的光阻图案201为遮挡，对裸露出的所述金属接触层50进行氧化处理，使所述金属接触层50形成导体区52和绝缘区51，以定义出有源层40的沟道区41。
具体的，金属接触层50的中间部分经过氧化处理后，形成金属氧化物绝缘区51。该绝缘区51可以作为后续栅极绝缘层的一部分，能够更好的保护有源层40。
进一步的，未进行氧化处理的两侧部分作为所述金属接触层50的导体区52。
进一步的，剥离掉所述减薄的光阻图案201，形成如图5所示的结构。
步骤S20、在所述金属接触层50上制备栅极绝缘层11，在所述栅极绝缘层11上制备栅极层60，对所述栅极层60和所述栅极绝缘层11进行黄光工艺，形成栅极61，如图6所示。
具体的，在金属接触层及缓冲层上沉积一层厚度为1000埃至3000埃的氧化硅(SiOx)或氮化硅(SiNx)等无机物薄膜作为栅极绝缘层。
进一步的，在栅极绝缘层上沉积一层厚度为2000埃至8000埃的金属薄膜作为栅极层。栅极层的金属薄膜包括铝、铜、钼、钛等金属或者其合金或者其叠层结构。
进一步的，对栅极层60进行黄光蚀刻工艺，形成栅极61。
进一步的，以栅极61的金属图案为自对准，蚀刻栅极绝缘层11，使未被栅极61的金属图案遮挡的栅极绝缘层11全部蚀刻掉。
当然的，在形成栅极61和栅极绝缘层11时，也可以采用光阻剥离(lift-off)工艺以减少蚀刻次数。
步骤S30、在所述栅极层上制备层间绝缘层，在所述层间绝缘层上制备源漏极层，对所述源漏极层进行黄光工艺形成源极和漏极，所述源极和所述漏极分别连接到所述导体区。
具体的，如图7所示，在栅极层60及缓冲层30上沉积一层厚度为2000埃至10000埃的氧化硅(SiOx)或氮化硅(SiNx)等无机物薄膜作为层间绝缘层12。
进一步的，对层间绝缘层12进行黄光工艺，形成多个过孔。其中一种过孔121贯穿层间绝缘层12至金属接触层50，以裸露出金属接触层50的导体区52。另外一种过孔121’贯穿层间绝缘层12和缓冲层30至遮光层20，以裸露出部分遮光层20。
进一步的，如图8所示，在层间绝缘层12上沉积一层厚度为2000埃至8000埃的金属薄膜作为源漏极层70。源漏极层70的金属薄膜包括铝、铜、钼、钛等金属或者其合金或者其叠层结构。
进一步的，对源漏极层70进行黄光蚀刻工艺，形成源极72、漏极71及信号走线(图未示)。源极72、漏极71分别通过对应的层间绝缘层12的过孔连接金属接触层50的导体区52和遮光层20。
具体的，如图8所示，源极72同时连接导体区52和遮光层20。漏极71连接导体区52。
步骤S40、在所述源漏极层以及所述层间绝缘层上依次制备钝化层和平坦化层，在所述平坦化层上制备像素电极。
具体的，如图9所示，在源漏极层70及层间绝缘层12上沉积一层厚度为1000埃至5000埃的氧化硅(SiOx)、氮化硅(SiNx)或氮氧化硅(SiNOx)等无机物薄膜作为钝化层13。
进一步的，在钝化层13上沉积一层平坦化层14。对平坦化层14进行黄光蚀刻工艺形成过孔121”。过孔121”贯穿平坦化层14和钝化层13，以裸露出源极72或漏极71，如图9示出的以裸露出源极72。
进一步的，在所述平坦化层14上制备像素电极80，所述像素电极80通过所述过孔连接所述源极72或所述漏极71，形成如图1所示的阵列基板100，在图1中，像素电极80与源极72连接。
在一种实施例中，提供一种显示面板，其包括上述实施例其中之一的阵列基板。
具体的，显示面板为液晶显示面板，如图10所示的液晶显示面板1000包括阵列基板100、与阵列基板100相对设置的彩膜基板300以及位于阵列基板100和彩膜基板300之间的多个液晶分子400。
具体的，显示面板为OLED显示面板，如图11所示的OLED显示面板1001包括阵列基板100、设置于阵列基板100上的发光功能层500及设置于发光功能层500上的封装层600。
根据上述实施例可知：
本发明提供一种阵列基板及其制备方法以及显示面板，阵列基板包括依次层叠设置在衬底上的有源层、金属接触层、栅极绝缘层、栅极层、源漏极层、及像素电极。金属接触层的绝缘区对应于有源层的沟道区，金属接触层的导体区位于绝缘区的两旁。源漏极层的源极和漏极分别与导体区连接。在有源层上制备金属接触层，金属接触层的导体区的导电性和稳定性更好，作为后续源极、漏极与有源层连接的桥梁，解决了现有TFT器件中IGZO导体化区电阻较大的问题，进而有效的避免因导体化弱化或失效造成的TFT器件性能恶化。同时有源层和金属接触层同时沉积，可以更好的保护有源层的沟道区。而且对应沟道区的金属接触层经氧化处理后形成的绝缘区可以作为栅极绝缘层的一部分，可以更好的保护有源层，使TFT器件性能更稳定。
综上所述，虽然本发明已以优选实施例揭露如上，但上述优选实施例并非用以限制本发明，本领域的普通技术人员，在不脱离本发明的精神和范围内，均可作各种更动与润饰，因此本发明的保护范围以权利要求界定的范围为准。

Claims (10)

1.一种阵列基板，其特征在于，包括：
衬底；
有源层，设置于所述衬底上，包括沟道区；
金属接触层，设置于所述有源层上，包括导体区和绝缘区，所述绝缘区对应于所述沟道区，所述导体区设置于所述绝缘区两旁；
栅极绝缘层，设置于所述金属接触层上方；
栅极层，设置于所述栅极绝缘层上方，所述栅极层包括栅极，所述栅极位于所述沟道区的相对上方；
源漏极层，设置于所述导体区上方，所述源漏极层包括源极和漏极；以及
像素电极，设置于所述源漏极层上方，且与所述源极或所述漏极连接；
其中，所述源极和所述漏极分别与所述导体区连接。
2.根据权利要求1所述的阵列基板，其特征在于，所述阵列基板还包括遮光层，所述遮光层设置于所述衬底上，且位于所述有源层的下方。
3.根据权利要求2所述的阵列基板，其特征在于，所述有源层的宽度小于所述遮光层的宽度。
4.根据权利要求3所述的阵列基板，其特征在于，所述有源层的材料包括铟镓锌氧化物、铟锌锡氧化物、铟镓锌锡氧化物中的一种。
5.根据权利要求4所述的阵列基板，其特征在于，所述金属接触层的材料包括铝、铜、钼、钛或者其合金。
6.一种阵列基板的制备方法，其特征在于，包括以下步骤：
步骤S10、提供一衬底，依次在所述衬底上制备有源层及金属接触层，使用一道光罩对所述有源层和所述金属接触层进行黄光工艺，并对部分所述金属接触层进行氧化处理，使所述金属接触层形成导体区和绝缘区，以定义出所述有源层的沟道区；
步骤S20、在所述金属接触层上制备栅极绝缘层，在所述栅极绝缘层上制备栅极层，对所述栅极层和所述栅极绝缘层进行黄光工艺，形成栅极；以及
步骤S30、在所述栅极层上制备层间绝缘层，在所述层间绝缘层上制备源漏极层，对所述源漏极层进行黄光工艺形成源极和漏极，所述源极和所述漏极分别连接到所述导体区。
7.根据权利要求6所述的阵列基板制备方法，其特征在于，在步骤S10中，制备所述有源层和所述金属接触层包括以下步骤：
在所述衬底上制备遮光层，在所述遮光层上制备缓冲层，在所述缓冲层上制备所述有源层；
在所述有源层上沉积一层金属薄膜作为金属接触层，在所述金属接触层上涂布光阻，使用半色调掩膜光罩对所述光阻进行曝光显影形成光阻图案；
以所述光阻图案为遮挡，对所述金属接触层和所述有源层进行蚀刻，去除未被所述光阻图案遮挡的所述金属接触层和所述有源层；
对所述光阻图案进行灰化，使所述光阻图案两侧部分减薄，中间部分去除，以裸露出部分所述金属接触层；
以减薄的光阻图案为遮挡，对裸露出的所述金属接触层进行氧化处理，形成绝缘区；以及
剥离掉所述减薄的光阻图案。
8.根据权利要求6所述的阵列基板制备方法，其特征在于，在步骤S20中，采用光阻剥离工艺形成所述栅极。
9.根据权利要求6所述的阵列基板制备方法，其特征在于，还包括以下步骤：
步骤S40、在所述源漏极层以及所述层间绝缘层上依次制备钝化层和平坦化层，并在所述平坦化层上制备像素电极，所述像素电极与所述源极或所述漏极连接。
10.一种显示面板，其特征在于，包括如权利要求1至5任一项所述的阵列基板。
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