CN109192739A - 一种薄膜晶体管及其制备方法、阵列基板和显示装置 - Google Patents
一种薄膜晶体管及其制备方法、阵列基板和显示装置 Download PDFInfo
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- 239000000758 substrate Substances 0.000 title claims abstract description 96
- 238000002360 preparation method Methods 0.000 title claims abstract description 39
- 239000010409 thin film Substances 0.000 title claims abstract description 32
- 229910044991 metal oxide Inorganic materials 0.000 claims abstract description 66
- 150000004706 metal oxides Chemical class 0.000 claims abstract description 66
- 239000002184 metal Substances 0.000 claims abstract description 65
- 229910052751 metal Inorganic materials 0.000 claims abstract description 65
- 238000005530 etching Methods 0.000 claims abstract description 54
- 238000000034 method Methods 0.000 claims abstract description 37
- 230000003647 oxidation Effects 0.000 claims description 16
- 238000007254 oxidation reaction Methods 0.000 claims description 16
- 239000000463 material Substances 0.000 claims description 11
- 239000011248 coating agent Substances 0.000 claims description 3
- 238000000576 coating method Methods 0.000 claims description 3
- 239000010408 film Substances 0.000 claims description 3
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 3
- 239000010931 gold Substances 0.000 claims description 3
- 229910052737 gold Inorganic materials 0.000 claims description 3
- 230000004888 barrier function Effects 0.000 abstract description 13
- 238000002161 passivation Methods 0.000 abstract description 12
- 239000007788 liquid Substances 0.000 abstract description 11
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 abstract description 8
- 229910052760 oxygen Inorganic materials 0.000 abstract description 8
- 239000001301 oxygen Substances 0.000 abstract description 8
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 abstract description 8
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 abstract description 7
- 238000010586 diagram Methods 0.000 description 11
- 238000004519 manufacturing process Methods 0.000 description 9
- 230000015572 biosynthetic process Effects 0.000 description 4
- 238000005516 engineering process Methods 0.000 description 4
- LYCAIKOWRPUZTN-UHFFFAOYSA-N Ethylene glycol Chemical compound OCCO LYCAIKOWRPUZTN-UHFFFAOYSA-N 0.000 description 3
- 229910000583 Nd alloy Inorganic materials 0.000 description 3
- 238000000151 deposition Methods 0.000 description 3
- 239000011521 glass Substances 0.000 description 3
- 238000010438 heat treatment Methods 0.000 description 3
- 238000000059 patterning Methods 0.000 description 3
- 239000002253 acid Substances 0.000 description 2
- 230000008021 deposition Effects 0.000 description 2
- 230000005611 electricity Effects 0.000 description 2
- 238000009413 insulation Methods 0.000 description 2
- 229920002120 photoresistant polymer Polymers 0.000 description 2
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 1
- 238000007743 anodising Methods 0.000 description 1
- NGPGDYLVALNKEG-UHFFFAOYSA-N azanium;azane;2,3,4-trihydroxy-4-oxobutanoate Chemical compound [NH4+].[NH4+].[O-]C(=O)C(O)C(O)C([O-])=O NGPGDYLVALNKEG-UHFFFAOYSA-N 0.000 description 1
- 210000004556 brain Anatomy 0.000 description 1
- 229910052593 corundum Inorganic materials 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000003792 electrolyte Substances 0.000 description 1
- 239000007769 metal material Substances 0.000 description 1
- 150000002927 oxygen compounds Chemical class 0.000 description 1
- 238000003825 pressing Methods 0.000 description 1
- 230000000750 progressive effect Effects 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 230000001360 synchronised effect Effects 0.000 description 1
- 229910001845 yogo sapphire Inorganic materials 0.000 description 1
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Abstract
本申请提供了一种薄膜晶体管及其制备方法、阵列基板和显示装置,其中薄膜晶体管的制备方法包括:提供基板,并在基板上形成有源层;在基板以及有源层上形成金属层;对金属层进行处理,形成源电极、漏电极以及金属氧化物层,金属氧化物层覆盖源电极、漏电极和有源层,金属氧化物层将源电极和漏电极相互绝缘。通过对金属层进行处理从而同步形成源、漏电极和金属氧化物层,金属氧化物层既可以防止有源层在后续刻蚀工艺中被刻蚀液损伤,还可以防止外界的水氧对有源层造成损伤,因此,金属氧化物层的制备可以取代现有的刻蚀阻挡层和钝化层的制备,也就是无需再通过PECVD设备分步形成刻蚀阻挡层和钝化层,从而简化制备工艺、降低成本。
Description
技术领域
本发明涉及显示技术领域,特别是涉及一种薄膜晶体管及其制备方法、阵列基板和显示装置。
背景技术
随着显示产品的不断发展与应用,对阵列基板的设计与工艺要求也逐步提高。由于薄膜晶体管有源层的材料极容易被酸性或者碱性的刻蚀液损伤,这就需要在有源层上沉积一层刻蚀阻挡层,防止后续刻蚀工艺中的刻蚀液对有源层造成损伤。另外,为了保证TFT器件的稳定性,防止外界的水氧对有源层造成损伤,还要在源电极和漏电极制作完成后沉积一层钝化层。
现有的刻蚀阻挡层和钝化层是分别通过等离子体增强化学气相沉积(PECVD)设备形成,工艺相对比较复杂且设备运行成本高。
发明内容
本发明提供一种薄膜晶体管及其制备方法、阵列基板和显示装置,以简化工艺、降低成本。
为了解决上述问题,本发明公开了一种薄膜晶体管的制备方法,所述制备方法包括:
提供基板,并在所述基板上形成有源层;
在所述基板以及所述有源层上形成金属层;
对所述金属层进行处理,形成源电极、漏电极以及金属氧化物层,所述金属氧化物层覆盖所述源电极、所述漏电极和所述有源层,所述金属氧化物层将所述源电极和所述漏电极相互绝缘。
可选地,所述对所述金属层进行处理,形成源电极、漏电极以及金属氧化物层的步骤,包括:
对所述有源层上的金属层进行刻蚀,刻蚀深度小于第一厚度,所述第一厚度为所述金属层的厚度;
对刻蚀后的金属层进行氧化处理,形成所述源电极、所述漏电极以及所述金属氧化物层。
可选地,对所述有源层上的金属层进行刻蚀的步骤,包括:
对所述有源层上预设区域内的金属层进行刻蚀,所述预设区域在所述基板上的正投影位于所述有源层在所述基板上的正投影范围内。
可选地,所述有源层上金属氧化物层的厚度小于所述第一厚度。
可选地,所述提供基板,并在所述基板上形成有源层的步骤,包括:
提供衬底;
在所述衬底上依次形成栅极和栅极绝缘层;
在所述栅极绝缘层背离所述衬底的一侧形成有源层。
为了解决上述问题,本发明还公开了一种薄膜晶体管,所述薄膜晶体管包括:
基板以及设置在所述基板上的有源层;
设置在所述基板以及所述有源层上的源电极和漏电极,所述源电极、所述漏电极和所述有源层上覆盖有金属氧化物层;
其中,所述金属氧化物层的材料为所述源电极和所述漏电极金属的氧化物,所述金属氧化物层将所述源电极和所述漏电极相互绝缘。
可选地,所述基板包括衬底以及设置在所述衬底上的栅极和栅极绝缘层;
所述有源层设置在所述栅极绝缘层背离所述衬底的一侧。
为了解决上述问题,本发明还公开了一种阵列基板,所述阵列基板包括任一实施例所述的薄膜晶体管。
为了解决上述问题,本发明还公开了一种显示装置,所述显示装置包括任一实施例所述的阵列基板。
与现有技术相比,本发明包括以下优点:
本申请提供了一种薄膜晶体管及其制备方法、阵列基板和显示装置,其中薄膜晶体管的制备方法包括:提供基板,并在基板上形成有源层;在基板以及有源层上形成金属层;对金属层进行处理,形成源电极、漏电极以及金属氧化物层,金属氧化物层覆盖源电极、漏电极和有源层,金属氧化物层将源电极和漏电极相互绝缘。通过对金属层进行处理从而同步形成源电极、漏电极和金属氧化物层,金属氧化物层既可以防止有源层在后续刻蚀工艺中被刻蚀液损伤,还可以防止外界的水氧对有源层造成损伤,因此,金属氧化物层的制备可以取代现有的刻蚀阻挡层和钝化层的制备,也就是无需再通过PECVD设备分步形成刻蚀阻挡层和钝化层,从而简化制备工艺、降低成本。
附图说明
为了更清楚地说明本发明实施例的技术方案,下面将对本发明实施例的描述中所需要使用的附图作简单地介绍,显而易见地,下面描述中的附图仅仅是本发明的一些实施例,对于本领域普通技术人员来讲,在不付出创造性劳动性的前提下,还可以根据这些附图获得其他的附图。
图1示出了相关技术中薄膜晶体管的剖面结构示意图;
图2示出了本申请一实施例提供的一种薄膜晶体管的制备方法的步骤流程图;
图3示出了本申请一实施例提供的一种薄膜晶体管的制备方法中完成有源层制作的剖面结构示意图;
图4示出了本申请一实施例提供的一种薄膜晶体管的制备方法中完成金属层制作的剖面结构示意图;
图5示出了本申请一实施例提供的一种薄膜晶体管的制备方法中完成源电极、漏电极和金属氧化物层制作的剖面结构示意图;
图6示出了本申请一实施例提供的一种源电极、漏电极和金属氧化物层制作工艺的步骤流程图;
图7示出了本申请一实施例提供的一种源电极、漏电极和金属氧化物层制作工艺中完成金属层刻蚀后的剖面结构示意图;
图8示出了本申请一实施例提供的一种基板和有源层制作工艺的步骤流程图;
图9示出了本申请一实施例提供的一种基板和有源层制作工艺中完成基板制作后的剖面结构示意图。
具体实施方式
为使本发明的上述目的、特征和优点能够更加明显易懂,下面结合附图和具体实施方式对本发明作进一步详细的说明。
参照图1,示出了相关技术中薄膜晶体管的剖面结构示意图。由于薄膜晶体管TFT的有源层11的材料极容易被酸性或者碱性的刻蚀液损伤,这就要求在沉积源电极12a和漏电极12b前,在有源层11上沉积一层刻蚀阻挡层13,防止后续刻蚀工艺中的刻蚀液对有源层11造成损伤。另外,为了保证TFT器件的稳定性,防止外界的水氧对有源层11损伤,还要在源电极12a和漏电极12b制作完成后沉积一层钝化层14。由于刻蚀阻挡层13和钝化层14是分别通过等离子体增强化学气相沉积(PECVD)设备形成,工艺相对比较复杂且设备运行成本高。
为了解决上述问题,本申请一实施例提供了一种薄膜晶体管的制备方法,参照图2,该制备方法可以包括:
步骤201:提供基板,并在基板上形成有源层。
参照图3示出了完成有源层制作的剖面结构示意图。基板31可以包括玻璃基板或柔性基板等,通过曝光、显影、刻蚀等一系列构图工艺在基板31上可以形成有源层32。
步骤202:在基板以及有源层上形成金属层。
参照图4示出了完成金属层制作的剖面结构示意图。例如可以在基板31以及有源层32上通过溅射或沉积等方式形成金属层41。金属层41的材料例如可以是Al或Al:Nd合金等可以作为源电极和漏电极的材料。
步骤203:对金属层进行处理,形成源电极、漏电极以及金属氧化物层,金属氧化物层覆盖源电极、漏电极和有源层,金属氧化物层将源电极和漏电极相互绝缘。
参照图5示出了完成源电极、漏电极以及金属氧化物层制作的剖面结构示意图。对金属层41进行处理并同步形成源电极51a、漏电极51b和金属氧化物层52的方式有多种,例如可以对金属层41依次进行刻蚀和氧化形成源电极51a、漏电极51b和金属氧化物层52。后续实施例会对源电极51a、漏电极51b和金属氧化物层52的具体制作工艺进行详细介绍。
由于源电极51a、漏电极51b以及金属氧化物层52是在对金属层41进行处理的过程中同步形成的,因此金属氧化物层52的材料可以为源电极51a和漏电极51b金属的氧化物,例如当源电极51a和漏电极51b金属为Al时,金属氧化物层52的材料可以为Al2O3;并且,金属氧化物层52的厚度可以小于或等于金属层41的厚度。
本实施例提供薄膜晶体管的制备方法,通过对金属层进行处理从而同步形成源电极、漏电极和金属氧化物层,金属氧化物层既可以防止有源层在后续刻蚀工艺中被刻蚀液损伤,还可以防止外界的水氧对有源层造成损伤,因此,金属氧化物层的制备可以取代现有的刻蚀阻挡层和钝化层的制备,也就是无需再通过PECVD设备分步形成刻蚀阻挡层和钝化层,从而简化制备工艺、降低成本。
为了使源电极51a和漏电极51b之间绝缘,金属氧化物层是绝缘的。
在本实施例的一种实现方式中,参照图6,上述步骤203可以进一步包括:
步骤601:对有源层上的金属层进行刻蚀,刻蚀深度小于第一厚度,第一厚度为金属层的厚度。
参照图7示出了完成金属层刻蚀的剖面结构示意图。本步骤例如可以首先在金属层41上涂布光刻胶,通过掩膜版对光刻胶进行曝光和显影,然后再对有源层32上的金属层进行刻蚀。此步骤还可以同时对基板31上的金属层进行刻蚀,基板31上的金属层刻蚀深度可以与有源层32上的金属层刻蚀深度相同或不相同。
在实际应用中,刻蚀深度可以通过在曝光过程中采用灰度掩膜版来控制,还可以在刻蚀过程中通过刻蚀时长以及刻蚀液浓度来控制。
为了避免在刻蚀过程中刻蚀液对有源层32产生影响,有源层32上的金属层刻蚀深度d1必须小于步骤202中形成的金属层41的厚度即第一厚度h,这样有源层32上刻蚀剩余的金属层可以对有源层32形成保护,防止刻蚀液与有源层32直接接触损伤有源层32,起到刻蚀阻挡层的作用,因此本实施例提供的薄膜晶体管的制备方法中不需要额外沉积刻蚀阻挡层,简化工艺的同时降低成本。
在实际应用中,该步骤可以进一步包括:对有源层32上预设区域内的金属层进行刻蚀,预设区域在基板31上的正投影位于有源层32在基板31上的正投影范围内。
具体的,有源层32在基板31上的正投影覆盖预设区域在基板31上的正投影。预设区域的设定是为了确保有源层32边缘的金属层不被刻蚀,以便后续工艺形成与有源层32搭接的源电极和漏电极。
步骤602:对刻蚀后的金属层进行氧化处理,形成源电极、漏电极以及金属氧化物层。
具体的,对刻蚀剩余的金属层进行氧化处理,使位于有源层32边缘即非预设区域内的金属层表面部分氧化为金属氧化物层,没有氧化的金属层作为源电极51a和漏电极51b,因此,有源层32上非预设区域内的金属氧化物层d3的厚度小于第一厚度h;同时有源层32上预设区域内的刻蚀剩余的金属层需要全部氧化为金属氧化物,以使源电极51a和漏电极51b之间绝缘,因此,预设区域内的金属氧化物层厚度d2也小于第一厚度h。即有源层32上金属氧化物层的厚度小于第一厚度h,参照图5所示。此步骤还可以同时对基板31上剩余的金属层进行氧化处理,基板31上的金属层可以仅表面部分形成金属氧化物层,也可以全部形成金属氧化物层(如图5所示),本申请对此不作限定。
在实际应用中,对有源层32或基板31上的金属层进行氧化处理可以包括阳极氧化处理或热氧化处理等。当采用阳极氧化处理金属层时,阳极氧化液的配比可以为酒石酸铵:乙二醇:水=2:68:30,电解质浓度为0.12mol/L,PH值为6.43。具体氧化过程可以包括恒流过程和恒压过程。在恒流过程中,设定起始氧化电流密度j=0.5mA/cm2,当达到最大氧化电压Vc=100V时恒流过程结束;当恒流过程结束后开始进行恒压过程,设置氧化电压Vc=100V,阳极氧化的时间控制在1.5小时左右,结束电流大约为6-9μA。需要注意的是,阳极氧化处理过程中的具体参数可以根据实际情况进行调整,本申请对具体参数不作限定。
当采用热氧化工艺处理金属层时,可以直接在氧气氛围下对有源层32或基板31上的金属层进行加热,加热温度可以在200-350℃之间,具体加热时间以及加热温度可以根据实际需求确定,本申请对此不作限定。
在本申请另一实施例中,参照图8和图9,上述步骤201可以进一步包括:
步骤801:提供衬底。
具体的,衬底311可以是玻璃基板或柔性衬底。
步骤802:在衬底上依次形成栅极和栅极绝缘层。
具体的,可以通过曝光、显影、刻蚀等一系列构图工艺在衬底311上依次形成栅极312和栅极绝缘层313。
步骤803:在栅极绝缘层背离衬底的一侧形成有源层。
具体的,可以通过曝光、显影、刻蚀等一系列构图工艺在栅极绝缘层313背离衬底311的一侧形成有源层32。
本申请另一实施例中还提供了一种薄膜晶体管,参照图5,该薄膜晶体管可以包括:基板31以及设置在基板31上的有源层32;设置在基板31以及有源层32上的源电极51a和漏电极51b,源电极51a、漏电极51b和有源层32上覆盖有金属氧化物层52;其中,金属氧化物层52的材料为源电极51a和漏电极51b金属的氧化物,金属氧化物层52将源电极51a和漏电极51b相互绝缘。
具体的,当源电极51a和漏电极51b的材料为Al或Al:Nd合金时,金属氧化物层52的材料为Al或Al:Nd合金的氧化物。需要注意的是,源电极51a、漏电极51b和金属氧化物层52并不仅限于这两种,凡是能够作为源电极51a和漏电极51b的导电金属材料均在本实施例的保护范围之内。
本实施例中的薄膜晶体管可以是上述任一制备方法实施例制备得到的薄膜晶体管。
为了使源电极51a和漏电极51b之间绝缘,要求设置在有源层32上的金属氧化物层52是绝缘的。
在另一实施例中,参照图9,基板31可以进一步包括衬底311以及设置在衬底311上的栅极312和栅极绝缘层313;有源层32设置在栅极绝缘层313背离衬底311的一侧。其中,衬底311可以是玻璃基板或柔性衬底。
本申请另一实施例中还提供了一种阵列基板,该阵列基板可以包括上述任一实施例所述的薄膜晶体管。
本申请另一实施例中还提供了一种显示装置,该显示装置可以包括上述的阵列基板。
需要说明的是,本实施例中的显示装置可以为:显示面板、电子纸、手机、平板电脑、电视机、笔记本电脑、数码相框、导航仪等任何具有显示功能的产品或部件。
本申请实施例提供了一种薄膜晶体管及其制备方法、阵列基板和显示装置,其中薄膜晶体管的制备方法:提供基板,并在基板上形成有源层;在基板以及有源层上形成金属层;对金属层进行处理,形成源电极、漏电极以及金属氧化物层,金属氧化物层覆盖源电极、漏电极和有源层,金属氧化物层将源电极和漏电极相互绝缘。通过对金属层进行处理从而同步形成源电极、漏电极和金属氧化物层,金属氧化物层既可以防止有源层在后续刻蚀工艺中被刻蚀液损伤,还可以防止外界的水氧对有源层造成损伤,因此,金属氧化物层的制备可以取代现有的刻蚀阻挡层和钝化层的制备,也就是无需再通过PECVD设备分步形成刻蚀阻挡层和钝化层,从而简化制备工艺、降低成本。
本说明书中的各个实施例均采用递进的方式描述,每个实施例重点说明的都是与其他实施例的不同之处,各个实施例之间相同相似的部分互相参见即可。
最后,还需要说明的是,在本文中,诸如第一和第二等之类的关系术语仅仅用来将一个实体或者操作与另一个实体或操作区分开来,而不一定要求或者暗示这些实体或操作之间存在任何这种实际的关系或者顺序。而且,术语“包括”、“包含”或者其任何其他变体意在涵盖非排他性的包含,从而使得包括一系列要素的过程、方法、商品或者设备不仅包括那些要素,而且还包括没有明确列出的其他要素,或者是还包括为这种过程、方法、商品或者设备所固有的要素。在没有更多限制的情况下,由语句“包括一个……”限定的要素,并不排除在包括所述要素的过程、方法、商品或者设备中还存在另外的相同要素。
以上对本发明所提供的一种薄膜晶体管及其制备方法、阵列基板和显示装置进行了详细介绍,本文中应用了具体个例对本发明的原理及实施方式进行了阐述,以上实施例的说明只是用于帮助理解本发明的方法及其核心思想;同时,对于本领域的一般技术人员,依据本发明的思想,在具体实施方式及应用范围上均会有改变之处,综上所述,本说明书内容不应理解为对本发明的限制。
Claims (9)
1.一种薄膜晶体管的制备方法,其特征在于,所述制备方法包括:
提供基板,并在所述基板上形成有源层;
在所述基板以及所述有源层上形成金属层;
对所述金属层进行处理,形成源电极、漏电极以及金属氧化物层,所述金属氧化物层覆盖所述源电极、所述漏电极和所述有源层,所述金属氧化物层将所述源电极和所述漏电极相互绝缘。
2.根据权利要求1所述的制备方法,其特征在于,所述对所述金属层进行处理,形成源电极、漏电极以及金属氧化物层的步骤,包括:
对所述有源层上的金属层进行刻蚀,刻蚀深度小于第一厚度,所述第一厚度为所述金属层的厚度;
对刻蚀后的金属层进行氧化处理,形成所述源电极、所述漏电极以及所述金属氧化物层。
3.根据权利要求2所述的制备方法,其特征在于,对所述有源层上的金属层进行刻蚀的步骤,包括:
对所述有源层上预设区域内的金属层进行刻蚀,所述预设区域在所述基板上的正投影位于所述有源层在所述基板上的正投影范围内。
4.根据权利要求2所述的制备方法,其特征在于,所述有源层上金属氧化物层的厚度小于所述第一厚度。
5.根据权利要求1所述的制备方法,其特征在于,所述提供基板,并在所述基板上形成有源层的步骤,包括:
提供衬底;
在所述衬底上依次形成栅极和栅极绝缘层;
在所述栅极绝缘层背离所述衬底的一侧形成有源层。
6.一种薄膜晶体管,其特征在于,所述薄膜晶体管包括:
基板以及设置在所述基板上的有源层;
设置在所述基板以及所述有源层上的源电极和漏电极,所述源电极、所述漏电极和所述有源层上覆盖有金属氧化物层;
其中,所述金属氧化物层的材料为所述源电极和所述漏电极金属的氧化物,所述金属氧化物层将所述源电极和所述漏电极相互绝缘。
7.根据权利要求6所述的薄膜晶体管,其特征在于,所述基板包括衬底以及设置在所述衬底上的栅极和栅极绝缘层;
所述有源层设置在所述栅极绝缘层背离所述衬底的一侧。
8.一种阵列基板,其特征在于,所述阵列基板包括权利要求6至7任一项所述的薄膜晶体管。
9.一种显示装置,其特征在于,所述显示装置包括权利要求8所述的阵列基板。
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