CN110718524B - 电子组件及电子设备 - Google Patents

电子组件及电子设备 Download PDF

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Publication number
CN110718524B
CN110718524B CN201910817423.5A CN201910817423A CN110718524B CN 110718524 B CN110718524 B CN 110718524B CN 201910817423 A CN201910817423 A CN 201910817423A CN 110718524 B CN110718524 B CN 110718524B
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China
Prior art keywords
temperature solder
solder layer
electronic component
low
pad
Prior art date
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CN201910817423.5A
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English (en)
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CN110718524A (zh
Inventor
周洋
龙浩晖
叶润清
方建平
王竹秋
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Huawei Technologies Co Ltd
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Huawei Technologies Co Ltd
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Priority to CN201910817423.5A priority Critical patent/CN110718524B/zh
Publication of CN110718524A publication Critical patent/CN110718524A/zh
Priority to CN202090000371.9U priority patent/CN216958013U/zh
Priority to EP20856813.9A priority patent/EP4016613A4/en
Priority to PCT/CN2020/108530 priority patent/WO2021036786A1/zh
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Publication of CN110718524B publication Critical patent/CN110718524B/zh
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    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/35—Mechanical effects
    • H01L2924/351—Thermal stress
    • H01L2924/3511—Warping
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/36—Material effects
    • H01L2924/365—Metallurgical effects
    • H01L2924/3651—Formation of intermetallics
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/04—Soldering or other types of metallurgic bonding
    • H05K2203/043—Reflowing of solder coated conductors, not during connection of components, e.g. reflowing solder paste
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/14—Related to the order of processing steps
    • H05K2203/1476—Same or similar kind of process performed in phases, e.g. coarse patterning followed by fine patterning

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)

Abstract

本申请提供一种电子组件及电子设备，涉及电子技术领域，用于解决电子元器件之间键合稳定性较低的问题。电子组件，包括:第一电子元器件，其第一有源面上具有至少一个第一焊盘；第二电子元器件，其第二有源面上具有至少一个第二焊盘，第二有源面与第一有源面相对设置；至少一个第一焊接部，一个第一焊接部位于一个第一焊盘和一个第二焊盘之间，且第一焊接部与位于其两侧的第一焊盘和第二焊盘键合；第一焊接部包括高温焊料层和低温焊料层；高温焊料层靠近第一焊盘设置，且与第一焊盘键合；低温焊料层靠近第二焊盘设置，且与第二焊盘键合；其中，低温焊料层的熔点低于高温焊料层的熔点，且构成低温焊料层的材料与构成高温焊料层的材料部分相同。

Description

电子组件及电子设备
技术领域
本申请涉及电子技术领域，尤其涉及一种电子组件及电子设备。
背景技术
随着电子技术的发展，电子设备不断向小型化、集成化、超薄化趋势发展，因此，对电子设备中的电子元器件键合工艺的要求越来越高。而电子设备中的电子元器件之间的键合效果，对电子设备的性能起到至关重要的作用。
在两个电子元器件键合时，如果采用熔融温度较高的高温焊料键合，会导致电子元器件翘曲或改变电子元器件性能，从而影响电子组件的可靠性。而如果采用键合温度较低的低温焊料键合，由于低温焊料脆性大，延展率低，使得低温焊料与电子元器件上的焊盘会形成强度较低的介面合金共化物(intermetallic compound，IMC)，导致电子元器件之间键合的可靠性较低。
因此，如何在不影响电子元器件性能的基础上，提高电子元器件之间键合的稳定性，成为本领域技术人员急需解决的技术问题。
发明内容
本申请实施例提供一种电子组件及电子设备，用于解决电子元器件之间键合稳定性较低的问题。
为达到上述目的，本实施例采用如下技术方案：
第一方面，提供一种电子组件，包括:第一电子元器件，其第一有源面上具有至少一个第一焊盘；第二电子元器件，其第二有源面上具有至少一个第二焊盘，第二有源面与第一有源面相对设置；至少一个第一焊接部，一个第一焊接部位于一个第一焊盘和一个第二焊盘之间，且第一焊接部与位于其两侧的第一焊盘和第二焊盘键合；第一焊接部包括高温焊料层和低温焊料层；高温焊料层靠近第一焊盘设置，且与第一焊盘键合；低温焊料层靠近第二焊盘设置，且与第二焊盘键合；其中，低温焊料层的熔点低于高温焊料层的熔点，且构成低温焊料层的材料与构成高温焊料层的材料部分相同，以使得低温焊料层通过原子扩散与高温焊料层键合。本申请实施例提供的电子组件中，高温焊料层与第一焊盘键合，键合界面上形成强度较高的IMC，并且低温焊料层和高温焊料层通过原子扩散键合，在键合的过程中不会形成IMC。可提高第一电子器件与第一焊接部键合的稳定性，从而提高电子组件的稳定性。
可选的，电子组件还包括至少一个第二焊接部；第二焊接部设置在第一焊接部靠近第二焊盘一侧，且与第二焊盘键合；低温焊料层的熔点低于第二焊接部的熔点，且构成低温焊料层的材料与构成第二焊接部的材料部分相同，以使得低温焊料层通过原子扩散与第二焊接部键合。本申请实施例提供的电子组件中，第二焊接部与第二焊盘键合，键合界面上形成强度较高的IMC，并且低温焊料层和第二焊接部通过原子扩散键合，在键合的过程中不会形成IMC。可提高第二电子器件与第二焊接部键合的稳定性，从而提高电子组件的稳定性。
可选的，高温焊料层与低温焊料层的键合界面为平面；构成高温焊料层的材料为金属单质。可通过电镀工艺形成高温焊料层，工艺简单。
可选的，高温焊料层与低温焊料层的键合界面为中心向第一焊盘所在侧凹陷的曲面；构成高温焊料层的材料为金属合金。对高温焊料层的材料要求较低，可以使市面上常用的高温焊料。
可选的，第一焊盘在第一电子元器件上的正投影位于第二焊盘在第一电子元器件上的正投影内。这种结构下，第一焊盘和第二焊盘的正对面积较大，键合效果较好。
可选的，沿垂直于第一焊盘的方向，低温焊料层的厚度为50-100um。低温焊料层的厚度太薄时，会影响低温焊料层与高温焊料层和第二焊接部的键合效果，而低温焊料层的厚度太厚时，不利于通过钢网涂刷焊膏的方式制备。
可选的，沿垂直于第一焊盘的方向，高温焊料层或第二焊接部的厚度为10-100um。通过对电子组件进行跌落仿真分析，在距离第一焊盘和第二焊盘在10um以内的位置处，第一焊接部和第二焊接部受到的应力比较大。而第一焊接部和第二焊接部的厚度太大时，不利于通过钢网涂刷焊膏的方式制备。
可选的，第二焊接部为设置在第二焊盘上的微凸点。本申请实施例提供的电子组件也适用于BGA器件的键合。
可选的，电子组件还包括位于第一电子元器件和第二电子元器件之间的底部填充胶层；底部填充胶层与第一有源面和第二有源面分别粘接，且围绕在第一焊接部和第二焊接部的外围，并与第一焊接部和第二焊接部粘接。通过在第一电子元器件和第二电子元器件之间填充底部填充胶层，底部填充胶层与第一焊接部和第二焊接部粘接，可以对第一焊接部和第二焊接部起到保护和稳固作用，以进一步提高第一电子元器件和第二电子元器件键合的稳定性。
第二方面，提供一种电子组件的制备方法，电子组件包括第一电子元器件和第二电子元器件；第一电子元器件的第一有源面上具有至少一个第一焊盘；第二电子元器件的第二有源面上具有至少一个第二焊盘，第二有源面与第一有源面相对设置；电子组件的制备方法包括：在第一电子元器件的每一第一焊盘上形成与第一焊盘键合的高温焊料层；在高温焊料层与第二焊盘之间放置低温焊料；将低温焊料，与高温焊料层和第二焊盘分别通过原子扩散键合，形成低温焊料层；键合后的高温焊料层和低温焊料层作为第一焊接部，以使第一电子元器件和第二电子元器件键合；其中，低温焊料层的熔点低于高温焊料层的熔点，且构成低温焊料层的材料与构成高温焊料层的材料部分相同。
可选的，构成高温焊料层的材料为金属合金；在第一电子元器件的每一第一焊盘上形成与第一焊盘键合的高温焊料层，包括：在第一电子元器件的每一第一焊盘上放置第一高温焊料；将第一高温焊料与第一焊盘键合，以形成与第一焊盘键合的高温焊料层。
可选的，构成高温焊料层的材料为金属单质；在第一电子元器件的每一第一焊盘上形成与第一焊盘键合的高温焊料层，包括：通过电镀工艺，在第一电子元器件的第一焊盘上形成与第一焊盘键合的高温焊料层。可选的，在高温焊料层与第二焊盘之间放置低温焊料，包括：在高温焊料层上放置低温焊料。
可选的，在高温焊料层与第二焊盘之间放置低温焊料，包括：在第二焊盘上放置低温焊料。
可选的，在将低温焊料，与高温焊料层和第二焊盘分别通过原子扩散键合之前，电子组件的制备方法还包括：将第一电子元器件和第二电子元器件对位贴合，以使低温焊料分别与高温焊料层和第二焊盘贴合。
可选的，将低温焊料，与高温焊料层和第二焊盘分别通过原子扩散键合之前，电子组件的制备方法还包括：在第二电子元器件的每一第二焊盘上形成与第二焊盘键合的第二焊接部；低温焊料层的熔点低于第二焊接部的熔点，且构成低温焊料层的材料与构成第二焊接部的材料部分相同；将低温焊料与第二焊盘通过原子扩散键合，包括：将低温焊料与第二焊接部通过原子扩散键合。
可选的，构成第二焊接部的材料为金属合金；在第二电子元器件的每一第二焊盘上形成与第二焊盘键合的第二焊接部，包括：在第二电子元器件的每一第二焊盘上放置第二高温焊料；将第二高温焊料与第二焊盘键合，以形成与第二焊盘键合的第二焊接部。
可选的，构成第二焊接部的材料为金属单质；在第二电子元器件的每一第二焊盘上形成与第二焊盘键合的第二焊接部，包括：通过电镀工艺，在第二电子元器件的第二焊盘上形成与第二焊盘键合的第二焊接部。
可选的，在高温焊料层与第二焊盘之间放置低温焊料，包括：在第二焊接部上放置低温焊料。
可选的，在将低温焊料与第二焊接部通过原子扩散键合之前，电子组件的制备方法还包括：将第一电子元器件和第二电子元器件对位贴合，以使低温焊料分别与高温焊料层和第二焊接部贴合。
第三方面，提供一种电子设备，包括第一方面任一项的电子组件。
附图说明
图1为本申请实施例提供的一种电子设备的结构示意图；
图2a为本申请实施例提供的一种电子组件的结构示意图；
图2b为本申请实施例提供的另一种电子组件的结构示意图；
图3a为本申请实施例提供的一种沿图2a中A-A′向的剖视示意图；
图3b为相关技术中第一电子元器件和第二电子元器件的键合结构示意图；
图4为本申请实施例提供的一种电子组件的第一焊接部的受力分布图；
图5为本申请实施例提供的另一种沿图2a中A-A′向的剖视示意图；
图6a-图6g为本申请实施例提供的第一焊盘和第二焊盘的大小关系示意图；
图7a-图7f为本申请实施例提供的一种第一焊盘的形状示意图；
图8a为本申请实施例提供的一种第一电子元器件和第二电子元器件的键合过程的流程图；
图8b为本申请实施例提供的另一种第一电子元器件和第二电子元器件的键合过程的流程图；
图9a-图9h为本申请实施例提供的一种电子组件的键合过程的示意图；
图10a-图10c为本申请实施例提供的一种高温焊料层与低温焊料层的键合界面的示意图；
图11a-图11d为本申请实施例提供的一种低温焊料层的侧面的示意图；
图12为本申请实施例提供的另一种电子组件的键合过程的流程图；
图13a-图13d为本申请实施例提供的另一种电子组件的键合过程的示意图；
图14为本申请实施例提供的一种电子组件的第一焊接部和第二焊接部的受力分布图；
图15为本申请实施例提供的又一种沿图2a中A-A′向的剖视示意图；
图16为本申请实施例提供的又一种沿图2a中A-A′向的剖视示意图；
图17a为本申请实施例提供的又一种电子组件的键合过程的流程图；
图17b-图17c为本申请实施例提供的又一种电子组件的键合过程的示意图；
图18为本申请实施例提供的又一种沿图2a中A-A′向的剖视示意图；
图19为本申请实施例提供的又一种沿图2a中A-A′向的剖视示意图。
附图标记：
1-电子设备；2-显示模组；3-中框；4-壳体；5-盖板；100-电子组件；10-第一电子元器件；11-第一焊盘；20-第二电子元器件；21-第二焊盘；30-第一焊接部；31-高温焊料层；32-低温焊料层；40-第二焊接部；G1-第一高温焊料，G2-第二高温焊料；D-低温焊料；50-钢网；51-开口部；52-遮挡部；60-底部填充胶层。
具体实施方式
除非另作定义，本申请使用的技术术语或者科学术语应当为本领域技术人员所理解的通常意义。本申请说明书以及权利要求书中使用的术语“第一”、“第二”、“第三”以及类似的词语并不表示任何顺序、数量或者重要性，而只是用来区分不同的组成部分。由此，限定有“第一”、“第二”、“第三”的特征可以明示或者隐含地包括一个或者更多个该特征。在本申请实施例的描述中，除非另有说明，“多个”的含义是两个或两个以上。
“左”、“右”、“上”以及“下”等方位术语是相对于附图中的部件示意放置的方位来定义的，应当理解到，这些方向性术语是相对的概念，它们用于相对于的描述和澄清，其可以根据部件所放置的方位的变化而相应地发生变化。
本申请实施例提供一种电子设备。该电子设备可以为手机、电视、显示器、平板电脑、车载电脑等具有显示界面的终端设备，或者为智能手表、智能手环等智能显示穿戴设备，或者为服务器、存储器、基站等通信设备，或者为智能汽车等。本申请实施例对上述电子设备的具体形式不做特殊限制。以下实施例为了方便说明，均是以电子设备为手机为例进行举例说明。
在此情况下，如图1所示，电子设备1主要包括显示模组2、中框3、壳体(或者称为电池盖、后壳)4以及盖板5。
显示模组2具有能够看到显示画面的出光侧和与上述出光侧相对设置的背面，显示模组2的背面靠近中框3，盖板5设置在显示模组2的出光侧。
上述显示模组2，包括显示屏(display panel，DP)。
在本申请的一种可能的实施例中，显示模组2为液晶显示模组。在此情况下，上述显示屏为液晶显示屏(liquid crystal display，LCD)。基于此，显示模组2还包括位于液晶显示屏背面(远离LCD用于显示画面的一侧表面)的背光模组(back light unit，BLU)。
背光模组可以向液晶显示屏提供光源，以使得液晶显示屏中的各个亚像素(subpixel)能够发光以实现图像显示。
或者，在本申请的另一种可能的实施例中，显示模组2为有机发光二极管显示模组。在此情况下，上述显示屏为有机发光二极管(organic light emitting diode，OLED)显示屏。由于OLED显示屏中每个亚像素内设置有电致发光层，所以可以使得OLED显示屏在接收到工作电压后，实现自发光。在此情况下，具有OLED显示屏的显示模组2中无需再设置上述背光模组。
盖板5位于显示模组2远离中框3一侧，盖板5例如可以是盖板玻璃(cover glass，CG)，该盖板玻璃可以具有一定的韧性。
中框3位于显示模组2和壳体4之间，中框3远离显示模组2的表面用于安装电池、印刷电路板(printed circuit board，PCB)、摄像头(camera)、天线等内部元件。壳体4与中框3盖合后，上述内部元件位于壳体4与中框3之间。
上述电子设备1还包括设置于PCB上的主板，PCB用于承载主板，并于主板键合，以实现主板对电子设备1中各部件的控制。主板，例如可以是中央处理器(centralprocessing unit，CPU)。主板与PCB的键合稳定性，对电子设备1的性能起到至关重要的作用，例如主板与PCB键合位置处断裂，导致主板与PCB信号中断，从而导致电子设备1损坏。
当然，电子设备1中有多种电子元器件之间键合的地方，例如用于指纹识别的指纹模组与柔性电路板(flexible printed circuit，FPC)键合，FPC与PCB键合，以实现电子设备1的指纹识别功能。或者，例如，系统级芯片(system on chip，SOC)中的多种功能的芯片之间的键合，以完成系统级封装(system in a package，SIP)。或者，例如，SOC与PCB的键合、电源模块与PCB的键合、封装器件与PCB的键合等等。
其中，根据电子元器件中用于与其他器件键合的结构的不同，可将电子元器件分为栅格阵列封装(land grid array，LGA)器件和焊球阵列封装(ball grid array，BGA)器件。LGA器件通过焊盘与其他器件键合，BGA器件通过焊球与其他器件键合。
基于此，为了提高电子设备1中电子元器件之间的键合稳定性，从而保证电子设备1的性能。如图2a所示，本申请实施例提供一种电子组件100，包括:第一电子元器件10和第二电子元器件20。
此处，第一电子元器件10和第二电子元器件20可以是电子设备1中任意具有电信号传导功能的部件，例如，可以为连接器、电子变压器、继电器、激光器件、PCB、FPC、集成电路(或称为芯片)、封装器件、生物特征识别模组、处理器、存储器、电源模块等。
在一种可能的实施例中，如图2a所示，例如第一电子元器件10为PCB，第二电子元器件20为处理器。在这种情况下，由于PCB的面积比较大，因此，第一电子元器件10除了可以与处理器键合外，还可以与其他第二电子元器件20键合。当然，与不同第二电子元器件20键合的第一焊盘11的形状和大小可以不同。其中，处理器可以是LGA器件，即，通过焊盘与PCB键合。处理器也可以是BGA器件，即，通过焊球与PCB键合。
在另一种可能的实施例中，如图2b所示，例如第一电子元器件10和第二电子元器件20均为裸芯片(die)。在这种情况下，第一电子元器件10和第二电子元器件20的大小相等，因此，第一电子元器件10和第二电子元器件20一对一键合。
如图3a(沿图2a中A-A′向的剖视图)所示，第一电子元器件10的第一有源面a上具有至少一个第一焊盘11，图3a中以第一电子元器件10的第一有源面a上具有多个第一焊盘11为例进行说明。
其中，电子元器件的有源面是指电子元器件设置有焊盘，且通过焊盘与其他器件电连接，以实现信号交互的一面。
第二电子元器件20的第二有源面b上具有至少一个第二焊盘21，第二电子元器件20的第二有源面b与第一电子元器件10的第一有源面a相对设置。
示例的，第一焊盘11和第二焊盘21的材料为铜(Cu)等金属单质。
如图3a所示，电子组件100还包括至少一个第一焊接部30，一个第一焊接部30位于一个第一焊盘11和一个第二焊盘21之间，且第一焊接部30与位于其两侧的第一焊盘11和第二焊盘21键合(bonding)。
键合，是指将两种同质或者异质材料结果表面处理，在一定条件下直接结合，使两者材料实现电学或机械互连的一种工艺。本申请实施例中，例如可以通过焊接工艺达到键合效果。第一焊接部30的数量，与第一焊盘11和第二焊盘21的数量相关，每一组相对设置的第一焊盘11和第二焊盘21通过一个第一焊接部30键合。
如图3a所示，第一焊接部30包括高温焊料层31和低温焊料层32。高温焊料层31靠近第一焊盘11设置，且高温焊料层31与第一焊盘11键合。低温焊料层32靠近第二焊盘21设置，且低温焊料层32与第二焊盘21键合。
关于低温焊料层32与第二焊盘21的键合过程，在一种可能的实施例中，在第一焊盘11上形成与第一焊盘11键合的高温焊料层31后，再在高温焊料层31上放置低温焊料。然后，将第一电子元器件10和第二电子元器件20对位贴合，以使低温焊料位于高温焊料层31与第二焊盘21之间。最后，将低温焊料，与高温焊料层31和第二焊盘21分别通过原子扩散键合，形成分别与第二焊盘21和高温焊料层31键合的低温焊料层32。键合后的高温焊料层31和低温焊料层32作为上述第一焊接部30，以使第一电子元器件10和第二电子元器件20键合。
关于低温焊料层32与第二焊盘21的键合过程，在另一种可能的实施例中，在第一焊盘11上形成与第一焊盘11键合的高温焊料层31后，再在第二焊盘21上放置低温焊料。然后，将第一电子元器件10和第二电子元器件20对位贴合，以使低温焊料位于高温焊料层31与第二焊盘21之间。最后，将低温焊料，与高温焊料层31和第二焊盘21分别通过原子扩散键合，形成分别与第二焊盘21和高温焊料层31键合的低温焊料层32。键合后的高温焊料层31和低温焊料层32作为上述第一焊接部30，以使第一电子元器件10和第二电子元器件20键合。与前述实施例中低温焊料层32与第二焊盘21的键合过程，不同之处在于低温焊料放置在第二焊盘21上。
其中，低温焊料层32可以与第二焊盘21直接接触键合，也可以通过其他部件键合。
低温焊料层32的熔点低于高温焊料层31的熔点，且构成低温焊料层32的材料与构成高温焊料层31的材料部分相同，以使得低温焊料层32通过原子扩散与高温焊料层31键合。
本申请实施例中低温焊料层32的熔点相对于高温焊料层31的熔点较低，但对于低温焊料层32的熔点的范围，不做限定。在选取低温焊料层32的材料时，保证键合可靠性满足要求的情况下，使低温焊料层32的熔点尽可能的低即可。
其中，高温焊料层31的材料可以是金属合金，高温焊料层31的材料也可以是金属单质。
构成低温焊料层32的材料与构成高温焊料层31的材料部分相同，可以理解为，在第一高温材料层311的材料为金属合金的情况下，构成低温焊料层32的材料与构成高温焊料层31的材料的主体材料相同，参杂的材料不同。
例如，在一种可能的实施例中，高温焊料层31的材料为锡合金。高温焊料层31的材料为在主体材料锡(Sn)中掺杂银(Ag)、锑(Sb)、铅(Pb)等金属，低温焊料层32的材料为在主体材料锡中掺杂铋(Bi)、铟(In)、镉(Cd)等金属。高温焊料层31的材料中的主体材料和低温焊料层32的材料中的主体材料相同，参杂的材料不同。
构成低温焊料层32的材料与构成高温焊料层31的材料部分相同，也可以理解为，在第一高温材料层311的材料为金属单质的情况下，低温焊料层32的材料，其主体材料为构成第一高温材料层311的金属单质，在主体材料中还参杂有其他金属材料。
例如，在另一种可能的实施例中，高温焊料层31的材料为银单质，低温焊料层32的材料为主体材料银中参杂有铜、锡、镍(Ni)、锌(Zn)、硼(B)(例如BAg40CuZnSnNi)。
这样一来，由于构成低温焊料层32的材料与构成高温焊料层31的材料部分相同，因此高温焊料层31和低温焊料层32的材料的热膨胀系数(coefficient of thermalexpansion，CTE)和弹性模量(modulus)均相近。在键合过程中，高温焊料层31和低温焊料层32中都包含的原子会发生扩散，使得高温焊料层31和低温焊料层32通过原子扩散键合。
基于本申请实施例提供的电子组件100，通过在低温焊料层32与第一焊盘11之间设置高温焊料层31，使高温焊料层31与第一焊盘11直接键合。由于高温焊料的延展率比低温焊料的延展率高，因此，高温焊料没有低温焊料脆性高，不易断裂。基于此，高温焊料层31与第一焊盘11键合时形成的介面合金共化物(intermetallic compound，IMC)的强度，高于图3b所示的低温焊料层32与第一焊盘11直接键合时形成的IMC的强度。
在此基础上，由于构成低温焊料层32的材料与构成高温焊料层31的材料部分相同，以使得低温焊料层32和高温焊料层31在键合的过程中，是通过原子扩散实现低温焊料层32与高温焊料层31键合。因此，低温焊料层32和高温焊料层31在键合的过程中不会形成IMC，低温焊料层32和高温焊料层31键合后的稳定性较高。
因此，将第一电子元器件10与第二电子元器件20键合时，相比图3b所示的直接采用低温焊料层32与第一焊盘11键合，键合界面上形成强度低的IMC。本申请实施例提供的电子组件100中，高温焊料层31与第一焊盘11键合，键合界面上形成强度较高的IMC，并且低温焊料层32和高温焊料层31通过原子扩散键合，在键合的过程中不会形成IMC。可提高第一电子器件10与第一焊接部30键合的稳定性，从而提高电子组件100的稳定性。
此外，如图4所示，通过应力分析可知，电子组件100在受到外界作用力(例如撞击、跌落、震动)时，第一焊接部30与第一焊盘11和第二焊盘21接触面的边缘位置处(图4中黑色方块处)的受力较大。本申请实施例中，通过设置高温焊料层31后，使高温焊料层31位于受应力较大的位置处。由于高温焊料的可靠性比低温焊料的可靠性高，因此，相比图3b所示的直接使低温焊料层32位于受应力较大位置处，本申请实施例提供的第一焊接部30的结构可进一步提高第一电子器件10与第一焊接部30键合的稳定性。
以下，以几个详细的实施例对本申请实施例提供的电子组件100的结构进行详细说明。
实施例一
以第一电子元器件10为PCB，第二电子元器件20为LGA器件为例进行说明。
如图5(沿图2a中A-A′向的剖视图)所示，电子组件100包括：第一电子元器件10、第二电子元器件20、至少一个第一焊接部30以及至少一个第二焊接部40。
第一电子元器件10的第一有源面a和第二电子元器件20的第二有源面b相对设置，且第一电子元器件10上的第一焊盘11在第一电子元器件10上的正投影与第二电子元器件20上的第二焊盘21在第一电子元器件10上的正投影交叠。
其中，此处的交叠，可以是，如图5所示，第一焊盘11和第二焊盘21大小相同，且正对设置。如图6a所示，从俯视图上来看，第一焊盘11的正投影和第二焊盘21的正投影重合。
此处的交叠，也可以是，如图6b所示，第一焊盘11和第二焊盘21大小相同，但错位设置。如图6c所示，从俯视图上来看，第一焊盘11的正投影和第二焊盘21的正投影具有交集，且第一焊盘11和第二焊盘21是一一对应。
此处的交叠，还可以是，如图6d所示，第一焊盘11的尺寸小于第二焊盘21的尺寸。如图6e所示，从俯视图上来看，第一焊盘11的正投影位于第二焊盘21的正投影内。
此处的交叠，还可以是，如图6f所示，第一焊盘11的尺寸大于第二焊盘21的尺寸。如图6g所示，从俯视图上来看，第二焊盘21的正投影位于第一焊盘11的正投影内。
此外，不对第一焊盘11和第二焊盘21的形状做限定，可以是任意形状的封闭图形。第一焊盘11和第二焊盘21的形状可以相同，也可以不同。
以第一焊盘11为例，例如，在一些可能的实施例中，第一焊盘11的形状可以是如图7a中的圆形，或者是如图7b中的椭圆形，或者是如图7c中的三角形，或者是如图7d中的长方形，或者是如图6a中的正方形，或者是如图7e中的五边形等规则图形。在另一些可能的实施例中，第一焊盘11的形状可以是如图7f中的不规则图形。
如图5所示，对应设置的第一焊盘11和第二焊盘21之间设置有第一焊接部30和第二焊接部40，第一焊接部30靠近第一焊盘11设置，第二焊接部40靠近第二焊盘21设置。
第一焊接部30包括高温焊料层31和低温焊料层32。高温焊料层31靠近第一焊盘11设置，且与第一焊盘11键合。低温焊料层32靠近第二焊接部40设置，且与第二焊接部40键合。第二焊接部40还与第二焊盘21键合。
其中，低温焊料层32的熔点低于高温焊料层31和第二焊接部40的熔点。构成低温焊料层的材料与构成高温焊料层31的材料部分相同，以使得低温焊料层32通过原子扩散与高温焊料层31键合。且构成低温焊料层的材料与构成第二焊接部40的材料部分相同，以使得低温焊料层32通过原子扩散与第二焊接部40键合。构成高温焊料层31的材料与构成第二焊接部40的材料可以相同，也可以不同。
可以理解的是，根据高温焊料层31的选材不同，制备高温焊料层31的工艺不同，高温焊料层31与第一焊盘11的键合工艺也不同，高温焊料层31与低温焊料层32的焊接界面的形状也不同。同理，不同的材料会形成不同的第二焊接部40。
以下，根据高温焊料层31和第二焊接部40的材料的选材不同，对第一电子元器件10和第二电子元器件20的键合过程进行举例示意。
在一种可能的实施例中，高温焊料层31和第二焊接部40的材料为金属合金，如图8a所示，第一电子元器件10和第二电子元器件20的键合过程如下：
S10、如图9a所示，在第一电子元器件10的每一第一焊盘11上放置第一高温焊料G1。
例如，首先，在第一电子元器件10上放置钢网50，钢网50的开口部51对应第一焊盘11，钢网50的遮挡部52对应相邻第一焊盘11之间的部分。然后，涂刷焊膏，使焊膏填充在钢网50的开口部51中。随后，去除钢网50，即可形成位于第一焊盘11上的第一高温焊料G1。
S11、如图9b所示，将第一高温焊料G1与第一焊盘11键合，以形成高温焊料层31。如图8a所示，步骤S11是在执行完步骤S10后执行的。
例如，根据第一高温焊料G1的回流温度曲线对应的温度，采用回流焊工艺，将第一高温焊料G1与第一焊盘11键合，以形成与第一焊盘11键合的第一高温焊料层31。
其中，在第一高温焊料G1的主体材料与第一焊盘11的材料不同时，例如，第一高温焊料G1的主体材料为锡，第一焊盘11的材料为铜，第一高温焊料G1与第一焊盘11的键合界面处会形成IMC。
S12、如图9c所示，在第二电子元器件20的每一第二焊盘21上放置第二高温焊料G2。
在第二焊盘21上放置第二高温焊料G2的方法，可以与在第一焊盘11上放置第一高温焊料G1的方法相同，可以参照步骤S10。
S13、如图9d所示，将第二高温焊料G2与第二焊盘21键合，以形成第二焊接部40。如图8a所示，步骤S13是在执行完步骤S12后执行的。
将第二高温焊料G2与第二焊盘21键合，以形成与第二焊盘21键合的第二焊接部40的方法，可以与将第一高温焊料G1与第一焊盘11键合的方法相同，可以参照步骤S11。
应当明白的是，上述步骤S10和步骤S12两者并没有先后顺序，可以是在同一时间段内同时执行这两个步骤，也可以是执行完步骤S10再执行步骤S12，还可以是执行完步骤S12后再执行步骤S10。
S14、如图9e所示，在高温焊料层31上放置低温焊料D。如图8a所示，步骤S14是在执行完步骤S11后执行的。
在高温焊料层31上放置低温焊料D的方法，可以与步骤S10中在第一焊盘11上放置第一高温焊料G1的方法相同。
或者，S14′、如图9f所示，在第二焊接部40上形成低温焊料D。如图8b所示，步骤S14′是在执行完步骤S13后执行的。
S15、如图9g所示，将第一电子元器件10和第二电子元器件20对位贴合。以使低温焊料D分别与高温焊料层31和第二焊接部40贴合。
其中，若执行步骤S14后，在高温焊料层31上放置了低温焊料D。如图9g所示，第一电子元器件10和第二电子元器件20对位贴合时，将第一电子元器件10正向放置好，第二电子元器件20从上方与第一电子元器件10对位贴合。
若执行步骤S14′后，在第二焊接部40上放置了低温焊料D。如图9h所示，第一电子元器件10和第二电子元器件20对位贴合时，将第二电子元器件20正向放置好，第一电子元器件10从上方与第二电子元器件20对位贴合。
此处，无论是执行上述步骤S14，还是执行上述步骤S14′，在执行步骤S15后低温焊料D是位于高温焊料层31和第二焊接部40之间的。
由于低温焊料D是放置在高温焊料层31上的，并未与其键合。因此，以图9h所示的结构为例，将放置有低温焊料D的第二电子元器件20作为基准，正向放置，未放置低温焊料D的第一电子元器件10从上方盖下来与第二电子元器件20对位贴合。可以避免低温焊料D因重力作用于第二焊接40部分离，保证键合的可靠性。
S16、如图5所示，将低温焊料D，与高温焊料层31和第二焊接部40分别通过原子扩散键合，形成低温焊料层32。
此时，键合后的高温焊料层32和低温焊料层31作为第一焊接部30，第一焊接部30和第二焊接部40通过原子扩散键合，以使第一电子元器件10和第二电子元器件20键合。
可以理解的是，由于低温焊料D的熔点低于高温焊料层31和第二焊接部40的熔点，因此，将低温焊料D与高温焊料层31和第二焊接部40键合时，加热温度低于步骤S11中第一高温焊料G1与第一焊盘11键合时的温度。也就是说，将低温焊料D与高温焊料层31和第二焊接部40键合时，低温焊料D会熔融，但高温焊料层31和第二焊接部40均未熔融。
需要说明的是，第一，现有技术中采用高温焊料将第一电子元器件10和第二电子元器件20键合时，高温环境下，第一电子元器件10和第二电子元器件20各自会有不同程度的受热变形。而由于第一电子元器件10和第二电子元器件20又键合在一起，因此第一电子元器件10和第二电子元器件20会受到来自对方的形变拉力，导致第一电子元器件10和第二电子元器件20翘曲变形。
而本申请实施例中，虽然第一高温焊料G1与第一焊盘11是在高温下键合，第二高温焊料G2与第二焊盘21也是在高温下键合。但是，以第一高温焊料G1与第一焊盘11键合为例，由于第一高温焊料G1与第一焊盘11键合时，是在第一电子元器件10的表面键合，只是自身会有受热变形这在第一电子元器件10的承受范围内，不会受到第二电子元器件20的作用力，因此发生翘曲变形的概率明显降低。
此外，以第一电子元器件10为例，当第一电子元器件10的非有源面上具有不耐高温的部件或膜层时，可以先在第一焊盘11上形成高温焊料层31后，再形成不耐高温的部件或膜层。例如，第一电子元器件10为表面高光制程指纹模组时，由于光膜不耐高温，可以在第一焊盘11上形成高温焊料层31后，再在形成光膜。
第二，由于第一高温焊料G1、第二高温焊料G2以及低温焊料D三种焊料比例差异、回流曲线差异、浸润性差异等工艺因素，会导致第二焊接部40与第一焊接部30的键合界面的形状以及第一焊接部30中高温焊料层31与低温焊料层32的键合界面的形状会有多种形态，因此，本申请实施例中，不对第一焊接部30和第二焊接部40纵向截面的形状和键合界面的形状进行限定。
其中，第二焊接部40与低温焊料层32的键合界面与第一焊接部30中高温焊料层31与低温焊料层32的键合界面的形状的形成原理相同，以第一焊接部30中高温焊料层31与低温焊料层32的键合界面的形状为例进行举例说明。可以理解的是，由于高温焊料层31与低温焊料层32是通过原子扩散键合的，因此，高温焊料层31与低温焊料层32的键合界面的形状即为高温焊料层31与第一焊盘11键合后的形状。
基于此，在一种可能的实施方式中，高温焊料层31与第一焊盘11通过焊接工艺达到键合的效果，在此情况下，如图10a所示，高温焊料层31与低温焊料层32的键合界面c为中心向第一焊盘11所在侧凹陷的曲面。
在另一种可能的实施方式中，高温焊料层31与第一焊盘11通过其他工艺达到键合的效果，在此情况下，如图10b所示，高温焊料层31与低温焊料层32的键合界面c为中心向远离第一焊盘11所在侧凸起的曲面。或者，如图10c所示，高温焊料层31与低温焊料层32的键合界面c为与第一焊盘11平行的平面。
此外，因低温焊料D的放置量的不同和工艺的误差，低温焊料层32的与键合界面c相交的侧面d的形状也会有多种形态。也就是说，低温焊料层32的垂直于第一电子元器件10的方向(纵向)上的截面会有多种形态。因此，本申请实施例中，不对低温焊料层32的侧面d的形状进行限定。
以下，对的低温焊料层32的与键合界面c相交的侧面d的形状，进行举例说明。
在一种可能的实施方式中，如图10b所示，低温焊料层32的侧面d为平面。
其中，根据第一焊盘11和第二焊盘21相对大小的不同，低温焊料层32的侧面d与第一焊盘11的夹角不同。如图10b所示，第一焊盘11和第二焊盘21大小相等的情况下，低温焊料层32的侧面d为垂直于第一焊盘11的平面。如图11a所示，第一焊盘11小于第二焊盘21的情况下，低温焊料层32的侧面d为与第一焊盘11的夹角大于90°的平面。如图11b所示，第一焊盘11大于第二焊盘21的情况下，低温焊料层32的侧面d为与第一焊盘11的夹角小于90°的平面。
在另一种可能的实施方式中，若低温焊料D的放置量较少，如图11c所示，低温焊料层32的侧面d为向内凹陷的曲面。
在另一种可能的实施方式中，若低温焊料D的放置量较多，如图11d所示，低温焊料层32的侧面d为向外凸起的曲面。
在另一种可能的实施例中，高温焊料层31的材料为金属单质。如图12所示，第一电子元器件10和第二电子元器件20的键合过程如下：
S20、如图13a所示，通过电镀工艺，在第一电子元器件10的第一焊盘11上形成与第一焊盘11键合的高温焊料层31。
其中，通过电镀工艺形成的高温焊料层31的远离第一焊盘11的表面(与低温焊料层32的键合界面c)为平行于第一焊盘11的平面。
S21、如图13b所示，通过电镀工艺，在第二电子元器件20的第二焊盘21上形成与第二焊盘21键合的第二焊接部40。
同理，通过电镀工艺形成的第二焊接部40的远离第二焊盘21的表面为平行于第二焊盘21的平面。
S22、在高温焊料层31或第二焊接部40上放置低温焊料D。图13c以在高温焊料层31上放置低温焊料D为例进行示意。
在高温焊料层31或第二焊接部40上放置低温焊料D的方法，可以与步骤S10中在第一焊盘11上放置第一高温焊料G1的方法相同。
S23、将第一电子元器件10和第二电子元器件20对位贴合。
S24、如图13d所示，将低温焊料D，与高温焊料层31和第二焊接部40分别通过原子扩散键合，形成低温焊料层32。键合后的高温焊料层31和低温焊料层32作为第一焊接部30，第一焊接部30和第二焊接部40通过原子扩散键合，以使第一电子元器件10和第二电子元器件20键合。
在此情况下，如图13d所示，第一电子元器件10和第二电子元器件20键合后，高温焊料层31与低温焊料层32的键合界面c为平行于第一焊盘11的平面。第二焊接部40与低温焊料层32的键合界面也为平行于第一焊盘11的平面。
低温焊料层32的侧面d的形状，可以参考上述关于图11a-图11d的描述。
在上述结构的基础上，如图14所示，电子组件在受到外界作用力(例如撞击、跌落、震动)时，第一焊接部30与第一焊盘11接触面的边缘位置处和第二焊接部40与第二焊盘21接触面的边缘位置处(图14中黑色方块处)的受力较大，为应力集中区，中间区域为低应力区。由于高温焊料的脆性比低温焊料的脆性小，即高温焊料的可靠性比低温焊料的可靠性高。因此，本申请实施例中，通过调整高温焊料层31的厚度，使高温焊料层31位于应力集中区，避免将低温焊料层32设置在应力集中区，以提高第一电子元器件10和第二电子元器件20键合的稳定性。
通过对电子组件100进行跌落仿真分析，在距离第一焊盘11和第二焊盘21在10um以内的位置处，第一焊接部30和第二焊接部40受到的应力比较大。而第一焊接部30和第二焊接部40的厚度太大时，不利于通过钢网涂刷焊膏的方式制备。基于此，在本申请的一些实施例中，高温焊料层31和第二焊接部40的厚度为10-100um。例如，高温焊料层31和第二焊接部40的厚度为20um、30um、40um、50um、60um、70um、80um、90um。其中，本申请实施例中部件的厚度，是指部件沿垂直于第一焊盘的方向上的尺寸。
此外，由于低温焊料层32的厚度太薄时，会影响低温焊料层32与高温焊料层31和第二焊接部40的键合效果，而低温焊料层32的厚度太厚时，不利于通过钢网涂刷焊膏的方式制备。基于此，在本申请的一些实施例中，低温焊料层32的厚度为50-100um。例如，低温焊料层32的厚度为60um、70um、80um、90um。
通过对电子组件100进行跌落仿真分析得到，第一焊接部30和第二焊接部40在图14所示的应力集中区的受力比低应力去的受力要大40％左右。也就是说，本申请实施例提供的结构，低温焊料层32承受的应力可减少40％左右。从而可保证第一电子元器件10和第二电子元器件20键合的稳定性，以提高电子设备01的寿命。
在图5所示的电子组件的基础上，如图15(沿图2a中A-A′向的剖视图)所示，电子组件还包括位于第一电子元器件10和第二电子元器件20之间的底部填充胶层(underfill)60。底部填充胶层60与第一电子元器件10的第一有源面a和第二电子元器件20的第二有源面b分别粘接，且底部填充胶层60围绕在第一焊接部30和第二焊接部40的外围，并与第一焊接部30和第二焊接部40粘接。
其中，底部填充胶层60的材料可以为热固化胶。
此处，通过在第一电子元器件10和第二电子元器件20之间填充底部填充胶层60，且底部填充胶层60与第一焊接部30和第二焊接部40粘接，可以对第一焊接部30和第二焊接部40起到保护和稳固作用，以进一步提高第一电子元器件10和第二电子元器件20键合的稳定性。
此外，本实施例中，第一焊接部30和第二焊接部40是由三层焊料层构成，且三层焊料的厚度都不会太薄，使得第一电子元器件10和第二电子元器件20之间的间隙较大。这样一来，形成底部填充胶层60时，胶受到的阻力小，胶的流动性较好。可以确保胶完全包裹每个由第一焊接部30和第二焊接部40构成的焊点，从而进一步提高第一电子元器件10和第二电子元器件20键合的稳定性。
实施例二
实施例二与实施例一的不同在于：第一电子元器件10为PCB，第二电子元器件20为BGA器件。
如图16(沿图2a中A-A′向的剖视图)所示，第二焊接部40为设置在第二焊盘21上的微凸点。在这种情况下，第二焊接部40属于第二电子元器件20中的部件，在第一电子元器件10和第二电子元器件20键合时，没有形成第二焊接部40的步骤。
其中，微凸点可以是焊球(ball)，也可以是凸块(bump)等，本申请实施例以第二焊接部40为焊球为例进行示意。
基于此，如图17a所示，第一电子元器件10和第二电子元器件20的键合过程如下：
S30、在第一电子元器件10的每一第一焊盘11上形成与第一焊盘11键合的高温焊料层31。
示例的，步骤S30可以包括：如图9a所示，在第一电子元器件10的每一第一焊盘11上放置第一高温焊料G1。如图9b所示，将第一高温焊料G1与第一焊盘11键合，以形成高温焊料层31。
另一种实例的，步骤S30可以包括：如图13a所示，通过电镀工艺，在第一电子元器件10的第一焊盘11上形成与第一焊盘11键合的高温焊料层31。
S31、如图9e和图13c所示，在高温焊料层31上放置低温焊料D。
S32、如图17b和图17c所示，将第一电子元器件10和第二电子元器件20对位贴合。
S33、如图16和图18(沿图2a中A-A′向的剖视图)所示，将低温焊料D，与高温焊料层31和第二焊接部40分别通过原子扩散键合，形成低温焊料层32。从而使第一电子元器件10和第二电子元器件20键合。
在图16所示的电子组件的结构的基础上，如图19(沿图2a中A-A′向的剖视图)所示，电子组件还包括位于第一电子元器件10和第二电子元器件20之间的底部填充胶层60。底部填充胶层60与第一电子元器件10的第一有源面a和第二电子元器件20的第二有源面b分别粘接，且围绕在第一焊接部30和第二焊接部40的外围，并与第一焊接部30和第二焊接部40粘接。
以上，仅为本申请的具体实施方式，但申请的保护范围并不局限于此，任何熟悉本技术领域的技术人员在本申请揭露的技术范围内，可轻易想到变化或替换，都应涵盖在本申请的保护范围之内。因此，本申请的保护范围应以权利要求的保护范围为准。

Claims (11)

1.一种电子组件，其特征在于，包括:
第一电子元器件，其第一有源面上具有至少一个第一焊盘；
第二电子元器件，其第二有源面上具有至少一个第二焊盘，所述第二有源面与所述第一有源面相对设置；
至少一个第一焊接部，一个所述第一焊接部位于一个所述第一焊盘和一个所述第二焊盘之间，且所述第一焊接部与位于其两侧的所述第一焊盘和所述第二焊盘键合；
所述第一焊接部包括高温焊料层和低温焊料层；所述高温焊料层靠近所述第一焊盘设置，且与所述第一焊盘键合；所述低温焊料层靠近所述第二焊盘设置，且与所述第二焊盘键合；
其中，所述低温焊料层的熔点低于所述高温焊料层的熔点，且构成所述低温焊料层的材料与构成所述高温焊料层的材料部分相同，以使得所述低温焊料层通过原子扩散与所述高温焊料层键合；所述低温焊料层与所述高温焊料层之间具有键合界面，沿垂直于所述第一焊盘的方向，所述低温焊料层的厚度为50-100um，所述高温焊料层的厚度为10-100um。
2.根据权利要求1所述的电子组件，其特征在于，所述电子组件还包括至少一个第二焊接部；
所述第二焊接部设置在所述第一焊接部靠近所述第二焊盘一侧，且与所述第二焊盘键合；
所述低温焊料层的熔点低于所述第二焊接部的熔点，且构成所述低温焊料层的材料与构成所述第二焊接部的材料部分相同，以使得所述低温焊料层通过原子扩散与所述第二焊接部键合。
3.根据权利要求1所述的电子组件，其特征在于，所述高温焊料层与所述低温焊料层的键合界面为平面；构成所述高温焊料层的材料为金属单质。
4.根据权利要求1所述的电子组件，其特征在于，所述高温焊料层与所述低温焊料层的键合界面为中心向所述第一焊盘所在侧凹陷的曲面；构成所述高温焊料层的材料为金属合金。
5.根据权利要求2所述的电子组件，其特征在于，所述第一焊盘在所述第一电子元器件上的正投影位于所述第二焊盘在所述第一电子元器件上的正投影内。
6.根据权利要求2所述的电子组件，其特征在于，沿垂直于所述第一焊盘的方向，所述第二焊接部的厚度为10-100um。
7.根据权利要求2所述的电子组件，其特征在于，所述第二焊接部为设置在所述第二焊盘上的微凸点。
8.根据权利要求2所述的电子组件，其特征在于，所述电子组件还包括位于所述第一电子元器件和所述第二电子元器件之间的底部填充胶层；
所述底部填充胶层与所述第一有源面和所述第二有源面分别粘接，且围绕在所述第一焊接部和所述第二焊接部的外围，并与所述第一焊接部和所述第二焊接部粘接。
9.一种电子组件的制备方法，其特征在于，所述电子组件包括第一电子元器件和第二电子元器件；所述第一电子元器件的第一有源面上具有至少一个第一焊盘；所述第二电子元器件的第二有源面上具有至少一个第二焊盘，所述第二有源面与所述第一有源面相对设置；
所述电子组件的制备方法包括：
在所述第一电子元器件的每一所述第一焊盘上形成与所述第一焊盘键合的高温焊料层；沿垂直于所述第一焊盘的方向，所述高温焊料层的厚度为10-100um；
在所述高温焊料层与所述第二焊盘之间放置低温焊料；沿垂直于所述第一焊盘的方向，所述低温焊料层的厚度为50-100um；
将所述低温焊料，与所述高温焊料层和所述第二焊盘分别通过原子扩散键合，形成低温焊料层；所述低温焊料层与所述高温焊料层之间具有键合界面；键合后的所述高温焊料层和所述低温焊料层作为第一焊接部，以使所述第一电子元器件和所述第二电子元器件键合；
其中，所述低温焊料层的熔点低于所述高温焊料层的熔点，且构成所述低温焊料层的材料与构成所述高温焊料层的材料部分相同。
10.根据权利要求9所述的电子组件的制备方法，其特征在于，将所述低温焊料，与所述高温焊料层和所述第二焊盘分别通过原子扩散键合之前，所述电子组件的制备方法还包括：
在所述第二电子元器件的每一所述第二焊盘上形成与所述第二焊盘键合的第二焊接部；所述低温焊料层的熔点低于所述第二焊接部的熔点，且构成所述低温焊料层的材料与构成所述第二焊接部的材料部分相同；
将所述低温焊料与所述第二焊盘通过原子扩散键合，包括：将所述低温焊料与所述第二焊接部通过原子扩散键合。
11.一种电子设备，其特征在于，包括权利要求1-8任一项所述的电子组件。
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